arch/arm/src/max326xx/max32660/max32660_clockconfig.c: Fix an error in a register name.
arm/src/max326xx/max32660: Fix a few new compilation errors when DEBUG is enabled.
Improvements in STM32 ADC, minor changes in STM32 PWM, DMA, HRTIM and add some highpri ADC examples
arch/arch/src/stm32/stm32_adc: fix RCC reset logic
arch/arch/src/stm32/stm32_adc: move sample time change functions to low-level ADC ops
arch/arch/src/stm32/stm32_adc: configurable ADC DMA mode (one shot mode, circular mode)
arch/arch/src/stm32/stm32_pwm: remove llops_get interface. We can use structure casting to get pwm low-level ops
arch/arch/src/stm32/stm32_pwm: add timer enable/disable and frequency update to low-level ops
arch/src/arm/stm32: remove redundant stm32f33xxx_dma.c
arch/arm/src/stm32/stm32f40xxx_dma.c: add interfaces to interact with highp priority DMA interupts
arch/src/arm/stm32/stm32_hrtim: do not enable timers on startup if option from Kconfig selected and add interface to enable/disable timers
arch/src/arm/stm32/stm32_hrtim: fix some warnings
configs/nucleo-f334r8/highpri: update configuration due to changes in stm32_adc
configs/stm32f334-disco/buckboost: update configuration due to changes in stm32_adc
configs/nucleo-f334r8/highpri: add support for ADC injected sequence, add triggering from TIM1
configs/nucleo-f302r8/highpri: add high priority ADC interrupts example
configs/stm32f429i-disco/highpri: add high priority ADC interrupts example
Approved-by: GregoryN <gnutt@nuttx.org>
The user of this invalidation are mmcsd_sdio currently. The mmcsd_sdio driver makes calls for dcache invalidation through the chip specific architecture function SDIO_DMARECVSETUP(). I changed the arch/arm/stm32f7 chips to use arch_invalidate_dcache_by_addr() instead of arch_invalidate_dcache().
This commit includes additional changes to mmcsd_sdio.c. I created SDIO_DMADELYDINVLDT() (DMA delayed invalidate) to invalidate store-into mode dcaches after the DMA transfer. I have been using SDIO_DMADELYDINVLDT() for several weeks now and it has fixed the problems that I previously reported regarding non-cache aligned buffer invalidation errors (for my store-through dcache). However, it does not permit use of unaligned DMA buffers for store-into mode dcaches.
SDIO_DMADELYDINVLDT() is a NoOp unless the chip specific Kconfig file selects CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT. I have modified all the stm32f7 chips to select it.
arch/arm/src/max326xx/max32660/max32660_serial.c: Add a mostly commented out serial driver. With this, we can accomplish a complete build with many warnings for 'Missing logic'
configs/max32660-evsys/src/max326_button.c: Add support for the on-board button.
arch/arm/src/max326xx: Add a mostly empty max326_lowputc.c file mostly so that we can get further in the compilation. Fixed several more compile errors revealed by this.
arch/arm/src/max326xx: Add peripheral clock control header file.
Author: Gregory Nutt <gnutt@nuttx.org>
A few trivial updates from review of changes.
Remove references to NRF52-PCA10040 from documentation. Replace with NRF52-generic.
Remove configs/nrf52-pca10040/ Replaced with configs/nrf52-generic.
Author: Zou Hanya <hanyazou@gmail.com>
Improve LED handling #if~#endif in nrf52_autoleds.c and nrf52_userleds.c
Add Adafruit Feather nRF52 board LED support
Add Adafruit Feather nRF52 board
Add nrf52-generic
Replace 'pca10040' with 'generic'
Copy from nrf52-pca10040 to nrf52-generic
Squashed commit of the following:
arch/arm/src/max326xx and configs/max32660-evsys/nsh/defconfig: Work out some issues related to MAX326xx configuration.
configs/max32660-evsys: Add unverified board support framework.
stm32/stm32_adc: major refator
stm32/stm32_adc: use STM32 ADC IP core version and ADC available functions instead of chip family names in conditional compilation
stm32/chip: replace family specific ADC headers with STM32 ADC IP core version headers
stm32/stm32_adc: configurable sample time supported for all chips, not only L1
stm32/stm32_adc: enable/disable interrupts supported for all chips, not only L1
stm32/stm32_adc: resolution configuration
stm32/stm32f33xxx_adc: remove wrong assertion
configs/nucleo-f303ze: support for ADC and ADC example
configs/stm32f429i-disco: support for ADC and ADC example
Approved-by: GregoryN <gnutt@nuttx.org>
imxrt:Clock config fixes and board.h sets sources and divisors
* imxrt:clockconfig bug fix & Board config set clocks
Fixed logic that was not clearing bits as ~ was
mising in &= mask operations.
Use valuse from the board.h file so set the Mux that
selects the clock sources.
Use board defined PODF values to select clock.
Only configure USDHC2 clocks when board defines clocks.
* imxrt1050-evk:Board setting used to set LSPI and USDHC Clocks
Approved-by: GregoryN <gnutt@nuttx.org>
This change is needed specifically for the case where a bootloader sets the SPE bit before starting NuttX. In that case, the test in the SPI driver is bogus. This change fixes that by assuring that NuttX has booted and initialized at least once (whether or not SPE is set) before the driver starts refusing to initialize.
arch/arm/stm32*: Don't rely on SPI_CR1_SPE to determine if peripheral has been initialized yet.
Approved-by: GregoryN <gnutt@nuttx.org>
Fixes Kconfig options to include all STM32F20XX processors, not just STM32F207
* arch/arm/src/stm32: Fixes Kconfig options to include all STM32F20XX processors, not just STM32F207
* arch/arm/src/stm32: Removes redundant STM32_STM32F429 depends from Kconfig. STM32F4XXX already does this
Approved-by: GregoryN <gnutt@nuttx.org>
In addition to the problems that were previously identified there were a few other bits and pieces outstanding;
* Timing was dependent on CPU speed rather than absolute time
* End of transfer handling was a bit mixed up
* It's possible for data to still be in the FIFO (i.e. not have reached
the card) when a next write is requested, so we need to wait for that to
complete
* Interrupt Status could be carried over from one transfer episode to the
next, corrupting progress
* Multi-descriptor DMA writing simply wasn't implemented, but there were no
indications ... it just failed silently
Master imxrt
* imxrt:Fix typos bit# and names
* imxrt:wdog Registers are 16 Bits
* imxrt:wdog Update has to be within 255 clocks of unlock
* imxrt:clockconfig Fix comments
* imxrt1050-evk:board.h Fix comments
* imxrt:imxrt_ccm.h Define Mux Selects for board.h use
* imxrt:clockconfig Allow better control from board.h
1) Allows a board config clock setting to be defined
in terms of the /n values shown in Figure 18-2.
Clock Tree of the i.MX RT1050 Processor Reference
Manual, Rev. 1, 03/2018
2) Allows the clock multipelx selection to be made in
The board config.
* imxrt1050-evk:Define board clocking based on divisor and muxes
Approved-by: GregoryN <gnutt@nuttx.org>
* Clocks were wrongly configured - way too fast because there is no primary divider on LPC4330
This is fixed by means of changing the definitions in the board.h file. I've edited the one for the lpc4330-xplorer board because I'm actually working with Versiboard and don't want to contribute that config just yet while I've still got the drains up on it.
* The LPC43_SDMMC_DELAY register was not being set
I suspect, in the 'real world', it's possible to get away without setting this, but I've added a register definition, default value and register access macros into arch/arm/src/lpc43xx/chip/lpc43_scu.h and then used them in arch/arm/src/lpc43xx/lpc43_sdmmc.c.
* The LPC43_SDMMC_BLKSIZ and LPC43_SDMMC_BYTECNT registers had the wrong values.
The management have already implemented a rather nice block level interface for the stm32 so I've just re-used that to write to these registers as required. I'm slightly nervous that accessing the configuration registers (SCR being the prime example) which has a much smaller block size may not be being done in the right way but it does seem to work correctly, so let's assume it's all OK until someone tells me otherwise.
These fixes have been tested with DMA-based read/write on a LPC4330. Speed via nsh is pretty low but I'm assuming that's just a buffering/implementation issue for now.
Improvements in STM32 PWM low level driver
stm32_pwm: remove some impossible PWM configurations
stm32_pwm: support for complementary outputs
stm32_pwm: deadtime configuration
stm32_pwm: output polarity and IDLE state configuration
nucleo-f302r8: pwm support
stm32f429i-disco: pwm support
configs: update some configurations according to changes in STM32 PWM driver
Approved-by: GregoryN <gnutt@nuttx.org>
