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Author SHA1 Message Date
Michał Łyszczek
81df56086a Fix bad pllmul values for stm32f1xx connectivity line. 
stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values
 2016-08-11 10:49:57 +02:00
Gregory Nutt
5ea77118aa Explicitly initialize the group tg_exitsem with sem_init(). The existing logic worked because the correct initialization value is all zero, but it is better to initialize the semaphore explicitly. Noted by Jouko Holopainen. 2016-08-10 07:38:07 -06:00
Gregory Nutt
4f87b4544e Merged in young-mu/nuttx (pull request #110) 
Fix two bugs of tiva pwm lower-half driver impl.
 2016-08-10 07:22:26 -06:00
Young
e30a3b780c Fix two bugs of tiva pwm lower-half driver impl. 2016-08-10 13:25:43 +08:00
Young
4838528266 Merged nuttx/nuttx into master 2016-08-10 13:16:28 +08:00
Gregory Nutt
7823a1680e Update a comment 2016-08-09 17:08:03 -06:00
Gregory Nutt
698d6d1294 SAM3/4: Extend clocking logic to enable clocking on ports D-F 2016-08-09 17:05:11 -06:00
Gregory Nutt
0918dd98ab Merged in gnagflow/nuttx (pull request #109) 
SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input.
 2016-08-09 16:40:48 -06:00
Gregory Nutt
fdcf0f7e5f Correct some comments 2016-08-09 15:15:21 -06:00
Wolfgang Reissnegger
cf35bb0b18 SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input. 
The value of a GPIO input is only sampled when the peripheral clock for
the port controller the GPIO resides in is enabled. Therefore we need
to enable the clock even when polling a GPIO.
 2016-08-09 13:23:05 -07:00
Gregory Nutt
b5b7a21bb6 Make reference count a uin16_t and save a couple of bytes. 2016-08-09 13:54:57 -06:00
Gregory Nutt
01fd4952f9 tools/sethost.sh: Fix several syntax errors 2016-08-09 13:20:20 -06:00
Gregory Nutt
8b5833f7fe A consequence of Max's change to the logic to enable access to the backup domain is that every call to enabledbkp(true) must be followed by a matching call to enablebkp(false). There was one cse in both RTCC drivers where that may not always be true. 2016-08-09 11:33:47 -06:00
v01d
f715e9b787 RTC working, I2C in progress 2016-08-09 14:01:27 -03:00
Gregory Nutt
5d91b8cabb With last change, stm32_pwr_enablebkp() no longer returns a value 2016-08-09 07:50:31 -06:00
Max Neklyudov
1e3ccbac12 Make stm32_pwr_enablebkp thread safe 2016-08-09 07:36:13 -06:00
Alan Carvalho de Assis
8499f42bf9 Add STM32F37XX DMA channel configuration 2016-08-08 13:29:53 -06:00
Alan Carvalho de Assis
fcf1ae7e05 stm32f37xx: Fix SYSCFG_EXTICR_PORTE defined twice 2016-08-08 12:59:29 -06:00
Gregory Nutt
b071e4ce92 Refresh all STM32, EFM32, and SAMV7 configurations for SPI H/W features configuration changes 2016-08-08 12:50:14 -06:00
Alan Carvalho de Assis
834f058573 I'm using NuttX on STM32F373 and saw the config was missing SPI2 and 
SPI3, see datasheet:
www.st.com/resource/en/datasheet/stm32f373cc.pdf

I searched for other members of STM32F37XX family and they also have 3 SPIs:
http://www.st.com/content/st_com/en/search.html#q=STM32F37-t=keywords-page=1
 2016-08-08 12:25:15 -06:00
Gregory Nutt
caea59b340 SPI bit order: Add configuration setting to indicate if an architecture-specif SPI implementation does or does not support LSB bit order. 2016-08-08 12:21:20 -06:00
Gregory Nutt
d787b41705 maple/nx configuration uses memlcd.c and so must have CONFIG_SPI_HWFEATURES and CONFIG_SPI_BITORDER 2016-08-08 11:59:27 -06:00
Gregory Nutt
6df28bc74e Make bit-order SPI H/W feature configurable for better error detection 2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791 Fix cloned variable error in all SPI drivers 2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS. 2016-08-08 10:37:28 -06:00
Gregory Nutt
21859af6d9 Add check of return value in drivers affected by last change: Report the error on a failure to set the bit order. 2016-08-08 08:40:37 -06:00
Gregory Nutt
7d4cb73bd6 STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers. 
This change three things:  (1) It adds HWFEAT_LSBFIRST as a new H/W feature.  (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
 2016-08-08 08:28:13 -06:00
Gregory Nutt
986c568d34 Correct file header comments 2016-08-07 10:04:02 -06:00
Gregory Nutt
9965cbe428 drivers/: Review and correct some stylistic inconsistencies 2016-08-07 09:43:48 -06:00
Gregory Nutt
3404b3cb4a sched/: Review and correct some stylistic inconsistencies 2016-08-07 08:32:11 -06:00
Gregory Nutt
18ce4ff57b sched/: Review and correct some stylistic inconsistencies 2016-08-07 08:25:30 -06:00
Alan Carvalho de Assis
10a7698112 drivers/wireless/mfrc522.c: Fix memory free command 2016-08-07 07:34:01 -06:00
v01d
581bbc672a undo accidental change on teensy 3.x defconfig 2016-08-07 00:19:47 -03:00
v01d
d483f7939f I2C0 support for kinetis/teensy-3.x (to be tested) 2016-08-06 22:23:59 -03:00
Gregory Nutt
469aff0584 Fix names of pre-processor variables used in header file idempotence 2016-08-06 19:21:42 -06:00
Gregory Nutt
56f2454c86 Fix names of pre-processor variables used in header file idempotence 2016-08-06 18:48:45 -06:00
Gregory Nutt
d41008e220 Update some header commments 2016-08-06 18:16:31 -06:00
Gregory Nutt
2b23d4b0e7 Correct some comments 2016-08-06 16:25:02 -06:00
Gregory Nutt
5aaba42b0d Update Renesas REAMDE files 2016-08-06 15:43:27 -06:00
Gregory Nutt
f43ded46e6 Rename arch/sh to arch/renesas, cont'd 2016-08-06 14:03:38 -06:00
Gregory Nutt
8ee155da3d Rename arch/sh to arch/renesas 2016-08-06 13:33:41 -06:00
Gregory Nutt
11870f98f1 Merged in young-mu/nuttx (pull request #108) 
Enable TM4C1294-launchpad board build
 2016-08-06 11:15:02 -06:00
Young
358a265c4a Enable TM4C1294-launchpad board build 2016-08-07 01:08:59 +08:00
Gregory Nutt
4afe20c83f Fix naming of some enumeration types 2016-08-06 11:08:53 -06:00
Young
2f5cb74416 Merged nuttx/nuttx into master 2016-08-07 00:36:06 +08:00
Alan Carvalho de Assis
ef3a1f772d configs/stm32f103-minimum:Add board support to MFRC522 driver 2016-08-06 08:51:58 -06:00
Alan Carvalho de Assis
bfac90f720 Add MFRC522 RFID ISO14443 and Mifare transceiver driver 2016-08-06 08:45:52 -06:00
Gregory Nutt
83c7b4d5d6 SPI driver: Correct return value in case of a certain error condition 2016-08-06 08:07:30 -06:00
Young
d1421a359a Merged nuttx/nuttx into master 2016-08-06 13:44:02 +08:00
Gregory Nutt
2f7cae6e4a SPI transfer: minor fix to type and comments 2016-08-05 14:18:40 -06:00