Commit Graph

54911 Commits

Author SHA1 Message Date
hujun5
956d77ba23 arm64:add busy wait flag
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-24 18:04:49 +08:00
hujun5
6dd26a3e68 arm64/smp: changing the startup of arm64 SMP from serial to parallel
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-24 18:04:49 +08:00
yangsong8
5ff98fb4e1 syslog: enable LF to CRLF config as default
This commit fixes the issue #14418

Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2024-10-21 15:06:31 +02:00
ligd
d39bcd4ad5 Doc: add maskable nested interrupt description
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-18 23:54:11 +08:00
ligd
9a317472fd arm-m: support zero interrupt back to game
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-18 23:54:11 +08:00
ligd
946b01d4a8 arm-M: set current regs for crash dump
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-18 23:54:11 +08:00
ligd
8b8a2610ab armv6/7/8m: use pendsv to handle context switch
This PR support Nested interrupt in armv6/7/8m:

There are two types of nested interrupt model:

Zero latency nested interrupt
Interrupt           Priority            Note
Data abort          Highest
SVC                 0x50
High irq1           0x60             ISR can't access system API
irq_save()          0x70
High irq2           0x80             ISR can't access system API
normal irq3         0xB0
We have already support this mode before this PR

Nested interrupt which interrupt level lower than up_irq_save()
Interrupt           Priority            Note
Data abort          Highest
SVC                 0x70
irq_save()          0x80
High irq1           0x90              ISR can access system API
High irq2           0xA0              ISR can access system API
normal irq3         0xB0
Now, this PR can support this mode

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-18 23:54:11 +08:00
ligd
064415a765 armv6m: add up_trigger_irq() support
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-18 23:54:11 +08:00
ligd
aa4a428825 armv7/8m: unmask all the IRQ when thread start
NVIC_SYSH_PRIORITY_MIN not the basepri loweest prio
spec says:
basepri 0 - Disables masking by BASEPRI

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-18 23:54:11 +08:00
hujun5
33e30239f1 sched: replace sync pause with async pause for nxtask_terminate
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-17 12:51:14 +02:00
zhangyuan29
cdb5a7c6d4 sched: Disable the scheduling when send SIGCHLD signal
Disable the scheduling to prevent other tasks from being
deleted after they are awakened

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2024-10-17 12:51:14 +02:00
hujun5
b52ad53cc1 sched: replace sync pause with async pause for nxsched_suspend
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic
-machine virt,virtualization=on,gic-version=3
-net none -chardev stdio,id=con,mux=on -serial chardev:con
-mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-17 12:51:14 +02:00
hujun5
28cfadb4b0 sched: replace sync pause with async pause for setpriority
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic
-machine virt,virtualization=on,gic-version=3
-net none -chardev stdio,id=con,mux=on -serial chardev:con
-mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-17 12:51:14 +02:00
Alin Jerpelea
1b64c80d72 Revert "sim: fix context-switch when do wdog callback()"
This reverts commit a3568af10551c37b839169634c33fbe78044725f.
2024-10-17 12:51:14 +02:00
Filipe Cavalcanti
71d57aac25 tools/espressif: add esptool version check to Espressif build system 2024-10-16 18:41:02 +08:00
hujun5
cedcb1a674
sim: add NXSYMBOLS pthread_gettid_np pthread_self
reason:
enable sim:smp can boot

This commit fixes the regression from https://github.com/apache/nuttx/pull/12561

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-16 11:27:30 +02:00
Alin Jerpelea
9192916a4e Revert "tools: update esptool version reference"
This reverts commit a157436a57.
2024-10-16 15:45:41 +08:00
Filipe Cavalcanti
997162685c ci: add Python linter to check 2024-10-16 07:53:37 +08:00
Marco Casaroli
8ca0bb35af ci: use venv for check
To avoid the following CI error:

This environment is externally managed
--> To install Python packages system-wide, try apt install
    python3-xyz, where xyz is the package you are trying to
    install.

    If you wish to install a non-Debian-packaged Python package,
    create a virtual environment using python3 -m venv path/to/venv.
    Then use path/to/venv/bin/python and path/to/venv/bin/pip. Make
    sure you have python3-full installed.

    If you wish to install a non-Debian packaged Python application,
    it may be easiest to use pipx install xyz, which will manage a
    virtual environment for you. Make sure you have pipx installed.

    See /usr/share/doc/python3.12/README.venv for more information.
2024-10-16 07:53:37 +08:00
xuxingliang
07c48eb7d0 tools: make isort and black formatters to work together
Config multi line output to mode 3, so isort and black can agree with
each other:
```
3 - Vertical Hanging Indent

from third_party import (
    lib1,
    lib2,
    lib3,
    lib4,
)
```

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-10-16 00:57:57 +02:00
xuxingliang
cc711e0c99 tools: exit with error if py needs to format
Make CI fail if format not pass.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-10-16 00:57:57 +02:00
Xiang Xiao
002d89885e net: Remove IFF_DOWN flag to compatible with Linux/*BSD
turn off interface by checking IFF_UP flag isn't set:
https://github.com/apache/nuttx/issues/1838

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-10-15 22:40:22 +08:00
wangmingrong1
c5f816e16a libc/machine: Fix the error caused by tag kasan
Use address addition and subtraction, no longer as the return value of the address. Tags must be removed before calculation

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-10-12 11:54:04 +08:00
Filipe Cavalcanti
a157436a57 tools: update esptool version reference 2024-10-11 22:04:43 +08:00
SPRESENSE
801805d4a2 binfmt/libelf: Fix return code
Fix return code in case of error in loading constructor and destructor section.

Detected by Codesonar 54667871, 54667873
2024-10-11 17:23:03 +08:00
wangmingrong1
0b98e9e680 board_reset: flush cache before reset
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-10-11 01:30:51 +08:00
xuxingliang
8074812517 assert: dump all CPU registers and stack
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-10-11 01:30:51 +08:00
xuxingliang
e65b03edd2 assert: cleanup assert handler
1. extract dump from assert main flow
2. use OSINIT_PANIC for fatal error.
3. fix the method to judge kernel thread.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-10-11 01:30:51 +08:00
Xu Xingliang
9da6761453 assert: disable kasan in assert
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
f51c5452b2 sched: replace sync pause with async pause for nxtask_restart
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic
-machine virt,virtualization=on,gic-version=3
-net none -chardev stdio,id=con,mux=on -serial chardev:con
-mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
b1932c668d sim: fix sim smp boot regression
This commit fixes the regression from https://github.com/apache/nuttx/pull/13716

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
c35e25b7e5 arch: rename xxxx_pause.c to xxxx_smpcall.c
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
d54bc8a9f8 arch: remove up_cpu_pause up_cpu_resume up_cpu_paused up_cpu_pausereq
reason:
  To remove the "sync pause" and decouple the critical section from the dependency on enabling interrupts,
  after that we need to further implement "schedlock + spinlock".
changelist
  1 Modify the implementation of critical sections to no longer involve enabling interrupts or handling synchronous pause events.
  2 GIC_SMP_CPUCALL attach to pause handler to remove arch interface up_cpu_paused_restore up_cpu_paused_save
  3 Completely remove up_cpu_pause, up_cpu_resume, up_cpu_paused, and up_cpu_pausereq
  4 change up_cpu_pause_async to up_send_cpu_sgi

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
6392d5a6b3 xtensa: Replace the implementation of up_cpu_pause
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
fbed4ece2c x86_64: we should call x86_64_restorestate/x86_64_savestate
reason:
In x86_64, g_current_regs is still used for context switching.

This commit fixes the regression from https://github.com/apache/nuttx/pull/13616

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
f5a449487c arch/intel64: colorize IDLE stack for AP cores
colorize IDLE stack for AP cores in x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
4a796c39bb xtensa: add parameters to xtensa_pause_handler
reason:
nxsched_smp_call_handler need these parameters

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
xuxingliang
5e2d205e1b sched: handle sched lock in interrupt
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-10-11 01:30:51 +08:00
dulibo1
755bef6c56 sched_smp:adjust the unlock order
1.nxsem_post wake up  nxsched_smp_call;
2.stack smp_call_data_s may return;
3.nxsched_smp_call_handler access call_data->lock is not safety;
so adjust the unlock order

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
e0d9cc432c arch/intel64: fix IRQ conflict with GOLDFISH
Also move MSI IRQ definition to place where other IRQ definitions are.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
4fd92edee7 sched: replace sync pause with async pause for nxsig_process
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
487fcb3bce signal: adjust the signal processing logic to remove the judgment
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
8275a846b1 arch: move sigdeliver to common code
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
buxiasen
ec58a6ab25 arch: cpu pause when sigaction only necessary if tcb running
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
fad4232925 arch/x86_64/intel64/intel64_schedulesigaction.c: properly align signal handler stack for vector operations
signal handler stack must be properly aligned, otherwise vector instructions doesn't work in signal handler

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
a33528fa4a arch/x86_64/intel64/intel64_cpuidlestack.c: stack_alloc should point to stack base not stack top
stack_alloc should point to stack base not stack top

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
p-szafonimateusz
bbea8dcefe arch/x86_64/intel64/intel64_head.S: move initial RSP for AP cores below regs area
move initial RSP for AP cores below regs area.
otherwise IDLE thread for AP cores can be corrupted

XCP region now match regs allocation in up_initial_state()

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-11 01:30:51 +08:00
Ville Juven
192dde1b58 arm64_task/pthread_start: Set sp_el0 upon starting user process
As the handling of sp_el0 was moved from the context switch routine
to exception entry/exit, we must set sp_el0 explicitly when the user
process is first started.
2024-10-11 01:30:51 +08:00
lipengfei28
7975c94d88 Kernel build: enter exception save sp_sl0,exit exception restroe sp_el0
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-11 01:30:51 +08:00
ligd
669cd3aa2c arm64: simply the vectors
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-11 01:30:51 +08:00