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Author SHA1 Message Date
Gregory Nutt
968b2553cd Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level 2013-08-10 09:06:53 -06:00
Gregory Nutt
c5e66ae051 Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM. 2013-08-09 17:55:27 -06:00
Gregory Nutt
efabe4aaff SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt
619cd66f33 Fix some cache-related issues with the SAMA5 DMA driver 2013-08-09 15:25:13 -06:00
Gregory Nutt
628f50ba61 SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers 2013-08-09 13:12:16 -06:00
Gregory Nutt
417636e1de SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA 2013-08-08 15:51:16 -06:00
Gregory Nutt
83cbd61c8c SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer 2013-08-08 13:15:52 -06:00
Gregory Nutt
9d81d4727c More SAMA5 DMAC driver fixes. Still does not work. 2013-08-07 17:19:48 -06:00
Gregory Nutt
2df1d56a01 SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers 2013-08-07 11:32:08 -06:00
Gregory Nutt
4369c172df Change setup logic to hand MTD minor numbers for AT24, HSMCI0, and HSMCI1 2013-08-07 11:31:31 -06:00
Gregory Nutt
bfaf64e54e Fix SAM bug: Parmaters reversed in DMA function call 2013-08-06 15:47:09 -06:00
Gregory Nutt
b0e8231fa3 SAM3,4,A5 DMAC driver fixes 2013-08-06 13:27:48 -06:00
Gregory Nutt
6a429e675f SAM3,4,A5: Fix some masked status checks that can generate false error reports 2013-08-06 12:36:56 -06:00
Gregory Nutt
ce9eb71495 SAMA5: A few early, easy bug fixes. The rest will all be difficult 2013-08-06 11:29:53 -06:00
Gregory Nutt
fa011d9aca SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts 2013-08-06 10:20:17 -06:00
Gregory Nutt
369bf26b20 SAMA5: Add HSMCI memory card driver support 2013-08-05 16:21:24 -06:00
Gregory Nutt
8c88dcd0c7 SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n 2013-08-05 10:29:43 -06:00
Gregory Nutt
cbe8c5ed56 SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH 2013-08-05 08:24:39 -06:00
Gregory Nutt
906506c61c SAMA5D3x-EK: At support for the AT25 serial FLASH 2013-08-04 16:56:41 -06:00
Gregory Nutt
1060b232e9 SAMA5: Add register level debug option for SPI 2013-08-04 14:45:24 -06:00
Gregory Nutt
83af194db1 SAMA5: SPI driver now supports both SPI0 and SPI1 2013-08-04 12:50:20 -06:00
Gregory Nutt
163ec613b1 SAMA5: Add basic SPI suppport (untested) 2013-08-04 11:08:20 -06:00
Gregory Nutt
1ea55fc2a7 SAMA5: Add DMA suppport (untested) 2013-08-04 10:44:18 -06:00
Gregory Nutt
7e2c6c4aef Fixes for compiler warnings from Lorenz Meier 2013-08-03 16:51:48 -06:00
Gregory Nutt
5cdc3db214 SAMA5: Add DMA controller register definitions 2013-08-03 12:13:42 -06:00
Gregory Nutt
6422792f57 Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts 2013-08-03 08:22:37 -06:00
Gregory Nutt
3c404ea742 Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done 2013-08-02 18:30:27 -06:00
Gregory Nutt
3ee10f0f08 Correct some typos int he MPADDRCS register address definitions 2013-08-02 12:06:11 -06:00
Gregory Nutt
2feb83a2f8 SAMA5: More MMU-related changes to properly initialize SDRAM 2013-08-02 11:11:57 -06:00
Gregory Nutt
2ac9669a87 SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM 2013-08-01 16:58:55 -06:00
Gregory Nutt
8b8fe4d073 SAMA5: Add DDR controller register definitions 2013-08-01 12:27:41 -06:00
Gregory Nutt
b148465beb ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching 2013-08-01 10:05:33 -06:00
Gregory Nutt
f2195a16b2 ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation. 2013-08-01 07:41:00 -06:00
Gregory Nutt
4576676f8e Correct errors noted in SAMA5 documentation 2013-08-01 07:10:34 -06:00
Gregory Nutt
8b44b8fce7 Prep for NuttX-6.29 release 2013-07-31 14:25:06 -06:00
Gregory Nutt
0a32db5e05 SAMA5: Delay loop calibrated; Correct sense of the RED LED 2013-07-31 11:44:30 -06:00
Gregory Nutt
ffdd034c35 SAMA5: Add an NSH configuration of the SAMA5D3x-EK board 2013-07-31 10:46:13 -06:00
Gregory Nutt
7dfef5e22e SAMA5: Modification of some CPSR-related inline functions 2013-07-31 09:11:24 -06:00
Gregory Nutt
fde3777e9e Fix Cortex-A CPSR register field definition 2013-07-30 19:05:24 -06:00
Gregory Nutt
bfa1a9545b SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works 2013-07-30 16:19:52 -06:00
Gregory Nutt
8bfdf70766 ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM 2013-07-30 13:20:33 -06:00
Gregory Nutt
b2da68028e The last bit of a previous commit was still in the editor 2013-07-30 12:07:51 -06:00
Gregory Nutt
c4c222ca3a More DAC changes from John Wharington 2013-07-30 11:41:53 -06:00
Gregory Nutt
2c6b370c4a Add ARMv7-A irqdisable() inline function 2013-07-30 11:37:09 -06:00
Gregory Nutt
5a94767c52 STM32 F3 I2C driver from John Wharington 2013-07-30 10:35:17 -06:00
Gregory Nutt
b57f54fbd0 STM32 DAC DMA fixes from John Wharington 2013-07-30 08:54:32 -06:00
Gregory Nutt
413aba0bf5 SAMA5: More cache and mmu inline utility functions 2013-07-29 19:57:15 -06:00
Gregory Nutt
36b1cd0a6b SAMA5: Separate cache operations into separate files 2013-07-29 18:38:02 -06:00
Gregory Nutt
5351598323 Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH 2013-07-29 17:54:56 -06:00
Gregory Nutt
1728594259 SAMA5: Add a little NuttX debug program to help debugger programs in NOR flash 2013-07-29 13:57:32 -06:00