Previously, it was impossible to build for PIC32MZ architecture with
CONFIG_SERIAL_TERMIOS because it introduced compiler errors in the
lower half driver.
Fixing the compiler errors and adding an implementation of the
TIOCSERGSTRUCT, TCGETS, and TCSETS ioctl calls.
* arch/mips/src/pic32mz/pic32mz_serial.c
(): Include nuttx/fs/ioctl.h, needed for the TIOCSERGSTRUCT, TCGETS,
and TCSETS defines.
(up_ioctl): Fix compile breakage. Implement TIOCSERGSTRUCT. Make
TCGETS return data bits, parity, and stop bits. Make TCSETS apply
changes to data bits, parity, and stop bits.
In the lower half UART driver for Tiva architecture (TM4C12x), adding
the TIOCxBRK ioctl calls, which allow an application to transmit a BSD
compatible line BREAK. TIOCSBRK starts the BREAK and TIOCCBRK ends it.
This architecture supports BSD-style BREAK in hardware. We write to
the BRK bit (bit 0) of the UART Line Control register (UARTLCRH) to
start the BREAK, which begins after the UART finishes shifting out the
current character in progress, if any, including its stop bit(s), and
continues indefinitely until we write to the BRK bit again to stop the
BREAK.
* arch/arm/src/tiva/Kconfig
(config TIVA_UART_BREAKS): New. Appears as CONFIG_TIVA_UART_BREAKS
in code.
* arch/arm/src/tiva/common/tiva_serial.c
(struct up_dev_s): Add new field 'brk' to indicate line break in
progress when built with CONFIG_TIVA_UART_BREAKS.
(up_ioctl): Add cases for TIOCSBRK to turn BSD-compatible break on
unconditionally and TIOCCBRK to turn break off unconditionally.
(up_txint): Block enabling TX interrupt if line break in progress.
This is similar to the STM32F7 implementation.
(0)Allocating 3 bytes aligned to 0x00000001
=================================================================
==1461685==ERROR: AddressSanitizer: invalid alignment requested in posix_memalign: 1, alignment must be a power of two and a multiple of sizeof(void*) == 4 (thread T0)
#0 0xf7ab1c2f in __interceptor_posix_memalign ../../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:226
Signed-off-by: ligd <liguiding1@xiaomi.com>
* arch/arm/src/tiva/common/tiva_serial.c:
(up_ioctl): PR #8406 (commit 1edec0aaa1) added support for
configuring the serial port's CTS/RTS flow control at runtime using
termios when built with CONFIG_SERIAL_TERMIOS and either or both of
CONFIG_SERIAL_OFLOWCONTROL and CONFIG_SERIAL_IFLOWCONTROL. However,
a runtime sanity check left over from before prevented this from
working: When processing ioctl TCSETS, we would return -EINVAL if
one or both of CCTS_OFLOW and CRTS_IFLOW were requested, which was
not deserved if the requested features were in fact supported.
Fixing the sanity check so it depends on features actually
configured.
The function is not relevant any longer, remove it. Also remove
save_addrenv_t, the parameter taken by up_addrenv_restore.
Implement addrenv_select() / addrenv_restore() to handle the temporary
instantiation of address environments, e.g. when a process is being
created.
There is currently a big problem in the address environment handling which
is that the address environment is released too soon when the process is
exiting. The current MMU mappings will always be the exiting process's, which means
the system needs them AT LEAST until the next context switch happens. If
the next thread is a kernel thread, the address environment is needed for
longer.
Kernel threads "lend" the address environment of the previous user process.
This is beneficial in two ways:
- The kernel processes do not need an allocated address environment
- When a context switch happens from user -> kernel or kernel -> kernel,
the TLB does not need to be flushed. This must be done only when
changing to a different user address environment.
Another issue is when a new process is created; the address environment
of the new process must be temporarily instantiated by up_addrenv_select().
However, the system scheduler does not know that the process has a different
address environment to its own and when / if a context restore happens, the
wrong MMU page directory is restored and the process will either crash or
do something horribly wrong.
The following changes are needed to fix the issues:
- Add mm_curr which is the current address environment of the process
- Add a reference counter to safeguard the address environment
- Whenever an address environment is mapped to MMU, its reference counter
is incremented
- Whenever and address environment is unmapped from MMU, its reference
counter is decremented, and tested. If no more references -> drop the
address environment and release the memory as well
- To limit the context switch delay, the address environment is freed in
a separate low priority clean-up thread (LPWORK)
- When a process temporarily instantiates another process's address
environment, the scheduler will now know of this and will restore the
correct mappings to MMU
Why is this not causing more noticeable issues ? The problem only happens
under the aforementioned special conditions, and if a context switch or
IRQ occurs during this time.
Detach the address environment handling from the group structure to the
tcb. This is preparation to fix rare cases where the system (MMU) is left
without a valid page directory, e.g. when a process exits.
ld: warning: boards/arm/rp2040/raspberrypi-pico-w/scripts/raspberrypi-pico-flash.ld contains output sections; did you forget -T?
Signed-off-by: chao an <anchao@xiaomi.com>
common/arm_backtrace_unwind.c: In function 'up_backtrace':
common/arm_backtrace_unwind.c:626:27:
warning: assignment to 'long unsigned int' from 'uint8_t (*)[]'\
{aka 'unsigned char (*)[]'} makes integer from pointer without a cast [-Wint-conversion]
626 | frame.stack_top = &g_intstacktop;
|
In order to make compilation warnings and errors easier to be found out,
this commit will disable the printing of the compilation process as much
as possible, and also if you want to restore the log information of the
compilation process, please enable verbose build on command line:
$ make V=0
OR
$ make V=1
| V=0: Exit silent mode
| V=1,2: Enable echo of commands
| V=2: Enable bug/verbose options in tools and scripts
Signed-off-by: chao an <anchao@xiaomi.com>
NuttX kernel should not use the syscall functions, especially after
enabling CONFIG_SCHED_INSTRUMENTATION_SYSCALL, all system functions
will be traced to backend, which will impact system performance.
Signed-off-by: chao an <anchao@xiaomi.com>
This is a follow-up to PR #6548, which added UART CTS/RTS support for
Tiva (TI TM4C12x) microcontrollers. This follow-up makes it possible,
when termios support is enabled with CONFIG_SERIAL_TERMIOS and CTS/RTS
support is enabled with CONFIG_SERIAL_OFLOWCONTROL and/or
CONFIG_SERIAL_IFLOWCONTROL, to query whether CTS/RTS are on/off at
runtime by utilizing ioctl TCGETS and to turn CTS/RTS on/off at runtime
by utilizing ioctl TCSETS.
* arch/arm/src/tiva/common/tiva_serial.c
(up_set_format): Because this function is called from ioctl TCSETS to
modify UART settings, and that IOCTL now respects CCTS_OFLOW and
CRTS_IFLOW, move setting/clearing of Tiva UART's CTL register's RTSEN
and CTSEN bits here...
(up_setup): ...from here.
(up_ioctl): For TCGETS, populate CCTS_OFLOW and CRTS_IFLOW bits as
appropriate. For TCSETS, populate priv's oflow and iflow from
supplied CCTS_OFLOW and CRTS_IFLOW bits.
Thanks to Petro Karashchenko for review and suggested fixes.
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
The lower-half serial driver for Tiva (TI TM4C12x) microcontrollers supports
termios, but Kconfig never enabled this support because we were missing the
ARCH_HAVE_SERIAL_TERMIOS configs. This is now enabled, allowing termios support
to be enabled with CONFIG_SERIAL_TERMIOS.
* arch/arm/src/tiva/Kconfig
(config TIVA_UART0 thru TIVA_UART7): Select ARCH_HAVE_SERIAL_TERMIOS.
PWM driver for multiple peripherals supplied in gateware.
Only single channel frequency and duty cycle control is implemented. Pulse counting and multichannel features are not currently feasible.
Additions also include a new board configuration for arty-a7 which enables the PWM driver and example application.
