Commit Graph

13791 Commits

Author SHA1 Message Date
David Sidrane
8624f9a444 s32k1xx:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
7fb59e4f36 kinetis:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
e5ceb062f9 stm32f7:Use inttypes in printing macro
stm32f7:SDMMC Use inttypes in printing macro

stm32f7:CAN Use inttypes in printing macro

stm32f7:DMA Use inttypes in printing macro

stm32f7:serial fix compile error from UNUSED() change
2021-05-05 06:07:50 -07:00
David Sidrane
cbe3e120d5 stm32h7:Use inttypes in printing macros 2021-05-05 06:07:50 -07:00
raiden00pl
b721ba05aa stm32_pwm.c: fix compilation warnings 2021-05-05 09:32:58 -03:00
raiden00pl
7cb7fe3f38 stm32_pwm: fixes for PULSECOUNT support
1. generate an indefinite number of pulses when info->count = 0
2. timers that don't support pulse-count shouldn't use pulse-count logic
2021-05-05 09:32:58 -03:00
raiden00pl
7b53a5fe1c stm32_adc.c: rename a struct member in struct adccmn_data_s from 'initialized' to 'refcount' 2021-05-05 01:27:56 -07:00
Gustavo Henrique Nihei
f8a36f10c3 arch: Uniformize optimization flag setting across architectures 2021-04-29 19:17:16 -07:00
Juha Niskanen
07cde736bd arch: fix some printf format errors 2021-04-29 19:16:56 +01:00
Alexander Vasiljev
940c5b69c3 stm32h7: serial: use dma tx semaphore as resource holder 2021-04-29 03:19:44 -07:00
Masayuki Ishikawa
8e161bc992 arch: rp2040: Add stack coloration for the idle task
Summary:
- This commit adds stack coloration for the idle task

Impact:
- rp2040 with CONFIG_STACK_COLORATION=y

Testing:
- Tested with nsh, nshsram and smp configurations
- NOTE: CONFIG_STACK_COLORATION=y needs to be added
2021-04-25 03:19:24 -05:00
Masayuki Ishikawa
dc9223f4cf arch: rp2040: Fix the initial stack pointer
Summary:
- The NuttX for raspberrypi-pico boots via the boot_stage2 provided
  by the pico-sdk which sets the MSP at the end of the SRAM.
- However, the NuttX expects the MSP is set to the top of the idle stack.
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with nsh, nshsram and smp configrations
2021-04-25 03:19:24 -05:00
Masayuki Ishikawa
1b00e5d518 spinlock: Remove SP_SECTION
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
  region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
  works without any problems
- So SP_SECTION should be removed to simplify the kernel code

Impact:
- None

Testing:
- Build test only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-20 22:41:44 -05:00
Masayuki Ishikawa
1a9e7efde5 smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
  the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code

Impact:
- All SMP configurations

Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)

Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
2021-04-19 21:46:39 -05:00
Anthony Merlino
14db894caf stm32h7: Allow selection of SDMMC clock source. 2021-04-19 08:57:49 -07:00
Yuichi Nakamura
048802bcd2 arm/rp2040: Add RP2040 I2S driver 2021-04-19 09:39:51 +09:00
Yuichi Nakamura
41b193e07f arm/rp2040: Add RP2040 PIO APIs 2021-04-19 09:39:51 +09:00
David Sidrane
c801de4201 stm32h7:Serial Add RX and TX DMA
stm32h7:Serial Use Idel to poll RX DMA

stm32h7:Serial Do not loop in an ISR!

stm32h7:Serial signal txdma completion with semaphore

stm32h7:Serial Apply formatting suggestions from code review

Co-authored-by: Mateusz Szafoni <raiden00pl@gmail.com>

stm32h7: Serail Add Power Managment (Untested)
2021-04-17 09:56:41 +02:00
Xiang Xiao
2335b69120 arch: Allocate the space from the beginning in up_stack_frame
arch: Allocate the space from the beginning in up_stack_frame

and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0 arch: Rename g_intstackbase to g_intstacktop
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
David Sidrane
3feb3a247d stm32:Serial DMA config USART{4578} -> UART{4578} 2021-04-15 21:26:32 -05:00
raiden00pl
82ce1de7cd stm32/stm32_foc: remove the debug message before the calibration start
For unknown reasons this message may interferre with the calibration
procedure and result in invalid calibariton data.
We leave only a message informing about the end of the the calibration.
The problem was observed for STM32G4 + IHM16M1.
2021-04-15 06:37:15 -05:00
raiden00pl
13f62d15cc stm32/stm32_foc: do not enable PWM outputs that are not in use 2021-04-15 06:37:15 -05:00
Anthony Merlino
b1f637a6ea stm32h7: Don't automatically select HSI48 as it may depend on USBSEL.
Add preprocessor logic that can catch the condition where the board is selecting the HSI48 as the USBSEL source, but the HSI48 isn't enabled.
2021-04-15 02:00:37 -07:00
Anthony Merlino
4c8d70dd2e stm32h7: Initialize CSI and HSI48 clocks as needed based on enabled peripherals. 2021-04-15 02:00:37 -07:00
jturnsek
33b071ecb9 MIMXRT1064-EVK support 2021-04-14 14:57:26 -07:00
raiden00pl
ad8c09d0a1 stm32: include support for TIMERS_V3 2021-04-14 10:53:50 -04:00
raiden00pl
7c11397469 stm32: add definitions for TIMERS_V3. All credit goes to Nathan Hartman (hartmannathan) 2021-04-14 10:53:50 -04:00
raiden00pl
6d69600905 stm32/Kconfig: move configuration common for G4 under STM32_STM32G4XXX option 2021-04-14 10:53:50 -04:00
Marco Krahl
8456f3615e drivers/1wire: Moves header and adjusts include paths
Moves header to 1wire include sub directory.
Moves over common crc definitions to new interface.

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2021-04-14 02:49:28 -05:00
raiden00pl
beebb57445 stm32g4xx: add support for FOC 2021-04-13 14:38:28 -05:00
raiden00pl
835b129c94 stm32g4xx: add DBGMCU definitions 2021-04-13 14:38:28 -05:00
Anthony Merlino
9c8c2b0db2 Separate CLOCK_TIMEKEEPING and SCHED_TICKLESS. 2021-04-13 11:42:31 -05:00
raiden00pl
c90a6bdf2b stm32/Kconfig: enable ADCx DMA support if DMAMUX enabled 2021-04-13 12:08:17 -03:00
raiden00pl
bf04ef9a3c stm32g4: add support for DMA (DMAMUX) 2021-04-13 12:08:17 -03:00
raiden00pl
fbb7e95ebf stm32g4xxxx_dmamux.h: rename defs to match other chips and add DMAMAP defs 2021-04-13 09:20:18 -05:00
raiden00pl
a735252d78 stm32h7,stm32g0: fix typos in DMAMUX 2021-04-13 09:20:18 -05:00
raiden00pl
62001bff3b stm32g4xx: add support for PWM 2021-04-13 09:19:52 -05:00
raiden00pl
4c741bc9a5 stm32/Kconfig: G4 chips use TIMERS_V2 2021-04-13 09:19:52 -05:00
raiden00pl
ff2ae3e894 stm32g4xx: add support for ADC 2021-04-13 09:29:09 -03:00
Alin Jerpelea
20d315abfe NuttX: Falker Atomacao Agrícola Ltda: update licenses to Apache
Falker Atomacao Agrícola Ltda has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-13 05:28:28 -05:00
Anthony Merlino
1a5a7a1b63 stm32h7: Allow OTGHS to use internal FS PHY 2021-04-12 23:21:34 -05:00
Jukka Laitinen
3f6bb76e01 arch/arm/src/stm32f7/stm32_allocateheap.c: Fix MPU alignments
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
  allocation; use the previous calculation directly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-04-12 23:20:18 -05:00
Jukka Laitinen
ea36c2c7ea Remove MPU_RASR_S bit from stm32f7 MPU user mode intsram configration
For some reason, setting the "shareable" bit makes the SRAM not writable

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-04-12 23:20:18 -05:00
Xiang Xiao
3f9908f7d1 Remove the unnecessary math.h inclusion
or move from header file to source file since math.h doesn't always exist

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-12 22:58:23 -04:00
Anthony Merlino
2b46a0fdde stm32h7: Adds guards around stm32_iocompensation. 2021-04-12 15:08:52 -07:00
Anthony Merlino
a45b8cc17c stm32h7: Add support for IO compensation. 2021-04-12 15:08:52 -07:00
jturnsek
bbe875876d Modified FlexSPI driver 2021-04-12 17:22:14 -03:00
jturnsek
7453e76d98 FlexSPI NOR driver 2021-04-12 11:35:44 -03:00
raiden00pl
cf645fc9ba arch/arm/src/stm32/stm32_foc.c: add modifications to support STM32F1
- generalize DBGMCU for PWM timer
- use ADC common data only if coupled ADC present
- rename some ADC definitions that collide with stm32_adc.h
2021-04-11 03:52:21 -05:00
raiden00pl
021a89569d arch/arm/src/stm32: introduce DBGMCU IP core versions 2021-04-11 03:52:21 -05:00
raiden00pl
3caf26fe3e arch/arm/src/stm32/stm32_adc.c: support adc_inj_startconv also for STM32F1 2021-04-11 03:52:21 -05:00
Anthony Merlino
2aa2b7669f stm32f7 tickless: Fix handling of overflow for different width timers. 2021-04-10 23:38:16 -05:00
Anthony Merlino
f979dd72c1 stm32/stm32f7 tickless: Fix clearing and checking of interrupts. 2021-04-10 23:38:16 -05:00
Anthony Merlino
dd00c6427e stm32 tickless: Fixes printf warnings 2021-04-10 23:38:16 -05:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 08:39:54 -07:00
Alin Jerpelea
7424683d29 arch: lpc17xx_40xx: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:46:32 -05:00
Alin Jerpelea
6f5537eae2 arch: lpc2378: Fix for Mixed Case Identifier errors
Fix for Mixed Case Identifier errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:46:32 -05:00
Alin Jerpelea
eac1d28aae NuttX: Janne Rosberg: update licenses to Apache
Janne Rosberg has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Ivan Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
a2813b142f NuttX: Jose Pablo Carballo: update licenses to Apache
Jose Pablo Carballo has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
231b8518b7 NuttX: Ken Pettit: update licenses to Apache
Ken Pettit has submitted the ICLA and we can migrate the licenses
 to Apache.

Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Anthony Merlino
d37275f348 stm32f7: Freeze tickless timer during debug halt. 2021-04-08 23:38:00 -05:00
Alin Jerpelea
e1d8b62209 arch: lpc43xx: spifilib_fam_standard_cmd.c: fix nxstyle errors
fix errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:49:09 -05:00
Alin Jerpelea
42d17dcaf4 arch: lpc43xx: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle tool.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
602d384325 arch: tms570: fix Mixed Case Identifier
Fix Mixed Case Identifier reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
37b314f29f LICENSE: add 3rd party license for Texas Instruments Incorporated
Add 3rd party licenses for Texas Instruments Incorporated to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
12aebdf1a6 LICENSE: add 3rd party license for Infineon Technologies AG
Add 3rd party licenses for Infineon Technologies AG to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
8dcd16d5a6 arch: arm: nxstyle fixes
Fixes for nxstyle warnigs

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
d2e7ea05c6 NuttX: typo fix
Yype fix for Public Functions reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Gregory Nutt
a9e2195e65 Remove unused 'running' field from freerun lower half drivers.
That field is never used and, in most cases, is never initialized correctly.

This should have no impact to anything with the possible exception of free-running drivers.

Verified using CI builds only.
2021-04-07 20:35:50 -03:00
Alin Jerpelea
abdc60e72f arch: samXX: Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
9be2db897d arch: sam: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
74cde4f9bf arch: armv7-r: Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
68cd957c62 arch: armv7-r: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
ce08e0ca6c arch: armv7-a: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Xiang Xiao
bfbe705e3f arch/arm: Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Xiang Xiao
eeb8931c04 arch/arm: align arm vector related code with armv7-a
commit 3c30c8b90b
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Tue Apr 6 15:47:27 2021 +0800

    arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp

    to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Xiang Xiao
0779f34390 arch/arm: Add PSR_ prefix to the mode state like armv7-a
no real function change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Anthony Merlino
01fabe6c67 stm32h7: Actually use the AXI SRAM as the main heap as the documentation describes.
The comments at the top of the file say this:
```
This will be automatically registered
 * - AXI SRAM is a 512kb memory area. This will be automatically registered
 *      with the system heap in up_allocate_heap, all the other memory
 *      regions will be registered in arm_addregion().
```

but the implementation was using SRAM123 instead. Furthermore, arm_addregion then re-adds SRAM123 again.
2021-04-06 22:47:20 -05:00
Anthony Merlino
d69cd4ba03 stm32h7: Adds stm32_dbgmcu.h to match stm32f7 port. 2021-04-06 22:44:07 -05:00
Anthony Merlino
3a10f88bdf stm32h7: Fixes bug in stm32_sdmmc.c where DCACHE guards were blocking a needed variable. 2021-04-06 22:43:27 -05:00
Anthony Merlino
068e71d0c6 stm32h7: Expose flash lock, unlock, and write protect functions to boards. 2021-04-06 22:42:52 -05:00
Anthony Merlino
8c73ea68d6 stm32f7: Remove the one and only reference to STM32_BOARD_HCLK. 2021-04-06 22:42:06 -05:00
Xiang Xiao
a7f7796db1 arch/arm: Change all spsr_cxsf to spsr
unify the SPSR register usage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 06:44:37 +09:00
Alin Jerpelea
72041911ce NuttX: Marco Krahl: update licenses to Apache
Marco Krahl has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt, S.A has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-06 12:50:41 -05:00
Xiang Xiao
3c30c8b90b arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp
to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 22:45:51 +09:00
Xiang Xiao
822bb3ff78 arch/armv7-r: Add FIQ stack CONFIG_ARCH_INTERRUPTSTACK > 7
just like what has done on armv7-a

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 22:45:51 +09:00
Fotis Panagiotopoulos
1dee243e29 syslog: Added multi device support in syslog_device. 2021-04-06 07:32:23 -05:00
Xiang Xiao
7d3266461b arch/armv7-a: Remove the special process of the nest level
it shouldn't need anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 17:07:46 +09:00
Anthony Merlino
b21cb3308a Fixes race condition in event wait logic of SDMMC driver.
This change makes it so that the timeout is set as part of the SDIO_WAITENABLE call instead of the SDIO_EVENTWAIT call. By doing so, you eliminate all opportunity for a race condition.

stm32h7:sdmmc Check if busy ended early
2021-04-05 23:08:45 -05:00
Xiang Xiao
807d4490da arch/arm: Minor style fix
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 13:19:20 -07:00
Xiang Xiao
39fc9325cf arch/arm: Replace "b lr" or "mov pc, lr" with "bx lr"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:50:14 -07:00
Xiang Xiao
be50a24e3d arch/arm: Clear .bss section after copying .data section
to avoid batch copy(32 bytes) overwrite the zeroed .bss section

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:48:20 -07:00
Xiang Xiao
d1e06b4c09 arch/arm: Call arm_lowputc after SP setup
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:48:20 -07:00
Xiang Xiao
e91a737310 arch/arm: Remove .cpu directive from assemble file
1.To support the different MCU in series(e.g. cortex-m0+)
2.It's redundant since we already specify in compliler option

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:29:42 -07:00
Xiang Xiao
b7ad0b3d0d arch/armv6-m: Remove cpsid and cpsie from exception_common
since the hardware do the action automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:26:49 -07:00
Xiang Xiao
3cf070e173 arch/armv8-m: Merge ite instruction to the previous one
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:26:07 -07:00
Xiang Xiao
d62ae03bf8 arch: Move setjmp/longjmp to libc/machine
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 16:30:37 -07:00
Nathan Hartman
92c61058c1 arch/stm32h7: Fix syntax error
arch/arm/src/stm32h7/stm32_dma.c:

     * stm32_bdma_residual(): Fix missing semicolon.
2021-04-04 22:32:09 +01:00
Xiang Xiao
e7dffdf06f arch/arm: Replace the hardcode syscall number with macro
and change SYS_context_[save|restore] to SYS_[save|restore]_context

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 16:18:10 -03:00