The current context save implementation saves registers of each task
to xcp context, which is unnecessary because most of the arm registers are
already saved in the task stack, this commit replace the xcp context with
stack context to improve context switching performance and reduce the tcb
space occupation of tcb instance.
Signed-off-by: chao.an <anchao@xiaomi.com>
After check the official specification of ARM ISA
and Thumb ISA, the arch_setjmp_thumb.S are written
by arm unified assembly language,
so it easy to make it works for ARM and thumb ISA.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
by fixing filter initialization.
STM32F7 CAN3 works in single peripheral configuration and there is only 14 filter banks: 0-13. Previously not available 14 indexed filter (CAN_NFILTERS/2) was wrongly used for for receiving to FIFO. Now zero indexed filter is correctly used instead.
Summary:
- I noticed that when exiting getprime, DEBUGASSERT happens in
nxsem_wait()
- Finally, I found that up_putc() uses nxsem_wait()
- This commit fixes this issue by removing the semaphore.
- Also, up_putc() now calls imx_lowputc()
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh (not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
arm: Avoid call k[u]mm_memalign to save the code size
ceva: Correct stack_base_ptr usage(top of stack v.s. bottom of stack)
mips: Correct the stack alignment in up_use_stack
misoc: Correct the stack alignment in up_use_stack
or1k: Correct the stack alignment in up_use_stack
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Summary:
- This commit adds thumb support to i.MX6
- Also, applies the same coding style to arch_elf.c
Impact:
- i.MX6 only
Testing:
- Tested with sabre-6quad:smp (QEMU, Dev board)
- Tested with sabre-6quad:netnsh (QEMU)
- Tested with sabre-6quad:netknsh (QEMU, not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
arch/arm/src/efm32/efm32_start.c:
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segments.
*/
#ifdef CONFIG_NUTTX_KERNEL
efm32_userspace();
showprogress('E');
#endif
But there is no CONFIG_NUTTX_KERNEL configuration setting. Comparing this to other architectures it is clear this should be
#ifdef CONFIG_BUILD_PROTECTED
here is the reason:
1.clock_systime_timespec(core function) always exist regardless the setting
2.CLOCK_MONOTONIC is a foundamental clock type required by many places
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.
This PR cleans up the logic so they're only listed once.
## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!
## Testing
CI will test all build
Summary:
- I noticed that pthread always crashes when started
if CONFIG_BUILD_KERNEL=y
- This commit fixes this issue
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh (not merged yet)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
State of problem:
- Some drivers that do not support write operations (does not
have write handler or ioctl do not perform any write actions)
are registered with write permissions
- Some drivers that do not support read operation (does not
have read handler or ioctl do not perform any read actions)
are registered with read permissions
- Some drivers are registered with execute permissions
Solution:
- Iterate code where register_driver() is used and change 'mode'
parameter to reflect the actual read/write operations executed
by a driver
- Remove execute permissions from 'mode' parameter
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
commit 328374f4658d11655f268f968f4c6c7a3942f320
changed the wait to use usleep. This killed the
write performace from the published values in the
datasheet of ~100 us to 2 mS per 256 bits. On
a 1000 per tick config. It can be 10 X worse
on the default 100 per tick config.
This changes uses up_udelay.
Architecture support for STMicroelectronics STMU585xx MCUs. This is
based on corresponding code for STM32L5, but has been considerably
adjusted. Tested with a B-U585I-IOT02A board and a simple NSH
configuration, but only running NuttX in the non-secure world with
TrustedFirmware-M.
Signed-off-by: Michael Jung <mijung@gmx.net>
This commit adds initial support for PWM driver to SAM MCU series.
Only general PWM on PWMH output is currently supported, complementary
output on PWML is not allowed. The current state of the driver also does
not support external triggering of other perihperals.
Multichannel option is supported. The functionality of the driver was
tested on an example pwm application and with a real time control system.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This change fix the regression that was introduced with
https://github.com/apache/incubator-nuttx/pull/4904
In case if D-Cache in configured in Write-Through mode there is
Cortex-M7 erata 1313001 that describes a situation when linefill
buffer or cache contains stale data. Even if progmem write loop
does not fully matches the description there is a possibility
to program stale data if there is no DMB instruction after each
write operation to progmem latch buffer.
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
current implementation incorrectly update CURRENT_REGS to interrupt context if
trigger nested interrupt, (e.g, hard fault occurs during interrupt handling)
this would ambiguous for programs using CURRENT_REGS, this patch will prohibit
the update of CURRENT_REGS on nested interrupt handling
Signed-off-by: chao.an <anchao@xiaomi.com>
Summary:
- I noticed that make export does not work with swama5d4-ek:knsh
- This commit fixes this issue.
- NOTE: apps/Makefile also needs to be updated.
Impact:
- CONFIG_BUILD_KERNEL=y only
Testing:
- Build (make and make export) with sama5d4-ek:knsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Commit 5d1a444812 replaced __attribute__
((unused)) with unused_code but two instances of __attribute__ ((used))
were also incorrectly replaced. Add used_code/used_data and used them
instead.
Some toolchains may be built without libm support, but using
such toochain should not generate any errors in case if math
functions are not used in the program
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
There are two issues that are addressed with this change:
- According to SAM E70/S70/V70/V71 Family datasheet the
timer counter channels are 16-bit so timer counter
value should be changed from uint32_t to uint16_t
- The interrupt handling for timer counter channels can
be simplified
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.
Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
For FAT the same buffer is used for read and writes, there
is a possibility a cache line is dirty. But the fs is
not dirty and will not write the sector to disk. This can
be seen https://github.com/PX4/NuttX/pull/175
When the system is busy that cache line can be evicted after the
RX DMA has completed and overwrite the data in memory. The solution
is to invalidate before the DMA to prevent an evection causing an
overwite, and after the DMA it to insure coherency.
Current samv7 platform does not define SoC memories sizes. This define
both internal flash and sram memories sizes and update all defconfig
files.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
When it was in slow speed mode (by default), the output SDMMC_CK clock rise and
fall times were about 13 ns each, that were very slow and
prevented some SDIO devices from working.
This commit enables the MCAN driver to function with both rev A and rev B
version of the chip. The version of the chip is selected automtically from
SAM_CHIPID_CIDR register so there is no need to predefined it in the
configuration.
The functonality was tested on rev B version of the chip. The rev A was
not tested since I do not have the functional board but the code remains
the same as in the previous NuttX version so it should not cause any
additional troubles.
The code is co-authored by Miloš Pokorný who wrote the initial transition
to rev B of the chip.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Co-authored-by: Miloš Pokorný <milos.pokorny@seznam.cz>
Summary:
- This commit replaces the critical section with spinlock
- The logic is the same as cxd56_serial.c
Impact:
- None
Testing:
- Tested with lc823450-xgevk:bt
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2.fix some files to fix compile warning
3.remove blueteeth header files, which are not used in nuttx core.
4.fix configs and add lost files
5.update defconfig, remove useless items
6.fix compile warning for nuttx phyplus
7.delete useless: ble, h4, zblue defconfig files form phyplus configure folder
8.fix file format check error on phyplus source code
9.fix phyplus kconfig param error
10.update configure file for nuttx
The Atmel samv7 implements progmem functionality. However, there is
missing ARCH_HAVE_PROGMEM Kconfig symbol. This add missing symbol.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit adds DMA and TC support to SAMV7 AFEC driver. The AFEC (ADC)
can now be triggered by Timer/counter at chosen frewuency and samples can
be transfered via DMA with configurable number of samples. Timer/counter
trigger is now set as a default option with the possibility to change it
to software generated trigger.
DMA is inspired by SAMA5 driver and also uses ping pong buffers.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Just a minor change fixing some compile warnings and errros, does not have
any impact on functionality.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
The FAT was not coherent. Resulting in a write failed
with errno:28 No space left on device.
It is unclear how the memory is acesses prior to the DMA
completion. But this restructuring ensures the data
is coherent.
This issue was not detected on the stm32h7
Gregory Nutt has submitted the SGA
Haltian Ltd has submitted the SGA
Uros Platise has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
When enable DEBUG_TCBINFO config, a global struct will
provide, then debuggers can aware nuttx task infomation.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
This commit adds microcontroller support for Analog Front End driver to
samv7 MCUs. Only software trigger via IOCTL is currently supported,
averaging can be set by configuration option CONFIG_SAMV7_AFECn_RES.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Strongly-Ordered requires aligned access unless
caching is enabled.
Normal memory
Accesses to normal memory region are idempotent...
- unaligned accesses can be supported
With CONFIG_ARMV7M_DCACHE the cache maintenance operation
are not present. Or if CONFIG_ARMV7M_DCACHE_WRITETHROUGH
is on then buffering operations are no-ops.
This change enables MPU_RASR_C and MPU_RASR_B if
CONFIG_ARMV7M_DCACHE is only set.
if CONFIG_ARMV7M_DCACHE_WRITETHROUGH is set then only
MPU_RASR_C is enabled.
N.B When caching is disalbed unaligned access may cause hard faults
so add -mno-unaligned-access
It is always safe to enable Buffering in FLASH to achive unaligned
access leniency, as it is not written to.
the SDIO clock is not enabled when the bus goes to the idle state, that, in turn, breaks
IRQ delivering mechanism over DAT[1]/IRQ SDIO line to the host.
This reverts commit d9a5b92c1a306a70df52d50a02a80dc8ef20bf0d.
Revert "arch/arm: Remove -march and -mtune"
This reverts commit b8e99cf12f3a287311a2d341f285c71a5da3e4d4.
This commit adds new files that support functionality of QSPI driver in
SPI Master Mode. This functionality is included in new files sam_qspi_spi.x
to avoid too much mess in the source code. QSPI in SPI mode can be turn
on by config option SAMV7_QSPI_SPI_MODE.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
When NuttX is booted from a foreign (non NuttX)
bootloader. There as a possibility that the
bootloader configured the MPU, in an
incompatible way for the NuttX memory usage.
The option to reset the MPU before it is initialized
may not succeed if the bss and data initialization
code violated the previous MPU configurations.
Added herein are ARM_MPU_RESET and
ARM_MPU_EARLY_RESET. The former can be used
If the system is capable of booting and running
NuttX MPU configuration code without an MPU
violation. The latter is used if the system can
not run the bss and data initialization code.
These are options so that a NuttX may be configured to
not clobber a bootloader MPU configuration in a system
that is architected to share the MPU configuration task.
This commit adds header file imxrt_adc_etc.h for external ADC trigger
module. This contains only definitions of ADC_ETC registers and separate
bits, implementation of ADC_ETC driver is yet to be done.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request. In this case the
DEBUGASSERT will trigger. We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
