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1934 Commits

Author SHA1 Message Date
Gregory Nutt
989195cec8 STM32 Ethernet: Last patch breaks every board that does not use the KSZ80801 PHY. 2017-05-17 15:36:57 -06:00
Gregory Nutt
aac3a3df8e STM32 Ethernet: Should not stm32_phyintenable() return a failure if it could not enable the PHY interrupt? 2017-05-17 10:07:09 -06:00
Sebastien Lorquet
2c6ea23aee STM32 Ethernet: Add support for KSZ8081 PHY interrupts. 2017-05-17 10:04:49 -06:00
Jussi Kivilinna
9169ff6a15 stm32_serial: fix freezing serial port. Serial interrupt enable/disable functions do not disable interrupts and can freeze device when serial interrupt is received while execution is at those functions. 
Trivially triggered with two or more threads write to regular syslog stream and to emergency stream. In this case, freeze happens because of mismatch of priv->ie (TXEIE == 0) and actually enabled interrupts in USART registers (TXEIE == 1), which leads to unhandled TXE interrupt
and causes interrupt storm for USART.
 2017-05-17 06:50:46 -06:00
Lederhilger Martin
b8e7d5c455 I had the problem that the transmit FIFO size (= actual elements in FIFO) was slowly increasing over time, and was full after a few hours. 
The reason was that the code hit the line "canerr("ERROR: No available mailbox\n");" in stm32_cansend, so can_xmit thinks it has sent the packet to the hardware, but actually has not. Therefore the transmit interrupt never happens which would call can_txdone, and so the size of the FIFO size does not decrease.

The reason why the code actually hit the mentioned line above, is because stm32can_txready uses a different (incomplete) condition than stm32can_send to determine if the mailbox can be used for sending, and thus can_xmit forwards the packet to stm32can_send. stm32can_txready considered mailboxes OK for sending if the mailbox was empty, but did not consider that mailboxes may not yet be used if the request completed bit is set - stm32can_txinterrupt has to process these mailboxes first.

Note that I have also modified stm32can_txinterrupt - I removed the if condition, because the CAN controller retries to send the packet until it succeeds. Also if the condition would not evaluate to true, can_txdone would not be called and the FIFO size would not decrease also.
 2017-05-16 07:47:18 -06:00
Gwenhael Goavec-Merou
02535be36a STM32F410. Add support for STM32Fr10. STM32F410 is a version of STM32F4 with 32 KB of RAM and 62 or 128 KB of flash. 2017-05-13 08:40:09 -06:00
Alan Carvalho de Assis
853d332b6c Move CAN subsystem to its own directory and put device drivers there 
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
 2017-05-12 11:48:47 -03:00
Gregory Nutt
0de294a586 Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they. 2017-05-11 13:35:56 -06:00
David Sidrane
014b69e120 removed stray paren. 2017-05-08 22:56:05 +00:00
David Sidrane
8406b40baa Merged in david_s5/nuttx-16/david_s5/stm32serial-dma-buffer-round-off-not-up-1494258804216 (pull request #357) 
stm32:Serial DMA buffer round off not up

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-05-08 20:32:44 +00:00
Gregory Nutt
aa11d637a8 STM32 TIM: Add method to get timer width. Freerun timer: Use timer width to get the correct clock rollover point. 2017-05-08 12:33:15 -06:00
David Sidrane
546e7acb99 stm32:Serial DMA buffer round off not up 2017-05-08 15:54:03 +00:00
David Sidrane
b8ef079951 stm32:stm32_serial Forgot the -1 on mask 2017-05-08 03:43:36 +00:00
David Sidrane
b62ef579c8 stm32: serial Allow configuring Rx DMA buffer size 2017-05-06 05:16:21 -10:00
Gregory Nutt
b0e880b04c Revert "STM32 I2C: More backward tests of CONFIG_I2C_POLLED. Needs to be reviewed." 
This reverts commit 1e054a2d3b.
 2017-05-03 18:26:24 -06:00
Gregory Nutt
11c14470c3 Merge remote-tracking branch 'origin/master' into photon 2017-05-03 17:36:52 -06:00
Gregory Nutt
1e054a2d3b STM32 I2C: More backward tests of CONFIG_I2C_POLLED. Needs to be reviewed. 2017-05-03 17:33:35 -06:00
David Sidrane
9b5ac56409 Fixed typo and backward ifdef 2017-05-03 23:10:48 +00:00
Gregory Nutt
e94865a317 Merge remote-tracking branch 'origin/master' into photon 2017-05-02 08:49:19 -06:00
Mateusz Szafoni
1feaae7222 Merged in raiden00/nuttx (pull request #338) 
OPAMP support for STM32F33XX
 2017-05-02 13:57:56 +00:00
Gregory Nutt
e43b86dbd0 Merge remote-tracking branch 'origin/master' into photon 2017-04-30 17:42:37 -06:00
Gregory Nutt
0597eb5587 Fix a typo introduced in last commit. 2017-04-30 12:41:19 -06:00
Gregory Nutt
c172d7cf63 EFM32, STM32, and STM32 F7 I2C: Update to use the standard parameter passing to interrupt handlers. 2017-04-30 11:56:06 -06:00
raiden00pl
e4d47d61cc STM32F33: Add OPAMP support 2017-04-30 11:05:34 +02:00
Gregory Nutt
a7901f5c4c Merge remote-tracking branch 'origin/master' into photon 2017-04-29 12:35:01 -06:00
Gregory Nutt
f175af3cd3 More missed enum spi_dev_e forward references. 2017-04-29 08:29:01 -06:00
Sebastien Lorquet
c56c6f7ccc ARM arch changes 2017-04-28 18:23:29 +02:00
Juha Niskanen
707d1e67fc STM32, STM32F7, STM32L4: Remove incorrect comment about STM32L1 LSE/RTC/LCD 2017-04-27 07:18:36 -06:00
Simon Piriou
6bb2db8c15 bcmf: enable DMA for SDIO transfers 2017-04-26 17:23:53 +02:00
Simon Piriou
3bf5044306 stm32: cleanup stm32_sdio.c 2017-04-24 20:01:41 +02:00
Gregory Nutt
62966d915c Merge remote-tracking branch 'origin/master' into photon 2017-04-23 10:16:54 -06:00
Gregory Nutt
79256573e1 net: network drver now retains Ethernet MAC address in a union so that other link layer addresses may be used in a MULTILINK environment. 2017-04-22 11:10:30 -06:00
Gregory Nutt
d8e4cbcfd5 Merge remote-tracking branch 'spiriou/wlan_dev' into photon 2017-04-22 08:26:40 -06:00
Jussi Kivilinna
325ba1a803 clock: add clock_resynchronize and use subseconds RTC 
Add clock_resynchronize for better synchronization of CLOCK_REALTIME and CLOCK_MONOTONIC to match RTC after resume from low-power state.

Add up_rtc_getdatetime_with_subseconds under CONFIG_ARCH_HAVE_RTC_SUBSECONDS to allow initializing (and resynchronizing) system clock with subseconds accuracy RTC.
 2017-04-21 08:45:57 -06:00
Juha Niskanen
9d0ecedf7d Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h 2017-04-20 06:30:26 -06:00
Juha Niskanen
e631ee4582 STM32 L1: stm32l15xx_rcc: Allow board to configure HSE clock in bypass-mode. Allows using MCO output from ST-link chip (on Nucleo and Discovery boards) as HSE input. 2017-04-20 06:28:01 -06:00
David Sidrane
4844011b9c stm32:stm32_serial fixed warning 2017-04-18 11:51:56 -10:00
Gregory Nutt
04ebdbb336 Move: CONFIG_ADC_NO_START_CONV from drivers/adc/Kconfig to arch/arm/src/stm32[f7]/Kconfig as STM32[F7]_ADC_NO_START_CONV. Refresh all configurations with any reference to CONFIG_ADC_NO_START_CONV. 2017-04-18 07:16:35 -06:00
phreakuencies
eac049222c STM32: Provide TIM5 definition for STM32F429 2017-04-15 12:10:42 -06:00
Gregory Nutt
78bc1aa6bc Argument of network device IOCTL should be unsigned long, just as will all other IOCTL methods. 2017-04-15 09:33:27 -06:00
Simon Piriou
11d3db5c35 photon: add sdpcm + thread support for wlan 2017-04-15 11:39:13 +02:00
Alan Carvalho de Assis
a58823c449 STM32XX: Fix Pending Register definition 2017-04-11 06:45:45 -06:00
Gregory Nutt
ebd2416f9d stm32 COMP: Logic in stm32_comp.h must be configured on CONFIG_STM32_COMP or otherwise it causes an error via #error on every platform without COMP support. 2017-04-09 11:47:57 -06:00
Jussi Kivilinna
e3b3e57e56 RTC: add interface for check if RTC time has been set 
New interface allows checking if RTC time has been set.  This allows to application to detect if RTC has valid time (after
reset) or should application attempt to get real time by other means (for example, by launching ntpclient or GPS).
 2017-04-06 09:53:11 -06:00
Alan Carvalho de Assis
95941b4908 STM32: Fix SYSCFG_CFGR1_I2C_PBXFMP_SHIFT value 2017-04-06 08:35:33 -06:00
Simon Piriou
e5c4a28c3a photon: wlan support 2017-04-05 21:55:21 +02:00
Juha Niskanen
3e6b92d5fa tm32: stm32l15xxx_rcc: configure medium performance voltage range and zero wait-state when allowed by SYSCLK setting 
Zero wait-state for flash can be configured when:
 Range 1 and SYSCLK <= 16 Mhz
 Range 2 and SYSCLK <= 8 Mhz
 Range 3 and SYSCLK <= 4.2 Mhz

Medium performance voltage range (1.5V) can be configured when SYSCLK is up to 16 Mhz and PLLVCO up to 48 Mhz.
 2017-04-05 07:41:25 -06:00
Juha Niskanen
bff341fdfc stm32: stm32l15xx_rcc: add support for using MSI as system clock 2017-04-05 07:41:24 -06:00
Juha Niskanen
9a29b9a327 stm32: stm32_flash: add EEPROM writing for STM32L15XX 2017-04-04 07:38:49 -06:00
no1wudi
8fbd8b9e6f STM32:add I2C3 SDA pin mapping for STM32F411 2017-04-04 11:57:45 +08:00
no1wudi
730b674b01 STM32:add I2C3 SDA pin mapping for STM32F411 2017-04-04 11:50:58 +08:00
Juha Niskanen
3a6bd901e4 stm32: fix IWDG and WWDG debug mode stop for STM32L15XX 2017-04-03 07:45:09 -06:00
Gregory Nutt
fb42844788 STM32: Fix a comment 2017-04-02 12:32:20 -06:00
Gregory Nutt
7b789f57ac Review of previous commit 2017-03-30 12:28:40 -06:00
Konstantin Berezenko
95cbbf552b Change STM32 tickless to use only one timer 2017-03-30 10:40:05 -07:00
Juha Niskanen
5577f58458 STM32 RNG: Fix semaphore initial value and disable priority inheritance 2017-03-29 07:12:19 -06:00
Gregory Nutt
92da8068ed Merge branch 'master' of bitbucket.org:nuttx/nuttx 2017-03-26 06:57:35 -06:00
raiden00pl
f3367233b6 stm32_comp.c: typo 2017-03-26 09:36:53 +02:00
raiden00pl
c1090164f5 stm32/Kconfig: update COMP and OPAMP definitions 2017-03-26 09:34:17 +02:00
raiden00pl
6594c65a77 stm32_comp.c: cosmetic 2017-03-26 09:30:23 +02:00
Gregory Nutt
7d57a2b2bd Trivial changes from review of last PR. 2017-03-25 10:38:41 -06:00
raiden00pl
a806aedb13 STM32F33: Support for COMP character driver 2017-03-25 16:57:43 +01:00
Alexander Oryshchenko
61ff3c6b84 I needed to use DS3231, I remember that in past it worked ok, but now for stm32f4xx is used another driver (chip specific, stm32f40xxx_i2c.c) and DS3231 driver doesn't work. After investigating a problem I found that I2C driver (isr routine) has a few places there it sends stop bit even if not all messages are managed. So, e.g., removing stm32_i2c_sendstop (#1744) and adding stm32_i2c_sendstart after data reading helps to make DS3231 working. Verified by David Sidrane. 2017-03-24 06:44:33 -06:00
Aleksandr Vyhovanec
82a84a8d98 Merged nuttx/nuttx into master 2017-03-24 11:40:09 +03:00
no1wudi
4c6680df99 Merged in no1wudi/nuttx (pull request #291) 
fix compile error when disabled the flash data cache corruption for stm32 f1xx

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-03-24 00:58:26 +00:00
no1wudi
fd76a3db05 fix spacing 2017-03-24 08:52:46 +08:00
no1wudi
5797e84893 Merged nuttx/nuttx into master 2017-03-24 08:40:40 +08:00
David Sidrane
66910577be stm322_flash:missing unlock on F1 HSI off path 2017-03-23 14:22:45 -10:00
David Sidrane
7e3bec635b stm32_i2c_alt:Move def of regval to top func def per CS 2017-03-23 11:50:37 -10:00
David Sidrane
d25f8710d2 stm32f40xxx_i2c:Duplicate non CS dev of regval 2017-03-23 11:37:12 -10:00
David Sidrane
f5cf22d871 stm32_i2c_alt:Duplicate non CS dev of regval 2017-03-23 11:36:44 -10:00
David Sidrane
c2a1b719be stm32_flash:Need conditinal on non F4 targets 2017-03-23 11:33:32 -10:00
rg
9353ca6039 STM32 I2C: Do not allow CONFIG_I2C_POLLED and CONFIG_I2C_DMA 2017-03-23 11:24:18 -06:00
Aleksandr Vyhovanec
06af125e45 The interrupt occurs over the counter overflow 2017-03-23 17:34:45 +03:00
no1wudi
45f5d30e2e fix compile error when disabled the flash data cache corruption for stm32 f1xx 2017-03-23 13:38:26 +08:00
Gregory Nutt
3fb0a00c35 Small changes from review of last PR. Plus spacing and typo fix. 2017-03-22 17:32:52 -06:00
Gregory Nutt
947acd6c1a Small changes from review of last PR 2017-03-22 15:53:12 -06:00
José Roberto de Souza
b9b4f184a7 stm32: Add workaround for flash data cache corruption on read-while-write 
This is a know hardware issue on some STM32 see the errata of your model
and if you make use of both memory banks you should enable it.
 2017-03-22 13:14:19 -07:00
José Roberto de Souza
09f70c462d stm32: Make up_progmem thread safe 
Writing to a flash sector while starting the erase of other sector
have a undefined behavior so lets add a semaphore and syncronize
access to Flash registers.

But for the semaphore to work it needs to be initialized so each
board needs call stm32_flash_initialize() on initialization, so
to avoid runtime problems it is only using semaphore and making
it thread safe if initialized, after all boards starts to call
stm32_flash_initialize() we can remove the boolean and the check.
 2017-03-22 13:14:15 -07:00
José Roberto de Souza
80f56e75f9 stm32: Fix erase sector number for microcontrolers with more than 11 sectors 
Erase a sector from the second bank cause the bit 4 of SNB being set
but never unsed, so trying to erase a sector from the first bank
was acually eraseing a sector from the second bank.
 2017-03-22 12:42:20 -07:00
rg
82a5dfddb4 The attached .patch implements DMA support for the stm32f4 I2C. Max and I have verified that it works on our systems. 2017-03-21 16:44:11 -06:00
no1wudi
7d6ee0f222 fix a typo 2017-03-20 09:50:27 +08:00
Gregory Nutt
e8a30890f2 Cosmetic changes from review of last PR. 2017-03-19 13:05:31 -06:00
raiden00pl
651b8360c6 STM32F33: Add COMP support 2017-03-19 18:36:44 +01:00
raiden00pl
c760d00158 stm32f33xx_comp.h: fix typos 2017-03-19 18:27:31 +01:00
raiden00pl
fd42900dcc STM32F33: Add ADC support 2017-03-18 16:34:24 +01:00
raiden00pl
49e4e62aab STM32F33: Move DMA logic to a separate files 2017-03-18 16:31:06 +01:00
David Cabecinhas
08e92abb0b ARM: Remove redundant interrupt stack coloring 2017-03-16 19:13:39 +08:00
Simon Piriou
bf9391a1fe photon: porting wlan device 2017-03-14 21:13:36 +01:00
David Cabecinhas
86400a252d ARM: Fix off-by-one interrupt stack allocation in 8-byte aligned architectures 2017-03-14 20:01:45 +08:00
Gregory Nutt
4d33f26717 Update some comments 2017-03-12 12:33:44 -06:00
Gregory Nutt
d9cdb6c383 STM32; OTG host implementations of stm32_in_transfer() must obey the polling interval for the case of isochronous and itnerrupt endpoints. 2017-03-12 08:39:30 -06:00
Gregory Nutt
98a98a0c8b Minor change for consistency with a previous commit. 2017-03-12 07:20:10 -06:00
Gregory Nutt
9b11187b2a STM32 OTG HS: A little research reveals that only the F2 RCC initialization set the OTGHSULPIEN bit and Photon is the only F2 board configuration that uses OTG . Therefore, we can simplify the conditional logic of the last PR. Negative logic was used (#ifndef BOARD_DISABLE_USBOTG_HSULPI) to prevent bad settings in other configurations. But give these facts, the preferred positive logic now makes more sense (#ifdef BOARD_ENABLE_USBOTG_HSULPI). 2017-03-11 18:00:38 -06:00
Gregory Nutt
e0f7b9582a STM32: Review of last STM32 F2 PR. Progate changes to STM32 F4 and F7 OTGHS. Rename some configs/photon/src files. Naming can be either photon_ or stm32_ but must be consistent. 2017-03-11 16:31:11 -06:00
Simon Piriou
70d8f0189d stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag 2017-03-11 18:15:18 +01:00
Gregory Nutt
aadf6c6e16 STM32 F33: Fix another error in ADC base address usage. 2017-03-10 17:49:32 -06:00
Gregory Nutt
852b189910 STM32 F33 ADC: Correct bad definitions of base addresses; Fix naming collision by changing colliding STM32_ADC12_BASE to STM32_ADC12_CMN_BASE 2017-03-10 17:46:19 -06:00
Gregory Nutt
24816cb08b All STM32 host drivers. In IN endpoint retry, delay for a clock tick to give some breathing space for the CPU. EXPERIMENTAL change. 2017-03-10 10:25:43 -06:00
David Sidrane
acaebb361b STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers. 
Save elapsed time before handling I2C in stm32_i2c_sem_waitstop()
   This patch follows the same logic as in previous fix to
   stm32_i2c_sem_waitdone().
   It is possible that a context switch occurs after I2C registers are read
   but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
   possible that the registers were read only once with "elapsed time"
   equal 0. When scheduler resumes this thread it is quite possible that
   now "elapsed time" will be well above timeout threshold. In that case
   the function returns and reports a timeout, even though the registers
   were not read "recently".
   Fix this by inverting the order of operations in the loop - save elapsed
   time before reading registers. This way a context switch anywhere in the
   loop will not cause an erroneous "timeout" error.
 2017-03-10 05:07:39 -10:00
Freddie Chopin
3cd66af889 ave elapsed time before handling I2C in stm32_i2c_sem_waitstop() 
This patch follows the same logic as in previous fix to
stm32_i2c_sem_waitdone().

It is possible that a context switch occurs after I2C registers are read
but before elapsed time is saved in stm32_i2c_sem_waitstop(). It is then
possible that the registers were read only once with "elapsed time"
equal 0. When scheduler resumes this thread it is quite possible that
now "elapsed time" will be well above timeout threshold. In that case
the function returns and reports a timeout, even though the registers
were not read "recently".

Fix this by inverting the order of operations in the loop - save elapsed
time before reading registers. This way a context switch anywhere in the
loop will not cause an erroneous "timeout" error.
 2017-03-10 07:35:10 -06:00
Gregory Nutt
9cd3f7f80a STM32, STM32 F7, STM32 L4: OTG host drivers: Do not do data toggle if interrupt transfer is NAKed. Sugested by webbbn@gmail.com 2017-03-09 15:07:31 -06:00
Simon Piriou
6768831851 Merged in spiriou/nuttx (pull request #257) 
STM32F2: add USB OTG HS support for stm32f20xxx cores

Approved-by: Gregory Nutt
 2017-03-09 20:06:12 +00:00
Gregory Nutt
04297d1b0f Update some comments 2017-03-09 13:57:37 -06:00
Gregory Nutt
a3b4475474 STM32, STM32 F7, and STM32 L4: Back out part of 3331e9c49a. Returning immediately int he case of a NAK makes the Mass Storage Class driver unreliable. The retry/timeout logic is necessary. This implementation tries to implement a compromise: If a NAK is received after some data is received, then the partial data received is returned as with 3331e9c49a. If if a NAK is received with no data, then no longer returns the NAK error immediately but retries until data is received or a timeout occurs. Initial testing indicates that this fixes the issues the MSC. However, I hae concerns that if multiple sectors are read in one transfer, there could be NAKs between sectors as well and, in that case, then change will still cause failures. 2017-03-09 13:49:25 -06:00
Simon Piriou
31aef4a9c0 STM32F2: add USB OTG HS support for stm32f20xxx cores 2017-03-09 20:30:32 +01:00
Gregory Nutt
ee5ae3a57d STM32, STM32 F7, and STM32 L4: Clone Freddie Chopin's I2C change to similar STM32 I2C drivers. 2017-03-09 07:37:52 -06:00
Freddie Chopin
5a6d95dd9f ave elapsed time before handling I2C in stm32_i2c_sem_waitdone() 
It is possible that a context switch occurs after stm32_i2c_isr() call
but before elapsed time is saved in stm32_i2c_sem_waitdone(). It is then
possible that the handling code was executed only once with "elapsed
time" equal 0. When scheduler resumes this thread it is quite possible
that now "elapsed time" will be well above timeout threshold. In that
case the function returns and reports a timeout, even though the
handling code was not executed "recently".

Fix this by inverting the order of operations in the loop - save elapsed
time before handling I2C. This way a context switch anywhere in the loop
will not cause an erroneous "timeout" error.
 2017-03-09 07:29:12 -06:00
Gregory Nutt
0631c1aafa STM32 OTGFS, STM32 L4 and F7: Adapt Janne Rosberg's patch to STM32 OTGHS host to OTGFS host, and to similar implements for L4 and F7. 2017-03-07 07:17:24 -06:00
Janne Rosberg
3331e9c49a STM32 OTGHS host: stm32_in_transfer() fails and returns NAK if a short transfer is received. This causes problems from class drivers like CDC/ACM where short packets are expected. In those protocols, any transfer may be terminated by sending short or NUL packet. 2017-03-07 06:58:59 -06:00
Gregory Nutt
d3408809e4 sendfile(): Fix error introduced with commit ff73be870e. Noted by Maciej Wójcik 2017-03-05 11:50:34 -06:00
raiden00pl
e9884216c5 stm32f33xxx: Add HRTIM header file 2017-03-05 18:10:59 +01:00
raiden00pl
46d62b1e09 stm32f33xxx: Add ADC header file 2017-03-04 19:40:14 +01:00
raiden00pl
b866ea0dd0 stm32f33xxx_memorymap.h: Add COMP and OPAMP base adress 2017-03-04 19:36:56 +01:00
raiden00pl
a14ed630e8 stm32f33xxx: Add COMP header file 2017-03-04 19:35:17 +01:00
raiden00pl
da3dd1d69c stm32f33xxx: Add OPAMP header file 2017-03-04 19:32:50 +01:00
raiden00pl
3e3a13b4b0 stm32f33xxx: Add DAC header file 2017-03-04 19:30:08 +01:00
raiden00pl
71b0127bc1 chip/stm32_dac.h: fix typo 2017-03-04 19:23:33 +01:00
Gregory Nutt
7bb19ad8bc STM32 Ethernet: Remove unused variable warning. 2017-03-03 15:24:00 -06:00
Gregory Nutt
86239d4a73 Experimental change to STM32 Ethernet driver a success. Porting change to all other Ethernet drivers. 2017-03-03 14:45:09 -06:00
Gregory Nutt
f4bad1a280 stm32_gpiosetevent: GPIO IRQ logic no longer returns the xcpt_t oldhandler. This value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 16:34:37 -06:00
Gregory Nutt
c7943586d8 STM32 Ethernet: Need two work structures so that pending poll work is not lost when an interrupt occurs. 2017-03-02 11:40:12 -06:00
Gregory Nutt
28d3344ac2 STM32/F7/L4: EXTI ALARM function no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 09:18:10 -06:00
Gregory Nutt
d5e04a8c43 STM3 L4: EXTI COMP function no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 09:03:12 -06:00
Gregory Nutt
89058172f1 STM32/F7/L4: EXOT PVD function no longer returns the xcpt_t oldhandler. There value is useless and dangerous after the recent changes to interrupt argument passing. 2017-03-02 08:56:31 -06:00
Gregory Nutt
094795e0ed Review parameter usage in sigtimedwait(); update some comments. 2017-03-02 06:39:05 -06:00
Mark Schulte
df0a05c682 Fix function signature for irq handler 2017-03-01 08:54:16 -06:00
Mark Schulte
4761a7d816 Add argument to timer irq callback 2017-03-01 08:49:14 -06:00
Mark Schulte
27c3c2605c Add argument to capture irq callback 2017-03-01 08:45:27 -06:00
Gregory Nutt
5987db47e5 Changes from review of last PR 2017-02-28 18:42:21 -06:00
Gregory Nutt
ac6e552ff7 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:37:44 -06:00
Gregory Nutt
02b1e1ec1a Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:22:57 -06:00
Gregory Nutt
095411859e Fix another old interrupt handler function prototype 2017-02-28 14:00:31 -06:00
Gregory Nutt
ac7307cca0 Trivial, cosmetic changes from review. 2017-02-28 11:11:11 -06:00
David Sidrane
d75dfcfb4b Merged in david_s5/nuttx/upstream_irqfixes (pull request #227) 
STM32 irqfixes found in build testing

Approved-by: Gregory Nutt
 2017-02-28 17:08:21 +00:00
David Sidrane
c8ac29574b STM32:stm32_wwd Fixed irq interface 2017-02-28 07:04:47 -10:00
David Sidrane
6443aec36b STM32:stm32_sdio Fixed irq interface 2017-02-28 07:04:34 -10:00
Gregory Nutt
17af125390 STM32 Serial: Convert to use new interrupt argument interface. 2017-02-28 10:54:31 -06:00
Gregory Nutt
dc93340a01 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:29:09 -06:00
Gregory Nutt
370e188fa3 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:05:01 -06:00
Gregory Nutt
7d24f45c7e STM32 1wire: Convert to use new interrupt argument infrastructure. 2017-02-28 08:39:02 -06:00
Gregory Nutt
c62180732e Adapt more drivers to utilize the IRQ argument feature. 2017-02-28 07:19:55 -06:00
Gregory Nutt
704df7bd39 IRQ arguments: Fix errors discovered in build testing 2017-02-27 19:28:24 -06:00
Gregory Nutt
80dba27434 Fix copy past type: xcptr_t -> xcpt_t 2017-02-27 15:00:42 -06:00
Gregory Nutt
2ef4433220 Missing interrupt argument parameter. 2017-02-27 14:53:37 -06:00
Gregory Nutt
44abbe60aa Fix typo in name of callback field. 2017-02-27 14:51:29 -06:00
Gregory Nutt
aa8d4422a5 Fix some mismatched function prototypes 2017-02-27 14:43:10 -06:00
Gregory Nutt
67de2e5f66 Add argument to STM32 EXTI interrupt handlers. 2017-02-27 14:21:30 -06:00
Gregory Nutt
6a3add7230 STM32 TIM: Correct function prototype. 2017-02-27 11:03:10 -06:00
Gregory Nutt
a581e9206d Convert remaining serial drivers to use use irq_attach. 2017-02-27 10:27:14 -06:00
Gregory Nutt
e5be4f7fe2 Merge remote-tracking branch 'origin/master' into irqattach 2017-02-27 09:13:41 -06:00
Gregory Nutt
b651e73057 STM32: Fix mismatched prototype 2017-02-27 08:18:37 -06:00
Gregory Nutt
2e30b9b252 More missing argument paramters in interrupt handlers. 2017-02-27 07:46:36 -06:00
Mark Schulte
b3222bbc8a irq_dispatch: Add argument pointer to irq_dispatch 
Provide a user defined callback context for irq's, such that when
registering a callback users can provide a pointer that will get
passed back when the isr is called.
 2017-02-27 06:27:56 -06:00
Gregory Nutt
433ed93aa0 Add some comments. 2017-02-27 06:25:31 -06:00
Gregory Nutt
2e0ffc0ea3 Update some comments. 2017-02-26 09:15:57 -06:00
raiden00pl
3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00
Gregory Nutt
b6f5b77f2c Add C files that reference ANIOC_TRIGGER now need to include nuttx/analog/ioctl.h 2017-02-25 15:54:10 -06:00
Gregory Nutt
de0e2ec261 STM32: Remove one residual use of the obsoleted STM32_TIM27_FREQUENCY definition which does not work for all STM32 family members. 2017-02-25 10:04:28 -06:00
Gregory Nutt
4c6b635298 Fix error in previous commit. 2017-02-25 09:39:33 -06:00
Gregory Nutt
c694ca0ebc Enable clocking to the timer on QE setup; disable clock on QE teardown. 2017-02-25 09:26:11 -06:00
Alan Carvalho de Assis
37298504e6 Fix QEncoder driver, based on STM32L4 driver 2017-02-24 16:10:28 -06:00
Gregory Nutt
8ee2e8d8b0 Most Ethernet drviers: Check if the poll timer is running before restarting it at the end of each TX. 2017-02-24 15:58:17 -06:00
Gregory Nutt
3329a534f7 Remove spurious blank line. 2017-02-09 13:06:42 -06:00
David Sidrane
169b3982a2 STM32: Fixes the bkp reference counter issue 2017-02-09 08:39:51 -10:00
Gregory Nutt
62a1f6f110 up_timer_initialize() is named incorrectly. The prefix should be the architecture name, not up_ since it is private to the architecture. up_timerisr() is similarly misnamed and should also be private since it is used only with the xyz_timerisr.c files. Also updat TODO list. 2017-02-07 10:35:04 -06:00
Gregory Nutt
54ce3817a5 SDIO interface: Handle all possible DMA combinations in all SDIO drivers. 2017-02-07 07:15:29 -06:00
David Sidrane
9066b4c093 stm32_sdio.c edited online with Bitbucket 2017-01-31 18:01:40 +00:00
Gregory Nutt
3dbdb3bb31 CONFIG_SDIO_DMA: Was been defined in several low-level architecute Kconfig files, but used at the highest levels in the code. Both are bad and both are fixed with this commit 2017-01-31 11:52:00 -06:00
Gregory Nutt
2a4791f4ee Removed dmasupported() method from the SDIO interface. That is now a bit in the cpapability set. 2017-01-31 09:51:15 -06:00
Gregory Nutt
9ac00a355f Add capabilities() method to SDIO interface. Remove CONFIG_SDIO_WIDTH_D1_ONLY. That should not be a global propertie, but rather a capability/limitation of single slot when there may be multiple slots. 2017-01-31 09:16:01 -06:00
Gregory Nutt
f40a0311f5 Merged in david_s5/nuttx/upstream_2_greg_f3_bkp (pull request #200) 
Add missing STM32_BKP_BASE
 2017-01-23 23:42:33 +00:00
David Sidrane
02825f3db0 Add missing STM32_BKP_BASE 2017-01-23 13:38:57 -10:00
Gregory Nutt
4a8c6a6d2d ELF: Move ARMv6-M, ARMv7-M, and legacy ARM versions of ELF relocation logic to libc/machine 2017-01-21 15:24:25 -06:00
Gregory Nutt
be5ba90d4f Move optimized ARM memcpy functions from arch/arm/src/ to libc/machine/. This is necessary for the PROTECTED and KERNEL build modes. Otherwise, memcpy() will be built in to kernel space and not accessible to applications. 2017-01-20 10:53:46 -06:00
Gregory Nutt
3c4684ef5f Eliminate CONFIG_ARCH_OPTIMIZED_FUNCTIONS. Move options to select architectur-specific C library options from libc/Kconfig to libc/machine/Kconfig and rename. 2017-01-20 09:30:07 -06:00
Gregory Nutt
0c0c98691e STM32 and STM32L4 Oneshot: EBUSY is more appropriate error then ENOMEM 2017-01-18 16:20:15 -06:00
Gregory Nutt
b05f928143 STM32L4: Port fix for multiple oneshot timers from STM32. Also fixes a few issues with original STM32 implementation. 2017-01-18 10:45:22 -06:00
Gregory Nutt
0069761d6f STM32 Oneshot: Fix logic so that it can support multiple oneshot timers. 2017-01-18 08:48:26 -06:00
Gregory Nutt
4ede950039 Fix some typos in comments. 2017-01-12 18:02:23 -06:00
Gregory Nutt
895f01dd80 Merged in david_s5/nuttx/upstream_revert_265af481209d60033f7cd4c4216048b1ce3eb435 (pull request #194) 
Revert "STM32 serial: Make input hardware flow-control work with RX DMA.  From Jussi Kivilinna"
 2017-01-12 17:58:20 -06:00
Gregory Nutt
bd696b8c40 Merged in david_s5/nuttx/upstream_to_greg_HSI_ON_re (pull request #193) 
HSI should not be turned off
 2017-01-12 17:47:16 -06:00
David Sidrane
20e723715c HSI should not be turned off 2017-01-12 13:44:03 -10:00
Gregory Nutt
d5cdab0e51 Revert "HSI should not be turned off" 
This reverts commit 4e051c05fb.

This change broke the STM32 seril driver.
 2017-01-12 16:27:04 -06:00
Gregory Nutt
3191549116 Merged in david_s5/nuttx/upstream_to_greg_HSI_ON (pull request #191) 
HSI should not be turned off
 2017-01-11 17:14:14 -06:00
Gregory Nutt
62fe2bf11a Merged in david_s5/nuttx/upstream_to_greg_HSI_not_req_on_F4 (pull request #192) 
STM32F4 does not have the requierment that the HSI be on for FLASH erase/write operations
 2017-01-11 17:13:36 -06:00
David Sidrane
0dbf44e3ad STM32F4 does not have the requierment that the HSI be on for FLASH erace/write operations 2017-01-11 12:47:24 -10:00
David Sidrane
4e051c05fb HSI should not be turned off 2017-01-11 12:18:12 -10:00
Gregory Nutt
b9e2bd4f37 Merge branch 'master' of bitbucket.org:nuttx/nuttx 2016-12-31 12:25:20 -06:00
Gregory Nutt
17cbec16dc STM32 SDIO: Remove warning about unused variable in STM32 F4 builds. 2016-12-31 12:24:02 -06:00
Aleksandr Vyhovanec
a0814ece13 Fix typos 2016-12-30 09:49:31 +03:00
Gregory Nutt
ea7b673174 Merged in david_s5/nuttx/upstream_sdio_1bit_dma (pull request #188) 
Allow dma in 1 bit mode in STM32F4xxx
 2016-12-24 20:21:03 -06:00
David Sidrane
df9ae3c13f Revert "STM32 serial: Make input hardware flow-control work with RX DMA. From Jussi Kivilinna" 
This reverts commit 265af48120.

Conflicts:
	arch/arm/src/stm32/stm32_serial.c
 2016-12-23 14:12:57 -10:00
David Sidrane
76ceb37553 Allow dma in 1 bit mode in STM32F4xxx 2016-12-22 09:19:37 -10:00
David Sidrane
ec85425041 STM32: Fix some STM32F7 copy paste errors 2016-12-17 08:31:12 -06:00
Gregory Nutt
4795d58e03 Back out most of 46dbbe837e. The order is correct -- or, rather, the order is the same as the order that response data is provided. Change the order will break all other drivers. 2016-12-15 07:16:24 -06:00
Gregory Nutt
c83da3c48f Remove minnsh configurations and support logic: up_getc() and lowinstream. 
This was an interesting exercise to see just how small you could get NuttX, but otherwise it was not useful:  (1) the NSH code violated the OS interface layer by callup up_getc and up_putc directly, and (2) while waiting for character input, NSH would call up_getc() which would hog all of the CPU.  NOt a reasonably solution other than as a proof of concept.
 2016-12-13 18:01:23 -06:00
David Sidrane
64ae731c99 stm32_allocateheap.c edited online with Bitbucket 2016-12-09 16:35:35 +00:00
David Sidrane
df9c5b33a0 Added STM32F469 RAM size and deliberated STM32F446 size 2016-12-09 05:02:31 -10:00
David Sidrane
dd309ad9e8 I was wrong - the original commit was correct. Assume a write op on the last word: address of 0xxxxxfe and count of 2. It is a valid operation and address+count is == STM32_FLASH_SIZE - so that is OK 2016-12-08 21:14:31 +00:00
David Sidrane
c77bda47d7 BUGFIX:STM32F427 was rebooting. Over reached family. 2016-12-08 20:31:56 +00:00
Gregory Nutt
b9be0279b1 Coding standard requires a blank line after every comment. 2016-12-07 06:52:15 -06:00
Gregory Nutt
cae56b825b Merged in david_s5/nuttx/upstream_to_greg_SDIO_fix (pull request #177) 
Allow a config to override the SDIO clock edge setting
 2016-12-07 12:48:11 +00:00
David Sidrane
7cc0a06f44 STM32: Allow the config to override the clock edge setting 2016-12-06 13:30:07 -10:00
Gregory Nutt
e190e1ee5b stm32fxxxxx_otgfs.h edited online with Bitbucket 2016-12-06 15:58:05 +00:00
Gregory Nutt
8e447453e1 Add a missing bit field definitions that was lost when stm32_otgfs.h was deleted. 2016-12-06 09:22:03 -06:00
Gregory Nutt
d6437407b1 Fix broken build. Previous commit removed a file that was being used. 2016-12-06 09:03:00 -06:00
Gregory Nutt
b6a21edb42 Merged in david_s5/nuttx/upstream_to_greg (pull request #176) 
Upstream to greg
 2016-12-06 12:22:42 +00:00
David Sidrane
885b718552 Expanded otgfs support to stm32F469 and stm32f446 
Added missing bits definitions
   Used stm32F469 and stm32f446 bit definitions
   Removed unsed header file
 2016-12-05 18:07:57 -10:00
David Sidrane
50f36f8967 Added support for stmf469 SAI and I2S PLL configuration and STM446 fixes 2016-12-05 14:21:46 -10:00
David Sidrane
8b31eda4d8 Added Timers 2-5 and control of SAI and I2S PLLs 2016-12-05 14:19:56 -10:00
Gregory Nutt
7467329a98 Eliminate CONFIG_NO_NOINTS. Lots of files changed -> lots of testing needed. 2016-12-03 16:28:19 -06:00
Janne Rosberg
a03d26e88d stm32_otghshost: if STM32F446 increase number of channels to 16 2016-11-30 12:17:12 -06:00
Gregory Nutt
934aded293 arch/: Adapt all Ethernet drivers to work as though CONFIG_NET_MULTIBUFFER were set. Remove all references to CONFIG_NET_MULTIBUFFER 2016-11-29 16:06:48 -06:00
Marc Rechté
3f91bd6056 STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, up to three interfaces. 2016-11-29 07:03:54 -06:00
Maciej Wójcik
0d0b1b64e2 Fix for F1 RTC Clock, tested on F103 2016-11-25 06:17:18 +01:00
Gregory Nutt
0804286ad3 arch/: Add option to use low-priority work queue to all Ethernet drivers in arch that support CONFIG_NET_NOINTS. 2016-11-19 09:20:01 -06:00
Paul A. Patience
8d9804d57b STM32: STM32F303xB and STM32F303xC chips have 4 ADCs 2016-11-18 19:28:09 -05:00
Gregory Nutt
19c1c9d78b All timer lower half drivers. Port Sebastien's changes to all all other implementations of the timer lower half. Very many just and untested. Expect some problems. 2016-11-17 15:03:31 -06:00
Marc Rechté
eb9a8ed790 STM37xx PWM: Add PWM driver support for STMF37xx. The changes have been tested successfuly for TIM4 and TIM17 (different IPs). 2016-11-07 09:35:48 -06:00
Gregory Nutt
8bd8ab1a45 configs/nucleo_f303re: Various fixes to get the adc configuration building again after PR. Refresh all configurations. 2016-11-04 06:59:28 -06:00
Gregory Nutt
0a5b4f684a arch: Disable priority inheritance on all semaphores used for signaling in the rest of the MCU drivers 2016-11-03 17:38:26 -06:00
Gregory Nutt
d28181da10 arch: Disable priority inheritance on all semaphores used for signaling in all USB host drivers 2016-11-03 17:05:53 -06:00
Gregory Nutt
bb6bfa633e arch: Disable priority inheritance on all semaphores used for signaling in all SD card drivers 2016-11-03 15:13:27 -06:00
Gregory Nutt
8b07aa6f7c arch: Disable priority inheritance on all semaphores used for signaling in all SPI drivers 2016-11-03 14:51:44 -06:00
Gregory Nutt
e1cd9febbf arch: Disable priority inheritance on all semaphores used for signaling in all I2C/TWI drivers 2016-11-03 14:23:42 -06:00
Paul A. Patience
93e9387689 STM32 ADC: Fix compilation error when DMA isn't enabled 2016-11-02 12:52:19 -04:00
David Sidrane
d870f4ab29 I think, that Size is (highest address+1 - Base address) 
Base address has been removed and if address+count >= size we are outside of the Flash
 2016-11-01 22:27:35 +00:00
Aleksandr Vyhovanec
2bb15fe789 Minor changes 2016-11-01 23:48:44 +03:00
Aleksandr Vyhovanec
20a1642552 To write the last page 2016-11-01 23:34:30 +03:00
Gregory Nutt
3bacda1565 STM32 Serial: Trivial removal of an extra space in a comment 2016-10-28 07:16:52 -06:00
Marc Rechte
483f012600 Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. 2016-10-25 14:14:10 -06:00
Max Kriegleder
1d50259358 STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54). The changes almost exclusively affect the ISR. 2016-10-24 16:32:10 -06:00
Maciej Wójcik
c719a32a40 add tim8 to stm32f103v pinmap 2016-10-19 16:34:07 +02:00
Gregory Nutt
30598c005f Cosmetic changes from review of last PR 2016-10-15 08:56:11 -06:00
David Sidrane
909ea5e8ef F4 Support versampling by 8 2016-10-15 03:56:07 -10:00
Jens Gräf
1d3abd17cc dma2d: fix an error in up_dma2dcreatelayer where an invalid pointer was returned when a certain underlying function failed. 2016-10-07 13:42:24 +02:00
Gregory Nutt
d61239e38f stm32_modifycr2 should be available on all platforms is DMA is enabled. 2016-10-06 08:50:52 -06:00
Sebastien Lorquet
9dcecd4b15 Add support for qencoders on various nucleo boards 2016-10-03 16:07:20 +02:00
Neil Hancock
ef475eb6a9 STM32 Ethernet: Correct typo in conditional logic 2016-10-01 07:32:41 -06:00
Mateusz Szafoni
9742757f26 Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present in RMII 2016-09-22 10:05:45 +02:00
Pierre-noel Bouteville
829de7d5bd Set USB address to avoid a failed assertion 2016-09-15 08:36:45 -06:00
Gregory Nutt
9c3bade7b4 net/tcp: tcp_ipvX_bind() not actually using the ported selected with port==0. Also removes duplicate call to pkt_input(). Issues noted by Pascal Speck. 2016-08-30 07:59:57 -06:00
David Sidrane
f2809d52d3 stm32_otgfsdev.c edited online with Bitbucket 
dup SOF removed as noted by Sébastien Lorquet
 2016-08-26 17:20:38 +00:00
David Sidrane
87f4a8033a BugFix:Lost first word from FIFO 
1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)*
    2) Acknowledge all pending int on entry to ISR that are Only rc_w1*
    3) Do not disable RXFVL*
    4) Loop until RXFVL is cleared*
    5) Only clear the NAK on the endpoint on the OTGFS_GRXSTSD_PKTSTS_SETUPDONE to
       not loose the first WORD of FIFO all the data  (Bug Fix)

Changed marked *are just driver clean up and ensure ints are not lost.
The bug fix is #5

Test case open putty and observer the Set/Get LineCoding
Without this fix #5 the Get will not match the Set, and
infact the data might be skewed by 4 bytes, that are lost
from the FIFO if the OTGFS_DOEPCTL0_CNAK bit is set in the
OTGFS_GRXSTSD_PKTSTS_SETUPRECVD as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE

Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B
Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08   c8 .. 00 00 07 | 7a 72
 2016-08-25 06:51:52 -10:00
Aleksandr Vyhovanec
6bc952a2cc STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and STM32F107RC. 2016-08-24 10:10:33 -06:00
Gregory Nutt
ae37c9859f Cosmetic changes from review of PR 120 2016-08-19 06:32:28 -06:00
Michał Łyszczek
0f175039ad Fix compilation warnings for stm32 eth with certain configs 2016-08-19 09:18:18 +02:00
Gregory Nutt
c0074fd6b8 Merged in mlyszczek/nuttx/stm32butterfly2_board (pull request #118) 
add stm32butterfly2 development board
 2016-08-18 11:14:10 -06:00
Alan Carvalho de Assis
a3e1bdde14 STM32 SPI: Fix STM32F3XXX SPI driver to read 8-bit correctly. 2016-08-18 08:38:49 -06:00
Gregory Nutt
d369eeec95 Remove a misleading comment 2016-08-18 07:13:04 -06:00
Gregory Nutt
01ae660c6c Merged in K-man23/nuttx/stm32_adc_fix (pull request #117) 
Change stm32 adc dma callback to send channel number instead of index
 2016-08-17 14:05:37 -06:00
Konstantin Berezenko
9b3bbc0f09 Change stm32 adc dma callback to send channel number instead of index 2016-08-17 13:02:36 -07:00
Michał Łyszczek
a05d9c18da Add connectivity line stm32 to be able to compile SYSCFG, add definitions for 
usb clock divs
 2016-08-17 20:11:15 +02:00
Konstantin Berezenko
42ee88fe89 STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function numbers 2016-08-17 11:01:44 -07:00
Gregory Nutt
8052dc4955 STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others. 2016-08-13 16:01:50 -06:00
Gregory Nutt
1a10518dae Update ChangeLog 2016-08-13 12:03:12 -06:00
Gregory Nutt
eed5e41626 Add some comments 2016-08-13 10:24:40 -06:00
Gregory Nutt
172761163b STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing. 2016-08-13 10:11:23 -06:00
Gregory Nutt
51fcd89b98 Add and fix some SPI debug output 2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365 STM32 and STM32L4: Enabling DMA loses other bits in CR2 2016-08-13 08:01:41 -06:00
Gregory Nutt
efc9f674d2 Trivial changes to comments and spacing 2016-08-13 07:50:54 -06:00
Alan Carvalho de Assis
805cb5c752 STM32F3 SPI: Fix a typo 2016-08-13 07:23:48 -06:00
Gregory Nutt
da5563c0e7 STM32: Add conditional logic for STM32F37xx 2016-08-13 06:43:13 -06:00
Gregory Nutt
10f90a1738 STM32 F3: Fix more SPI issues 2016-08-12 19:00:34 -06:00
Gregory Nutt
3383a25c38 Some logic missing from last commit 2016-08-12 18:40:25 -06:00
Gregory Nutt
afb02b56d4 STM32F3 SPI: Fix the number of bit setting for the F3. It works differently than for other parts. 2016-08-12 18:32:37 -06:00
Gregory Nutt
046acf6b54 Add a simulated oneshot lowerhalf driver 2016-08-12 13:14:03 -06:00
Gregory Nutt
b4e8876b09 Correct some spacing 2016-08-12 12:41:49 -06:00
Gregory Nutt
82b86cdcf3 oneshot interface: max_delay method should return time in a standard struct timespec form. 2016-08-12 11:33:10 -06:00
Gregory Nutt
89135c55e4 drivers/timer: Add an upper-half, oneshot timer character driver. 2016-08-12 10:40:07 -06:00
Gregory Nutt
1965e25da4 STM32L4: Add oneshot lower half driver. 2016-08-11 17:14:41 -06:00
Gregory Nutt
fa6866b046 SAMA5: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 16:47:17 -06:00
Gregory Nutt
d0ce5b1d1e Cosmetic changes to comments and function prototypes 2016-08-11 15:15:37 -06:00
Gregory Nutt
fb349508fd STM32 oneshot lower-half: Missed some data initialization. 2016-08-11 14:57:17 -06:00
Gregory Nutt
eb3a565153 STM32: Add oneshot lower half to build system. Fix some build problems. 2016-08-11 14:53:39 -06:00
Gregory Nutt
1bb93021df STM32: Add a experimental oneshot, lower-half driver for STM32 2016-08-11 14:07:43 -06:00
Gregory Nutt
accbccd78a Merged in mlyszczek/nuttx/stm32f1connline_pllfix (pull request #111) 
Fix bad pllmul values for stm32f1xx connectivity line.
 2016-08-11 06:44:19 -06:00
Michał Łyszczek
81df56086a Fix bad pllmul values for stm32f1xx connectivity line. 
stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values
 2016-08-11 10:49:57 +02:00
Gregory Nutt
fdcf0f7e5f Correct some comments 2016-08-09 15:15:21 -06:00
Gregory Nutt
b5b7a21bb6 Make reference count a uin16_t and save a couple of bytes. 2016-08-09 13:54:57 -06:00
Gregory Nutt
8b5833f7fe A consequence of Max's change to the logic to enable access to the backup domain is that every call to enabledbkp(true) must be followed by a matching call to enablebkp(false). There was one cse in both RTCC drivers where that may not always be true. 2016-08-09 11:33:47 -06:00
Gregory Nutt
5d91b8cabb With last change, stm32_pwr_enablebkp() no longer returns a value 2016-08-09 07:50:31 -06:00
Max Neklyudov
1e3ccbac12 Make stm32_pwr_enablebkp thread safe 2016-08-09 07:36:13 -06:00
Alan Carvalho de Assis
8499f42bf9 Add STM32F37XX DMA channel configuration 2016-08-08 13:29:53 -06:00
Alan Carvalho de Assis
fcf1ae7e05 stm32f37xx: Fix SYSCFG_EXTICR_PORTE defined twice 2016-08-08 12:59:29 -06:00
Alan Carvalho de Assis
834f058573 I'm using NuttX on STM32F373 and saw the config was missing SPI2 and 
SPI3, see datasheet:
www.st.com/resource/en/datasheet/stm32f373cc.pdf

I searched for other members of STM32F37XX family and they also have 3 SPIs:
http://www.st.com/content/st_com/en/search.html#q=STM32F37-t=keywords-page=1
 2016-08-08 12:25:15 -06:00
Gregory Nutt
6df28bc74e Make bit-order SPI H/W feature configurable for better error detection 2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791 Fix cloned variable error in all SPI drivers 2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS. 2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6 STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers. 
This change three things:  (1) It adds HWFEAT_LSBFIRST as a new H/W feature.  (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
 2016-08-08 08:28:13 -06:00
Gregory Nutt
309480d0f9 Merge branch 'timekeeping' of bitbucket.org:nuttx/nuttx 2016-07-28 09:34:00 -06:00
Gregory Nutt
9b9b721406 Rename alarm_enable to rtc_alarm_enabled; mark inline 2016-07-23 12:01:57 -06:00
Gregory Nutt
5a0f9fcb7d Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized. 2016-07-23 10:36:06 -06:00
Gregory Nutt
14de4b99f8 Simplify some computations 2016-07-23 08:13:25 -06:00
Gregory Nutt
0984fcda44 Back out last RTC alarm changes. I am mistaken, the interrupts are enabled by stm32[l4]_exti_alarm(). 2016-07-23 07:53:08 -06:00
Gregory Nutt
829c5610da STM32 F4 RTC ALARM: Was not enabling interrupts. 2016-07-23 07:19:14 -06:00
Gregory Nutt
a2035f7efd Move include/nuttx/1wire.h to include/nuttx/drivers/1wire.h 2016-07-21 13:51:28 -06:00
Gregory Nutt
1b9b3a7b47 pwm.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:48:24 -06:00
Gregory Nutt
ddcaa3d425 can.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:38:36 -06:00