Commit Graph

13 Commits

Author SHA1 Message Date
Jukka Laitinen
6a5d00f68c arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training
Decreasing the value may increase DQ/DQS window size. Keep the default value
(1) for the existing board configurations.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-08-17 17:50:37 +08:00
Eero Nurkkala
a0bde84c9a risc-v/mpfs: integrate fpga i2c driver
This incorporates an fpga i2c driver into the existing i2c driver.
This fpga i2c works almost 100% as the MSS i2c, but the difference
is that the fpga driver terminates all transactions with a stop
sent -interrupt. That needs to be handled.

Fpga clock source is also different, act accordingly.

SEC2TICK(10) is an overkill to any app, use just one second instead.

modifyreg32s are simplified as well, no need to clear and set
as set is enough.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-05-29 20:45:01 +08:00
Xiang Xiao
7a8cf7ff70 Indent the include statement by two spaces
follow the coding style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-16 12:34:32 -03:00
Eero Nurkkala
ec026c14cb risc-v/mpfs: emmcsd: further enhance the clocking
Simplify the clock mode from the board.h -files. Also make the
SD clock definable as well.

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-15 01:55:33 +08:00
Eero Nurkkala
e5305a250a risc-v/mpfs: emmcsd: provide options for selecting clk speed
Some related products, such as Aries m100pfs, don't support eMMC
speeds up to 200MHz. Thus, provide option to select slower clock.
This has only to do with the clocking, no CMD6 is sent to select
high speed modes.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-13 11:23:45 +08:00
Nathan Hartman
20bdd44e7b Remove executable permission from source and build files. 2022-08-04 12:48:18 -03:00
Jukka Laitinen
1c8a661c9f boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h: Update memory initialization parameters
Sync some of the AXI configuration and DDR training parameters with the manufacturer's
defaults.

The TIP_CFG parameter correction helps with DDR training failures on some individual boards
The AXI end address values fix early random crash in power-on boot on some individual boards

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-06-17 15:40:21 +08:00
Jukka Laitinen
81a19c1ce8 arch/riscv/src/mpfs: Make cleaner pinmux configurations for USB
Mux USB IO pins one-by-one using package specific pinmux definitions. This avoids accidentally overwriting IO settings for other pins.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-03-11 00:22:43 +02:00
Eero Nurkkala
18b5048dda risc-v/mpfs: add USB IOMUX definitions
This adds the proper IOMUX definitions for the Icicle and
m100pfsevp boards.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-08 16:49:29 +08:00
Petro Karashchenko
8d3bf05fd2 include: fix double include pre-processor guards
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
Jukka Laitinen
fc41bb7f8a boards/m100pfsevp: Decrease DDR lane temination values to 40 ohm and increase BCLKSCLK_OFFSET
This fixes problems with DDR training sequence on aries m100pfs board

    - Set LIBERO_SETTING_RPC_ODT_* to 6, which matches 40 ohm. Originally it was 120 ohm (2)
    - Set BCLKSCLK_OFFSET value to 5, which matches icicle board setting

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-29 09:36:49 -06:00
Eero Nurkkala
509350a614 risc-v/mpfs: update m100pfsevp board info
Update the cache settings for the Aries m100pfsevp board. This
assigns scratchpad ways for this board as well, as seen in the
commit 491ae6c.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-12-23 06:55:18 -06:00
Jani Paalijarvi
6dd4d5de15 risc-v/mpfs: Add support for Aries M100PFSMVP board
- Add defconfig and board specific files
- Create mpfs/common for code which is shared between MPFS boards.
- Add support for GPIO driven EMMCSD mux.
- Move DDR Libero definitions from arch to boards.

Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
2021-11-18 10:59:44 -03:00