neilh10
64b020f1a8
Add UID Unique ID
2016-10-13 19:42:39 -07:00
Gregory Nutt
0bc19a63bb
Merged in david_s5/nuttx-5/david_s5/kinetish-edited-online-with-bitbucket-1476115086140 (pull request #144 )
...
kinetis.h edited online with Bitbucket
2016-10-10 10:04:04 -06:00
David Sidrane
0476c43748
kinetis.h edited online with Bitbucket
2016-10-10 15:58:21 +00:00
David Sidrane
4703a23171
kinetis.h edited online with Bitbucket
2016-10-10 15:56:02 +00:00
Lok Tep
9e3479555d
usb set value typo
2016-10-07 15:47:30 +02:00
Lok Tep
fd92f01f55
exact values for i2c clock
2016-10-07 15:12:46 +02:00
Lok Tep
a2e4c0e898
i2s rcc typo fix
2016-10-07 15:12:34 +02:00
Jens Gräf
1d3abd17cc
dma2d: fix an error in up_dma2dcreatelayer where an invalid pointer was returned when a certain underlying function failed.
2016-10-07 13:42:24 +02:00
Gregory Nutt
d61239e38f
stm32_modifycr2 should be available on all platforms is DMA is enabled.
2016-10-06 08:50:52 -06:00
David Sidrane
d4a8585d6f
Fixed L4 USB Driver by avoiding SETUPDONE and EPOUT_SETUP
2016-10-04 16:52:12 -10:00
David Sidrane
a416b304a3
Code Cleanup and conform to upstrem debug config
2016-10-04 16:51:47 -10:00
David Sidrane
e54a0cd3d0
Header cleanup
2016-10-04 16:51:32 -10:00
Sebastien Lorquet
9dcecd4b15
Add support for qencoders on various nucleo boards
2016-10-03 16:07:20 +02:00
Gregory Nutt
06c70129ed
STM32L4: Remove dependencies on STM32 F3 from Kconfig
2016-10-02 16:05:13 -06:00
Sebastien Lorquet
d5ef349d9a
Add support for quadrature encoders on STM32L4
2016-10-02 23:26:16 +02:00
Lok Tep
33cea5038f
memory corruption, typo addr-value
2016-10-01 19:38:43 +02:00
Neil Hancock
ef475eb6a9
STM32 Ethernet: Correct typo in conditional logic
2016-10-01 07:32:41 -06:00
Vytautas Lukenskas
fd1de92016
There are some small problems in LPC43xx RS485 mode configuration. In particular: 1. UART0,2,3 do not have DTR pins (different from UART1), so, Kconfig needs to be adjusted. 2. lpc43_uart.c in RS485 mode only configures DIR pin, but doesn't enable pin output for UART0,2,3. 3. should be option to reverse DIR control pin output polarity. 4. lpc43xx/chip/lpc43_uart.h doesn't have USART3 definitions. NOTE: I didn't modified and didn't tested USART1, as it has different hardware. From Vytautas Lukenskas.
2016-09-30 08:51:49 -06:00
Lok Tep
1cbd7a0e59
CONFIG_ARCH_IRQPRIO check
2016-09-30 16:00:18 +02:00
Lok Tep
7d7354f961
merge
2016-09-27 16:05:57 +02:00
Young
7f32019a76
Add a new ioctl command (set MAXPOS) for tiva QEI
2016-09-26 18:10:06 +08:00
Mateusz Szafoni
9742757f26
Remove GPIO_ETH_RMII_TX_CLK. TX_CLK is not present in RMII
2016-09-22 10:05:45 +02:00
Gregory Nutt
d2e03daeb1
Fix some strange spacing apparently introduced by tools/indent.sh
2016-09-21 16:06:05 -06:00
Gregory Nutt
54eee5b303
Review of PR 135
2016-09-21 09:36:39 -06:00
Young
cf99e50b7a
Add QEI lower-half driver impl. for Tiva series chip
2016-09-21 17:08:31 +08:00
Gregory Nutt
1c20376e39
SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7
2016-09-20 15:33:31 -06:00
Wolfgang Reißnegger
3f22b63321
SAM3/4: Fix GPIO pull-up/down code.
...
Enabling the pull-down resistor while the pull-up resistor is still enabled
is not possible. In this case, the write of PIO_PPDER for the relevant I/O
line is discarded. Likewise, enabling the pull-up resistor while the
pull-down resistor is still enabled is not possible. In this case, the
write of PIO_PUER for the relevant I/O line is discarded.
2016-09-20 13:32:04 -07:00
Gregory Nutt
ed22c93d7a
Tiva Ethernet: Needs support for CONFIG_NET_MULTIBUFFER=y
2016-09-20 13:02:24 -06:00
Gregory Nutt
4dc3521743
All SAM Ethernet Drivers: Add support so that the drivers can be built with CONFIG_NET_MULTIBUFFER=y
2016-09-20 08:56:36 -06:00
Gregory Nutt
7f1a88e243
Pierre's assertion-avoidance change should also be applied to STM32 F7 and L4
2016-09-15 08:41:49 -06:00
Pierre-noel Bouteville
829de7d5bd
Set USB address to avoid a failed assertion
2016-09-15 08:36:45 -06:00
Jim Wylder
5d73f114b5
STM32L4: Add support for USART3-USART5
...
For STM32L4 parts, the higher number USART ports supported
varies. Add the HAVE_USARTx definitions to the configuration
to allow enabling the higher numbered USART ports.
Signed-off-by: Jim Wylder <jwylder@motorola.com>
2016-09-14 15:20:18 -05:00
Sebastien Lorquet
50dd745e23
restore stm32l4 name
2016-09-07 14:17:38 +02:00
Sebastien Lorquet
87d2f86968
Register renames to allow stm32l4 usb device compilation
2016-09-05 08:50:09 +02:00
David Sidrane
944902a24d
F7 Usb Fix for FIFO loosing first word
2016-09-02 07:14:16 -10:00
David Sidrane
81ba54b650
Using uinfo
2016-09-02 03:50:26 -10:00
Sebastien Lorquet
e4a713477a
Apply stm32 fix to stm32l4
2016-08-31 13:12:49 +02:00
Gregory Nutt
bef7f5be23
STM32 F7: Remove duplicate call to pkt_input from Ethernet driver.
2016-08-30 08:04:18 -06:00
Gregory Nutt
9c3bade7b4
net/tcp: tcp_ipvX_bind() not actually using the ported selected with port==0. Also removes duplicate call to pkt_input(). Issues noted by Pascal Speck.
2016-08-30 07:59:57 -06:00
David Sidrane
f2809d52d3
stm32_otgfsdev.c edited online with Bitbucket
...
dup SOF removed as noted by Sébastien Lorquet
2016-08-26 17:20:38 +00:00
David Sidrane
87f4a8033a
BugFix:Lost first word from FIFO
...
1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)*
2) Acknowledge all pending int on entry to ISR that are Only rc_w1*
3) Do not disable RXFVL*
4) Loop until RXFVL is cleared*
5) Only clear the NAK on the endpoint on the OTGFS_GRXSTSD_PKTSTS_SETUPDONE to
not loose the first WORD of FIFO all the data (Bug Fix)
Changed marked *are just driver clean up and ensure ints are not lost.
The bug fix is #5
Test case open putty and observer the Set/Get LineCoding
Without this fix #5 the Get will not match the Set, and
infact the data might be skewed by 4 bytes, that are lost
from the FIFO if the OTGFS_DOEPCTL0_CNAK bit is set in the
OTGFS_GRXSTSD_PKTSTS_SETUPRECVD as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE
Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B
Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08 c8 .. 00 00 07 | 7a 72
2016-08-25 06:51:52 -10:00
Gregory Nutt
4ebace37a9
Fix typos in LPC43 serial driver. Found by Vytautas Lukenskas
2016-08-24 10:34:56 -06:00
Aleksandr Vyhovanec
6bc952a2cc
STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and STM32F107RC.
2016-08-24 10:10:33 -06:00
Gregory Nutt
ae37c9859f
Cosmetic changes from review of PR 120
2016-08-19 06:32:28 -06:00
Michał Łyszczek
0f175039ad
Fix compilation warnings for stm32 eth with certain configs
2016-08-19 09:18:18 +02:00
Gregory Nutt
c0074fd6b8
Merged in mlyszczek/nuttx/stm32butterfly2_board (pull request #118 )
...
add stm32butterfly2 development board
2016-08-18 11:14:10 -06:00
Alan Carvalho de Assis
a3e1bdde14
STM32 SPI: Fix STM32F3XXX SPI driver to read 8-bit correctly.
2016-08-18 08:38:49 -06:00
Gregory Nutt
3c58e8e9b4
SAMA5: Add oneshot max_delay method
2016-08-18 08:11:40 -06:00
Gregory Nutt
d369eeec95
Remove a misleading comment
2016-08-18 07:13:04 -06:00
Gregory Nutt
01ae660c6c
Merged in K-man23/nuttx/stm32_adc_fix (pull request #117 )
...
Change stm32 adc dma callback to send channel number instead of index
2016-08-17 14:05:37 -06:00
Konstantin Berezenko
9b3bbc0f09
Change stm32 adc dma callback to send channel number instead of index
2016-08-17 13:02:36 -07:00
Gregory Nutt
319ad528cd
Revert "sam_tc_clockselect() reworked to calculate frequency error using smallest possible divisor minimizing the frequency error rather than largest possible divisor which maximized the error."
...
This reverts commit 5d5851a5cd
.
2016-08-17 12:34:54 -06:00
Michał Łyszczek
a05d9c18da
Add connectivity line stm32 to be able to compile SYSCFG, add definitions for
...
usb clock divs
2016-08-17 20:11:15 +02:00
Konstantin Berezenko
42ee88fe89
STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function numbers
2016-08-17 11:01:44 -07:00
Piotr Mienkowski
5d5851a5cd
sam_tc_clockselect() reworked to calculate frequency error using smallest possible divisor minimizing the frequency error rather than largest possible divisor which maximized the error.
2016-08-17 09:51:54 -06:00
Gregory Nutt
17e5da96ea
SAMV7: DAC1 not available GMAC is enabled
2016-08-17 07:14:59 -06:00
Gregory Nutt
e57891b41f
Kinetis I2C: Review and extend I2C register definitions for K40 and K60
2016-08-16 12:17:23 -06:00
Gregory Nutt
a337494221
Kinetis I2C: Remove literal hex register values. Replace with symbolic definitions from kinetis_i2c.h
2016-08-16 11:44:04 -06:00
Gregory Nutt
7f4488dc80
Review I2C register definitions and add support for the K64
2016-08-16 10:18:52 -06:00
Gregory Nutt
a3b061e54f
Kinetis: Add support for I2C2
2016-08-16 10:02:28 -06:00
Gregory Nutt
be83e73957
Kinetis I2C: Add comments, DEBUGASSERTions, and some I2C debug output.
2016-08-16 08:42:30 -06:00
Gregory Nutt
32c1189f51
Re-order some fields so that the structure packs better and so is smaller.
2016-08-16 08:20:55 -06:00
Gregory Nutt
f40bb14495
Kinetis: Add support for I2C1
2016-08-16 07:21:03 -06:00
Gregory Nutt
3f48392974
Add defaults in SAMV7 configuration for all DAC settings
2016-08-15 10:22:12 -06:00
Gregory Nutt
e53118ffc2
SAMV7 DAC configuration needs some conditional logic
2016-08-15 08:55:11 -06:00
Gregory Nutt
c367e4985f
Add configuration logic for the SAMV7 DAC module
2016-08-15 08:21:46 -06:00
Piotr Mienkowski
053aea552f
Add support for SAMV7 DACC module
2016-08-15 08:00:36 -06:00
Gregory Nutt
f84780f36e
Changes from review of PR 114
2016-08-14 13:38:47 -06:00
Gregory Nutt
2b32869b49
Merged in v01d/nuttx/kinetis-i2c-norestart (pull request #114 )
...
support NORESTART on kinetis i2c
2016-08-14 13:27:39 -06:00
v01d
239c56f3b9
support NORESTART
2016-08-14 16:25:18 -03:00
Gregory Nutt
014b8268cc
Minor stylistic corrections
2016-08-14 10:14:28 -06:00
Gregory Nutt
45e71a140a
Fix some alignment and long line issues
2016-08-13 18:04:09 -06:00
Gregory Nutt
3023724cf2
Changes from review of PR 113
2016-08-13 17:32:35 -06:00
Gregory Nutt
8315b051ca
Merged in v01d/nuttx/kinetis_i2c (pull request #113 )
...
I2C and RTC support for Kinetis
2016-08-13 16:54:14 -06:00
Gregory Nutt
8052dc4955
STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others.
2016-08-13 16:01:50 -06:00
v01d
5a97def131
kinetis k20 i2c fixed
2016-08-13 18:48:45 -03:00
Gregory Nutt
1a10518dae
Update ChangeLog
2016-08-13 12:03:12 -06:00
Gregory Nutt
eed5e41626
Add some comments
2016-08-13 10:24:40 -06:00
Gregory Nutt
172761163b
STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing.
2016-08-13 10:11:23 -06:00
Gregory Nutt
51fcd89b98
Add and fix some SPI debug output
2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365
STM32 and STM32L4: Enabling DMA loses other bits in CR2
2016-08-13 08:01:41 -06:00
Gregory Nutt
efc9f674d2
Trivial changes to comments and spacing
2016-08-13 07:50:54 -06:00
Alan Carvalho de Assis
805cb5c752
STM32F3 SPI: Fix a typo
2016-08-13 07:23:48 -06:00
Gregory Nutt
da5563c0e7
STM32: Add conditional logic for STM32F37xx
2016-08-13 06:43:13 -06:00
Gregory Nutt
10f90a1738
STM32 F3: Fix more SPI issues
2016-08-12 19:00:34 -06:00
Gregory Nutt
3383a25c38
Some logic missing from last commit
2016-08-12 18:40:25 -06:00
Gregory Nutt
afb02b56d4
STM32F3 SPI: Fix the number of bit setting for the F3. It works differently than for other parts.
2016-08-12 18:32:37 -06:00
Gregory Nutt
046acf6b54
Add a simulated oneshot lowerhalf driver
2016-08-12 13:14:03 -06:00
Gregory Nutt
b4e8876b09
Correct some spacing
2016-08-12 12:41:49 -06:00
Gregory Nutt
82b86cdcf3
oneshot interface: max_delay method should return time in a standard struct timespec form.
2016-08-12 11:33:10 -06:00
Gregory Nutt
89135c55e4
drivers/timer: Add an upper-half, oneshot timer character driver.
2016-08-12 10:40:07 -06:00
Gregory Nutt
61b0ac06bf
Missed a dependency in last set of commits
2016-08-11 17:20:12 -06:00
Gregory Nutt
1965e25da4
STM32L4: Add oneshot lower half driver.
2016-08-11 17:14:41 -06:00
Gregory Nutt
a5a776e223
SAM4CM: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver.
2016-08-11 17:04:19 -06:00
Gregory Nutt
fa6866b046
SAMA5: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver.
2016-08-11 16:47:17 -06:00
Gregory Nutt
b4d4a74059
SAMV7: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver.
2016-08-11 16:27:01 -06:00
Gregory Nutt
d0ce5b1d1e
Cosmetic changes to comments and function prototypes
2016-08-11 15:15:37 -06:00
Gregory Nutt
fb349508fd
STM32 oneshot lower-half: Missed some data initialization.
2016-08-11 14:57:17 -06:00
Gregory Nutt
eb3a565153
STM32: Add oneshot lower half to build system. Fix some build problems.
2016-08-11 14:53:39 -06:00
Gregory Nutt
1bb93021df
STM32: Add a experimental oneshot, lower-half driver for STM32
2016-08-11 14:07:43 -06:00
Gregory Nutt
0e35bad987
Update some comments
2016-08-11 10:12:04 -06:00
Gregory Nutt
accbccd78a
Merged in mlyszczek/nuttx/stm32f1connline_pllfix (pull request #111 )
...
Fix bad pllmul values for stm32f1xx connectivity line.
2016-08-11 06:44:19 -06:00
Michał Łyszczek
81df56086a
Fix bad pllmul values for stm32f1xx connectivity line.
...
stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values
2016-08-11 10:49:57 +02:00
Young
e30a3b780c
Fix two bugs of tiva pwm lower-half driver impl.
2016-08-10 13:25:43 +08:00
Gregory Nutt
7823a1680e
Update a comment
2016-08-09 17:08:03 -06:00
Gregory Nutt
698d6d1294
SAM3/4: Extend clocking logic to enable clocking on ports D-F
2016-08-09 17:05:11 -06:00
Gregory Nutt
0918dd98ab
Merged in gnagflow/nuttx (pull request #109 )
...
SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input.
2016-08-09 16:40:48 -06:00
Gregory Nutt
fdcf0f7e5f
Correct some comments
2016-08-09 15:15:21 -06:00
Wolfgang Reissnegger
cf35bb0b18
SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input.
...
The value of a GPIO input is only sampled when the peripheral clock for
the port controller the GPIO resides in is enabled. Therefore we need
to enable the clock even when polling a GPIO.
2016-08-09 13:23:05 -07:00
Gregory Nutt
b5b7a21bb6
Make reference count a uin16_t and save a couple of bytes.
2016-08-09 13:54:57 -06:00
Gregory Nutt
8b5833f7fe
A consequence of Max's change to the logic to enable access to the backup domain is that every call to enabledbkp(true) must be followed by a matching call to enablebkp(false). There was one cse in both RTCC drivers where that may not always be true.
2016-08-09 11:33:47 -06:00
v01d
f715e9b787
RTC working, I2C in progress
2016-08-09 14:01:27 -03:00
Gregory Nutt
5d91b8cabb
With last change, stm32_pwr_enablebkp() no longer returns a value
2016-08-09 07:50:31 -06:00
Max Neklyudov
1e3ccbac12
Make stm32_pwr_enablebkp thread safe
2016-08-09 07:36:13 -06:00
Alan Carvalho de Assis
8499f42bf9
Add STM32F37XX DMA channel configuration
2016-08-08 13:29:53 -06:00
Alan Carvalho de Assis
fcf1ae7e05
stm32f37xx: Fix SYSCFG_EXTICR_PORTE defined twice
2016-08-08 12:59:29 -06:00
Alan Carvalho de Assis
834f058573
I'm using NuttX on STM32F373 and saw the config was missing SPI2 and
...
SPI3, see datasheet:
www.st.com/resource/en/datasheet/stm32f373cc.pdf
I searched for other members of STM32F37XX family and they also have 3 SPIs:
http://www.st.com/content/st_com/en/search.html#q=STM32F37-t=keywords-page=1
2016-08-08 12:25:15 -06:00
Gregory Nutt
caea59b340
SPI bit order: Add configuration setting to indicate if an architecture-specif SPI implementation does or does not support LSB bit order.
2016-08-08 12:21:20 -06:00
Gregory Nutt
6df28bc74e
Make bit-order SPI H/W feature configurable for better error detection
2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791
Fix cloned variable error in all SPI drivers
2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e
STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS.
2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6
STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers.
...
This change three things: (1) It adds HWFEAT_LSBFIRST as a new H/W feature. (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
2016-08-08 08:28:13 -06:00
v01d
d483f7939f
I2C0 support for kinetis/teensy-3.x (to be tested)
2016-08-06 22:23:59 -03:00
Gregory Nutt
56f2454c86
Fix names of pre-processor variables used in header file idempotence
2016-08-06 18:48:45 -06:00
Gregory Nutt
f5ae207516
Changes from Review of last PR adding Tiva PWM driver
2016-08-05 07:17:42 -06:00
Young
2994decd3c
Add tiva PWM lower-half driver implementation
2016-08-05 18:53:25 +08:00
Gregory Nutt
d9314c1034
LPC43xx ADC: board.h should be included last; Also, unreleated, update tools/README.txt
2016-07-30 07:05:10 -06:00
Gregory Nutt
309480d0f9
Merge branch 'timekeeping' of bitbucket.org:nuttx/nuttx
2016-07-28 09:34:00 -06:00
Gregory Nutt
59f626313d
Changes from review of last PR
2016-07-25 15:16:51 -06:00
Gregory Nutt
250b9d5597
Merged in JordanMacIntyre/nuttx/PWM_driver (pull request #106 )
...
Pwm_driver
2016-07-25 14:59:45 -06:00
jmacintyre
f5ea811c97
create PWM driver, still having issues with building
2016-07-25 14:17:07 -05:00
Stefan Kolb
899a8aa2f0
SAMV7 TRNG: Missing endif.
2016-07-25 12:30:39 -06:00
Gregory Nutt
e895e19b9f
Minor changes from review of last PR
2016-07-24 07:45:46 -06:00
Wolfgang Reissnegger
c0fa319f2b
SAM3/4 UDP: Fix handling of endpoint RX FIFO banks.
...
This fixes a race condition where the HW fills a FIFO bank while the SW is
busy, resulting in out of sequence USB packets.
2016-07-23 20:11:04 -07:00
Wolfgang Reissnegger
cc191a977d
SAM3/4 UDP: Remove redundant EP state assignment.
2016-07-23 20:11:03 -07:00
Wolfgang Reissnegger
f3a6a40f62
SAM3/4 Serial: Fix warning when CONFIG_SUPPRESS_UART_CONFIG is set.
2016-07-23 16:23:49 -07:00
Gregory Nutt
9b9b721406
Rename alarm_enable to rtc_alarm_enabled; mark inline
2016-07-23 12:01:57 -06:00
Gregory Nutt
5a0f9fcb7d
Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized.
2016-07-23 10:36:06 -06:00
Gregory Nutt
14de4b99f8
Simplify some computations
2016-07-23 08:13:25 -06:00
Gregory Nutt
0984fcda44
Back out last RTC alarm changes. I am mistaken, the interrupts are enabled by stm32[l4]_exti_alarm().
2016-07-23 07:53:08 -06:00
Gregory Nutt
65ac11692d
STM32L4 RTC is cloned from F4; needs same fix.
2016-07-23 07:33:44 -06:00
Gregory Nutt
829c5610da
STM32 F4 RTC ALARM: Was not enabling interrupts.
2016-07-23 07:19:14 -06:00
Gregory Nutt
e6137ff129
Rename SAMD/L version of CONFIG_GPIO_IRQ to CONFIG_SAMDL_GPIOIRQ
2016-07-22 14:38:33 -06:00
Gregory Nutt
3aea9b8bf3
Rename KL version of CONFIG_GPIO_IRQ to CONFIG_KL_GPIOIRQ
2016-07-22 14:34:21 -06:00
Gregory Nutt
5386403476
Rename Kinetis version of CONFIG_GPIO_IRQ to CONFIG_KINETIS_GPIOIRQ
2016-07-22 14:30:37 -06:00
Gregory Nutt
264578135d
Rename LP11xx version of CONFIG_GPIO_IRQ to CONFIG_LPC11_GPIOIRQ
2016-07-22 14:23:31 -06:00
Gregory Nutt
360efe03c1
Rename LP17xx version of CONFIG_GPIO_IRQ to CONFIG_LPC17_GPIOIRQ
2016-07-22 14:18:30 -06:00
Gregory Nutt
369c942605
uint8_t is big enough for global. Range of values only 2-10
2016-07-21 15:18:27 -06:00
Gregory Nutt
67900beaaa
LP43 Heap: REALLY eliminate the warning this time
2016-07-21 15:15:56 -06:00
Gregory Nutt
d5acc120a4
Kinetis K60: Fix some bad conditional compilation
2016-07-21 14:22:00 -06:00
Gregory Nutt
a2035f7efd
Move include/nuttx/1wire.h to include/nuttx/drivers/1wire.h
2016-07-21 13:51:28 -06:00
Gregory Nutt
96d5b734a8
Add missing TWI definitions
2016-07-21 08:01:59 -06:00
Gregory Nutt
0d98507af1
Eliminate a warning
2016-07-20 16:47:23 -06:00
Gregory Nutt
1b9b3a7b47
pwm.h moved from include/nuttx/ to include/nuttx/drivers.
2016-07-20 13:48:24 -06:00
Gregory Nutt
ddcaa3d425
can.h moved from include/nuttx/ to include/nuttx/drivers.
2016-07-20 13:38:36 -06:00
Gregory Nutt
4b4dbc79a2
Move driver related prototypes out of include/nuttx/fs/fs.h and into new include/drivers/drivers.h
2016-07-20 13:15:37 -06:00
Sagitta Li
e07bd757ba
STM32 F107: TIM8 not supported in F105/F107
2016-07-20 08:51:03 -06:00
Vytautas Lukenskas
ac2a5e079c
Add change missing in Make.defs for last LPC43xx change
2016-07-19 09:28:15 -06:00
Vytautas Lukenskas
f222d37aa7
Extend LPC43xx EMC code to support SDRAM on a dynamic memory interface.
2016-07-19 07:11:04 -06:00
Gregory Nutt
2119c5ce19
Fix another function naming error
2016-07-18 12:40:27 -06:00
Gregory Nutt
d36da2b560
Fix bad dev[u]random_register() function return value.
2016-07-18 12:25:05 -06:00
Gregory Nutt
d5388eca05
devrandom_register() must be called before devurandom_register()
2016-07-18 11:24:04 -06:00
Gregory Nutt
078bbe5e5c
All H/W RNG Drivers: Can now be configured to register as /dev/random and/or /dev/urandom
2016-07-18 11:10:37 -06:00
Gregory Nutt
1660329d06
Rename up_rnginitialize to devrandom_register
2016-07-18 10:55:37 -06:00
David Alessio
6cefbc0c3f
This change provides an option to add /dev/urandom to all architectures. The pseudo-random algorithm I choose strikes an arguably-good balance between being "random" and small/fast enough for 8/16 bit MCUs. It’s the well-documented xorshift128 algorithm. It has an internal state of 128 bits that can be [re-]seeded with a write.
2016-07-17 06:42:26 -06:00
Gregory Nutt
7b298a828d
up_pminitialize() needs to be called from instances of up_initialize()
2016-07-15 13:11:28 -06:00
Gregory Nutt
d3b3c71d97
All architectures: Add logic to automatically register /dev/ptmx a boot time
2016-07-15 11:54:41 -06:00
Young
7005fafb95
Fix a bug of tiva i2c ports configuration
2016-07-15 11:03:48 +08:00
Gregory Nutt
18059d6821
Restore Wolfgang Reissnegger's PR as submitted. My mistake is it late here.
2016-07-14 18:39:51 -06:00
Wolfgang Reissnegger
f982180ec7
SAM3/4 Timer: Remove broken definitions for BMR register.
...
Per documentation SAM4S and SAM4E have the BMR register values
as they are already defined. No need for chip specific values.
In addition:
- CONFIG_ARCH_CHIP_SAM4s has wrong lower case 's' so the definitions would
not be used anyways for SAM4S builds.
- TC_BMR_TC2XC2S_TIOA2 does not make sense. There is no way to loop back
TC2's TIOA2 into itself.
2016-07-14 18:17:05 -06:00
Gregory Nutt
54bc6c88dd
Fix cast of return value
2016-07-14 10:21:31 -06:00
Gregory Nutt
3f6835fda9
If CONFIG_SPIFI_SECTOR512 undefined, lpc43_bwrite doesn't do actual write (probably copy/paste errors). Still not sure about current state of lpc43_spifi implementation, but for me NXFFS works with this patch. From Vytautas Lukenskas.
2016-07-14 10:11:19 -06:00
Pierre-noel Bouteville
76f12b1f69
I'm using syslog through ITM. In this case syslog_channel function is call before ram initialisation in stm32_clockconfig. But syslog channel uses a global variable that is reset to default by the RAM initialization.
2016-07-14 07:29:39 -06:00
Gregory Nutt
72582b61d9
Merged in ziggurat29/nuttx/stm32l4_smartfs_test (pull request #98 )
...
port foward bugfix from stm32 of oneshot timer
2016-07-13 16:09:18 -06:00
ziggurat29
9a6c5b271a
port foward bugfix from stm32 of oneshot timer
2016-07-13 17:00:06 -05:00
Gregory Nutt
37e10a54ae
Kinetis: Eliminate a warning. Freedom-K64F: Update a README file
2016-07-13 15:38:47 -06:00
Gregory Nutt
beaca7a17f
Merge remote-tracking branch 'origin/master' into timekeeping
2016-07-13 10:22:38 -06:00
Max Neklyudov
067f63fc18
STM32: Fix bug in oneshot timer
2016-07-13 10:20:38 -06:00
Stefan Kolb
f673b2d02a
This commit solves a problem which causes data loss while sending data via USB. This problem is caused by an incorrect handling of the endpoint state in the USB driver sam_usbdevhs. This leads under some circumstances to situations in which an DMA transfer is setup while a previous DMA transfer is currently active. Amongst other things I introduced the new endpoint state USBHS_EPSTATE_SENDING_DMA for the fix.
...
To reproduce the problem, I used a program which send as many data as possible via a CDC/ACM device and verified the received data on the PC.
2016-07-13 10:09:14 -06:00
Gregory Nutt
a7d8279714
Kinetis and Freedom-K64F: Remove unused configuration variable; fix some compile issues; SDHC is now enabled in the nsh configuration (but does not work)
2016-07-13 09:56:02 -06:00
Gregory Nutt
2f12de6f28
Freedom-K64F: Add hooks for automounter; Change NSH configuration to use Windows
2016-07-13 09:23:57 -06:00
Sebastien Lorquet
590af73bd2
STM32L4 Serial: Remove some STM32Fxxx conditional logic; fix a link error resulting from an over-aggressive rename.
2016-07-13 07:10:09 -06:00
Gregory Nutt
76a0cccbb1
K6x Ethernet: Fix some conditional logic
2016-07-13 07:04:19 -06:00
Sebastien Lorquet
6be72272eb
STM32L4: Apply the stm32l4 namespace and FAR qualifiers to the serial driver, also, indentation.
2016-07-12 17:18:46 -06:00
Gregory Nutt
dee77a5dd9
Kinetis Ethernet: Add support for CONFIG_NET_NOINTS
2016-07-12 16:17:35 -06:00
Gregory Nutt
10667bd38a
Kinetis Ethernet and Freedcom-K64F: PHY address was wrong. Modified driver to try all PHY addresses and then only fail if the driver cannot find a usable PHY address. MDIO pin must have an internal pull-up on the Freedom-K64F.
2016-07-12 14:09:27 -06:00
Gregory Nutt
c8f053de92
Kinetis Ethernet: Add support for the KSZ8081 PHY
2016-07-12 09:59:08 -06:00
Gregory Nutt
38999dfe9d
Fix two incorrectly named header files
2016-07-12 09:46:31 -06:00
Gregory Nutt
f816e7a69b
Merged in slorquet/nuttx/pr_fixes (pull request #95 )
...
Pr_fixes
2016-07-11 17:07:40 -06:00
Sebastien Lorquet
4172016667
revert changes made by greg
2016-07-12 01:04:15 +02:00
Sebastien Lorquet
5e12d6203e
Cosmetic changes after PR 94
2016-07-12 00:57:18 +02:00
Gregory Nutt
9dd70ffbae
Freedom K64F: Green and Blue LEDs reversed
2016-07-11 16:54:20 -06:00
Gregory Nutt
c80b627e8d
Partial review of last PR
2016-07-11 16:28:54 -06:00
Sebastien Lorquet
749b54fbda
PR fixes for oneshoot and freerun
2016-07-12 00:16:08 +02:00
Gregory Nutt
a48fb1e41c
Merged in slorquet/nuttx/stm32l4_renames (pull request #94 )
...
stm32l4_renames
2016-07-11 16:05:27 -06:00
Sebastien Lorquet
4f5d22c940
fix a typo
2016-07-12 00:03:38 +02:00
Sebastien Lorquet
3a873a44ef
renames in USB OTG
2016-07-11 23:59:24 +02:00
Sebastien Lorquet
4dd020784a
renames in tickless
2016-07-11 23:57:57 +02:00
Gregory Nutt
fb1855244e
STM32 timer: Eliminate a warning
2016-07-11 13:13:17 -06:00
Sebastien Lorquet
ce09af0da7
Rename STM32L4 PWM routines. this WILL BREAK configs
2016-07-11 19:13:06 +02:00