Commit Graph

17855 Commits

Author SHA1 Message Date
Masayuki Ishikawa
9f206f2bb6 arch: armv6-m: Introduce setintstack macro
Summary:
- This commit introduces setintstack macro which can be
  overridden for SMP with interrupt stack

Impact:
- SMP only

Testing:
- Tested with raspberrypi-pico:smp
- NOTE: more commits will be added later

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-07-03 04:13:13 -05:00
Virus.V
5f67d65e9e risc-v/bl602: add efuse driver
Signed-off-by: Virus.V <virusv@live.com>
2021-07-02 13:17:39 -05:00
ligd
f479ca9096 sim/smp: fix smp can't start, caused by signal too busy
Change-Id: Ia9cad04759a869f9bed871fa0acd002115eefb0a
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 23:19:15 +09:00
ligd
2ab1dcf763 sim: add setitimer to nuttx-names.in
Change-Id: Id6d91d81b3d67cbe9215eb94f4ef394d61156fe8
2021-07-02 05:02:36 -05:00
ligd
a7a8c20083 sim: fix host_sleep unit error
Change-Id: Iaddd6381eb9870b709147d33b36482ae2e37c04d
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
36c1bba88c sim/up_oneshot.c: take host time as current
Change-Id: I34625f3d3f9557a103017124388dba6104aba7cc
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
92cd7628e0 sim: remove CONFIG_SIM_WALLTIME fast timing maybe harmful for IOs
Change-Id: Ic4ff5ec0aa99d2d229a07c4d1a9a4dae738d3cd9
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
aa43a0215d mm: fix memory corruption when loop create/exit thread in SMP mode
Root casue:
when do thread exit, need add free stack operation to mm_delaylist,
but in SMP mode, CPU0 thread1 exit, at this time, CPU1 call malloc
and free mm_delaylist.

Fix:
Divide mm_delaylist for per CPU in SMP mode.

Change-Id: Ibf7d04614ea2f99fb5b506356b7346a0d94f0590
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 04:55:46 -05:00
ligd
50eee2f081 arm: fix enable interrupt too earlier caused system crash
reason:
	msr	cpsr, r2   /* Set the CPSR */

    // interrupt hanppend, context switch

	pop	{r0-r2, pc}

resolve:
    use SPSR instead, and recover with ldmia ^

Change-Id: Id7cee6452997ec19919eeecf6e7616164b3a0ab3
Signed-off-by: ligd <liguiding1@xiaomi.com>
(cherry picked from commit 6fa6c1676932d7babb7ff22ef556a17bb18f1c0d)
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-01 22:20:36 -05:00
Fotis Panagiotopoulos
de213401a7 lpc17_40_progmem: fixed compilation issues. 2021-07-01 09:11:12 -05:00
Masanari Iida
839414987c efm32: Fix missing closing bracket
This patch fixes missing closing bracket and semicolon.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2021-07-01 06:37:17 -07:00
Sara Souza
b45ccad6a0 xtensa/esp32: Adds support for SERIAL_TXDMA. 2021-07-01 01:50:13 -05:00
David Sidrane
e659ae83b0 Kinetis:Serial No DMA Poll needed 2021-07-01 01:44:46 -05:00
David Sidrane
78584b4569 kinetis:Serial use eDMA
kinetis:serial mark priv->rxdma after use
2021-07-01 01:44:46 -05:00
David Sidrane
e5a1b2e797 kinetis:SPI use eDMA
Kinetis:SPI only allocate DMA once
2021-07-01 01:44:46 -05:00
David Sidrane
78bf264af0 kinetis:Replace DMA
Kinetis:DMAMUX use hex in mask
2021-07-01 01:44:46 -05:00
David Sidrane
3439c40044 stm32h7:SDMMC fix reset of do_gpio
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.

Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
6d6ca8f0b6 stm32:sdio: fix wrong ifdefs
This was wrong but presumably did not matter.
2021-07-01 01:37:58 -05:00
Julian Oes
2a86335055 stm32:sdio: fix reset of GPIO_SDIO_D0
For the case when the watchdog is triggering a timeout we did not
correctly reset the GPIO_SDIO_D0.

Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
665f847760 stm32f7: fix reset of d0_gpio
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.

Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
154795a247 stm32f7: Removed bit that is reserved for f7 2021-07-01 01:37:58 -05:00
Julian Oes
87fd8903a0 stm32f7: whitespace fix 2021-07-01 01:37:58 -05:00
Julian Oes
804445fc15 stm32f7: unify identical sdmmc.h header files
It turns out there is no difference in these two files as well as the
reference manual for the registers between the two parts, so it probably
makes sense to unify them
2021-07-01 01:37:58 -05:00
chenwen
31a6da2343 risc-v/esp32c3: Notifies networking layer whether the carrier is available 2021-06-30 23:09:34 -05:00
McKay Ransom
863834057b Renesas/RX: add RX setjmp, ARCH_RENESAS_RX, and RX65N ioctl 2021-06-30 23:01:57 -05:00
Sara Souza
87fabb2bc7 xtensa/esp32: Support to select different clock source for RTC controller and close TODOs. 2021-06-30 21:27:27 -05:00
Virus.V
84100128b2 risc-v/bl602: update wifi firmware version
Signed-off-by: Virus.V <virusv@live.com>
2021-06-30 01:08:10 -05:00
xiewenxiang
5fd3eca9c9 riscv/esp32c3: Support BLE sleep mode 2021-06-28 23:14:30 -05:00
xiewenxiang
145d917587 riscv/esp32c3: Add Wi-Fi and BLE coexist 2021-06-28 23:14:30 -05:00
xiewenxiang
8b96edc3a5 riscv/esp32c3: Add esp32c3 BLE driver 2021-06-28 23:14:30 -05:00
Michal Lenc
b36171026e arch/arm/src/imxrt/imxrt_flexpwm.c: fix mistake in submodules address offset
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-28 09:03:06 -05:00
Virus.V
8452c571ec risc-v/bl602: BLE firmware adapts to the new framework
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Virus.V
cd50650583 risc-v/bl602: Support AP and STA as independent network interface device
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Michal Lenc
addfe182ae arch/arm/src/imxrt: added support for FlexPWM driver
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-26 09:58:52 -05:00
Abdelatif Guettouche
553f070357 arch/xtensa/esp32: Remove up_textheap_init function since it's not
needed anymore.

Decouple the IRAM heap from the text allocator since that heap can
still be used as a generic pool of memory.

Implement the up_extraheaps_init function to initialize all of the
additional heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
add18b9592 arch/risc-v/esp32c3: Remove the up_textheap_init function since it's not
needed anymore.

Implement the up_extraheaps_init function to initialize all separate
heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
fc9c320bd8 arch/arm/cxd56xx: Remove the up_textheap_init function since it's not
needed anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
0a4982a80e Introduce ARCH_HAVE_EXTRA_HEAPS, this config is going to be used for
chips that have multiple separate heaps.
For now it's used to enable APIs to initialize the different heaps
during the start sequence but can be extended for other purposes that
manage those heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Gustavo Henrique Nihei
db18a12844 xtensa/esp32: Move RTC WDT deinit after initial setup
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Gustavo Henrique Nihei
8c70e4f1c1 xtensa/esp32: Fix RTC watchdog timer deinit at startup
Write protection must be disabled before performing changes to the WDT
registers. Furthermore, the routine was resetting the wrong field from
the RTC WDT register.
The RTC_CNTL_WDT_FLASHBOOT_MOD_EN field relates to Flash Boot Protection
and it is enabled by the 1st stage bootloader. The 2nd stage bootloader
takes care of disabling it.
Then the 2nd stage bootloader enables the RTC WDT for checking the
startup sequence of the application image.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Xiang Xiao
ae9b5fd306 Replace mktime with timegm in rtc and fs driver
since kernel component should use UTC instead local time

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Icf939e1ab0af8e577105f539d2553bc67b3b3d10
2021-06-23 13:43:32 -03:00
Abdelatif Guettouche
60da4317b9 arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
consistency.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
bdbc9ef04f arch/risc-v/esp32c3_rtc_heap.c: Correct the name of the procfs info
variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
55a210d305 arch/xtensa/esp32_textheap.c: When allocating text prioritize alloacting
from the RTC heap.  If that's not available fall back to the IRAM heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1e49f2929f arch/xtensa/src/esp32: Extract the IRAM region as a separate heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1719e9df94 arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.
This memory region can be accessed by both I & D buses, so the heap can
be used for data storage and code execution.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
6582c19904 arch/xtensa/src/esp32/hardware/esp32_soc.h: Add a function to check if a
buffer comes from the RTC Slow memory.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
a4289c4f84 xtensa/esp32_aes.c: Use the same output when testing the AES driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-21 06:23:55 -05:00
Masayuki Ishikawa
841fb02ac0 arch: esp32: Replace getcoreid with the latest esp-idf's
Summary:
- I noticed that the getcoreid macro in the latest esp-idf
  is much simpler than the current NuttX's.
- This commit replaces the macro with the latest esp-idf's

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-21 06:21:39 -05:00
Alexander Lunev
f7c8875fd7 sdio,stm32h7: fixed an issue with not starting IDMA data transfer in case of IO_RW_EXTENDED command (CMD53);
corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending on block count
and for block data transfers ending with STOP_TRANSMISSION command;
stm32_sdio: added more debug messages
2021-06-21 02:47:46 -05:00