Commit Graph

20909 Commits

Author SHA1 Message Date
anjiahao
9f644579b3 fix sim register & tcb info typo
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-23 21:59:35 -07:00
kcheshmedzhiev
ea87d008a0 Initial support for NUCLEO-U5A5ZJ-Q board
Fix for ci error

Typo changes

Fixed typo in boards/arm/stm32u5/nucleo-u5a5zj-q/src/stm32_bringup.c

Typo changes

Typo fixes

Typo fixes

Typo changes

Typo changes

Typo changes
2023-07-23 18:42:05 -07:00
Victor Benso
0c5145b7d1 New implementation of the ESP32's RMT driver. 2023-07-23 16:17:57 -03:00
raiden00pl
eb965d5fec arch/nrf91: add support for modem sockets 2023-07-23 19:56:38 +08:00
raiden00pl
6bd5452588 arch/nrf91: fixes for modem OS integration 2023-07-23 19:56:38 +08:00
raiden00pl
aa5ac49a21 arch/nrf91: convert modem AT interface to serial device 2023-07-23 19:56:38 +08:00
raiden00pl
b3c5e05add arch/nrf91: fix modem initialization 2023-07-23 19:56:38 +08:00
Lucas Saavedra Vaz
c31681df54 arch/risc-v/espressif: Add PWM (LEDC) support
Add support for the PWM peripheral to ESP32-C3/C6/H2 by using the Espressif HAL
2023-07-23 01:11:38 +08:00
Jukka Laitinen
8766865e09 arch/risc-v/src/mpfs: Add configuration option to enable DDR manual addcmd training
Also switch to automatic one by default, as it saves a lot of flash. The manual training
code is left in for now to be able to use it as an option if there are problems with automatic one

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-07-21 16:36:04 -03:00
yintao
0b01340aec nuttx/sim: use workquene instead rptun_loop
Signed-off-by: yintao <yintao@xiaomi.com>
2023-07-21 20:46:59 +08:00
chao an
ee6e2ce149 arch/perf: add ARCH_HAVE_PERF_EVENTS to support hardware perf events
The implementation of up_perf_*() is in a different static library in nuttx:

Hardware: libarch.a
Software: libdrivers.a (weak function)

Since functions with weak attributes cannot be correctly replaced in multiple static libraries,
this PR will use macros to replace whether the arch supports hardware perf events

Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-21 20:43:30 +08:00
chao an
4b94dc3092 toolchain/gcc: fix linker error if enable STACK_CANARIES/LTO at same time
If -fstack-protector-all is enabled, gcc linker will need GCC
SSP(Stack Smashing Protector) support, Since the implement of SSP
is related to the OS, most of embedded toolchain does not provide
ssp support, so an error will be reported when linking:

enable CONFIG_LTO_FULL && CONFIG_STACK_CANARIES

arm-none-eabi/bin/ld: cannot find -lssp_nonshared: No such file or directory
arm-none-eabi/bin/ld: cannot find -lssp: No such file or directory

https://github.com/gcc-mirror/gcc/blob/master/gcc/gcc.cc#L983-L985

Since nuttx has already implemented SSP related hook functions,
so in this PR, we filter out this option in the link phase to ensure that
the implementation of lssp/lssp_nonshared will not be referenced

Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-21 01:13:34 +08:00
Zhihong Chen
0fab64cd95 hpmicro: hpm6750: keep cpu clock on after "wfi", so that mchtmr can work after "wfi"
- keep cpu clock on after "wfi", so that mchtmr can still work after "wfi"

Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
2023-07-20 18:15:29 +08:00
Xiang Xiao
a51be33a41 libc/tls: Change the default value of TLS_NELEM to zero
to ensure the default config as small as possible.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-20 08:11:30 +02:00
Jukka Laitinen
c269adbff1 arch/risc-v/src/mpfs/mpfs_ddr.c: Correct erroneous register addresses in DDR training
Writes to MPFS_CFG_DDR_SGMII_PHY_EXPERT_DFI_STATUS_OVERRIDE register were not done properly. Use correct address for writes.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-07-18 10:11:10 -03:00
Eero Nurkkala
b79671a336 risc-v/mpfs: emmcsd: fix csd read
Reading the CSD field misses 3 bytes as the residual bytes
are not carried over properly. Fix this by adding the missing
bytes due to shifting.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-07-17 23:05:37 +08:00
Xiang Xiao
427f8a1624 arch: Fix the mismath in comment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
abfe082a6f Kconfig: Simplify the conditional default statement
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
e031a73aef Kconfig: Change some "default y" to "default !DEFAULT_SMALL"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
Xiang Xiao
4d8eedb09a arch/sim: Link to libgcov.a when CONFIG_ARCH_COVERAGE is enabled
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
chao an
f10b54a081 cmake: fix CMake build break
Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-15 23:32:36 +08:00
chenrun1
cafbbb1ded armv7amr/v8m:Modify hardcodes to macro definitions and update commit.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
9c2bc0edbe armv7m/v8m:Restore the CSSELR state before setting.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
823c3b32e7 armv8m:fix warning up_get_cache_size defined but not used.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
665a140b21 armv7/v8:Fix configuration csselr default configuration error.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
22d1059c97 armv7/8 cache: add up_get_xcache_size() support
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
chenrun1
09da8fb651 armv7/8 cache:CSSELR should be set before getting cache info
According to the ARMv7a/r/m and ARMv8m architecture manuals
The allowed values are
0 Data or unified cache.
1 Instruction cache.

"One CCSIDR is implemented for each cache that can be accessed by the processor. CSSELR selects which Cache Size ID Register is accessible, see c0, Cache Size Selection Register (CSSELR)."

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-15 15:11:07 +08:00
raiden00pl
97309dd22d cmake: fix nrf91 modem static library build 2023-07-15 00:56:33 +08:00
liaoao
8706d68318 assert: check intstack_sp when print last stack in irq context
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-07-14 21:36:11 +08:00
liaoao
1ed09f804e vfork: modify struct vfork_s
fp is just an alias of r11, it  not really used for
framepointer in t32 mode.

Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-07-14 20:48:51 +08:00
simbit18
d991ef77e8 Fix nuttx coding style
Remove TABs
Fix indentation
2023-07-14 20:48:24 +08:00
simbit18
a8939f6d4b arch/sparc/src/bm3823/bm3823.h: Fix the name of the constant BM3823_Is_interrupt_pending
Remove TABs and spaces from the name of the constant BM3823_Is_interrupt_pending
2023-07-14 20:48:09 +08:00
raiden00pl
019b7a39d4 cmake: cmse support for armv8-m 2023-07-13 23:49:02 +03:00
zhangyuan21
b7216d54ff arm64: Use the correct cpu id for fpu idle task init
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-07-14 01:17:02 +08:00
simbit18
b0965ab963 Fix nuttx coding style
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.
2023-07-14 01:16:06 +08:00
zhangyuan21
d8797bde4e arm_gicv2: accesses the non-secure copy in non-secure state
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-07-14 01:15:13 +08:00
zhangyuan21
601202ee4a arm64: Use the correct aff in up_affinity_irq function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-07-14 01:13:01 +08:00
simbit18
1b1ac6f3b7 Fix nuttx coding style
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.

Fix nuttx coding style

Fix Comments to the Right of Statements.
2023-07-13 19:30:56 +08:00
chenrun1
4d285cb14d xtensa_saveusercontext:Leave the context information empty
In the current implementation of other architectures, it is not really implemented to preserve the context, so it is emulated from other architectures to clear the context.
If this behavior is not implemented, it will cause the xtensa architecture processor to loop assert in the active assert case

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-13 09:48:46 +08:00
raiden00pl
a59f82b8d2 cmake: support pre-processor for linker script 2023-07-13 03:05:39 +08:00
chenrun1
3bdba79851 armv8m/arm_hardfault.c:fix code style.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-13 03:05:28 +08:00
chenrun1
842adf888f armv8m/arm_hardfault:add arm_gen_nonsecurefault information
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-13 03:05:28 +08:00
raiden00pl
f7905512be stm32h7: add LTDC support 2023-07-12 11:30:57 -03:00
raiden00pl
8ceff0dc5a arm/stm32h7: Add STM32H745 family 2023-07-12 11:30:57 -03:00
raiden00pl
ad6361f0cc cmake: fix build after c33d1c9c97 (vfork -> fork) 2023-07-12 09:47:54 -03:00
raiden00pl
6dcfe61b0e cmake: add support for stm32h7 2023-07-11 15:52:56 -03:00
raiden00pl
ab6fd2e6c8 cmake: add support for stm32f7 2023-07-11 15:52:56 -03:00
raiden00pl
ca3d213402 cmake: sync arch/stm32/CMakeLists.txt with Make.defs 2023-07-11 15:52:56 -03:00
guoshichao
c33d1c9c97 sched/task/fork: add fork implementation
1. as we can use fork to implement vfork, so we rename the vfork to
fork, and use the fork method as the base to implement vfork method
2. create the vfork function as a libc function based on fork
function

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2023-07-12 02:27:37 +08:00
rongyichang
5d7864fbcb drivers/spi: add support for qspi hwfeatures
add QSPI_BITORDER and QSPI_WORD_REVERSE hwfeatures

Signed-off-by: rongyichang <rongyichang@xiaomi.com>
2023-07-12 01:42:25 +08:00