This change adds a check to mm_trysemaphore() (the root implementation of both kmm_trysemaphore() and umm_trysemaphore()). It checks if the that task that is apparently executing is marked as RUNNING. If not, how could the non-running task be trying to get the MM semaphore? I think only in the exact scenario that Eunbong Song has described.
So I think the solution should provide the same protection as 91aa26774b but without the horrific consequences to memory usage.
This solution to the problem noted by EunBong Song results in major memory fragmentation and and out-of-memory conditions on the PX4 platform. On that platform the lower priority work queue is very low priority and essentially never runs when the system is busy. As a result, the systems gets slowly starved of memory until failures and bad behaviors begin to occur.
This is an addition patch coming later to result the original problem in a different way that does not have cause memory starvation.
This reverts commit 91aa26774b.
Squashed commit of the following:
arch/arm/src/stm32f0l0: Various changes for a clean compilation. Still does not compile correctly due to missing FLASH latency definitions.
arch/arm/src/stm32f0l0/hardware: Add framework for the STM32 L0. Currently set to same as the STM32F0.
arch/arm/src/stm32f0l0/hardware: Very fragmentary FLASH header register definitions for the STM32 L0.
arch/arm/src/stm32f0l0: Bring in DMA v1. Cannot possibly be functionaly yet due to the limited number for M0 interrupts.
arch/arm/src/stm32f0l0: Add STM32 F0/L0 LSE and backup power domain controls.
arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h: Add STM32L0 PWR header file.
arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.
arch/arm/include/stm32f0l0/chip.h: WIP.
arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.
arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.
nuttx/arch/arm/include/stm32f0l0: Add STM32L0 IRQ number definition file.
arch/arm/src/stm32f0l0: Add STM32L0 RCC driver.
arch/arm/src/stm32f0l0/hardware: Adds basic STM32L0 header files.
arch/arm/src/stm32f0l0: Add STM32L0 chip selections.
configs/: Hook new STM32L0 boards into the configuration system.
configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled
configs: add basic support for nucleo-l073rz
configs: add basic support for b-l072z-lrwan1
- Avoids the use of up_aesinitialize() entirely, which resolves dependency problems, because this function does not make sure that an actual hardware aes implementation was made available: each SoC is now responsible to ensure the AES hardware is initialized before first use. This applies to lpc43xx, stm32 and sam34.
- Remove definitions of the NEVER used aes_init and aes_update operations. The new AES API will be more suitable.
- Change the unusual naming in stm32 (avoiding possible naming clashes)
- Change the unusual naming in sam34 (avoiding possible naming clashes)
- Add some FAR to pointers and enforce the 80 col limit in stm32 and sam
Change rndis mac
* configs/lc823450-xgevk: Change RNDIS MAC address assignment
In previous implementation, mac[0] was assigned to 0xaa for RNDIS
host to avoid MAC address conflicts with RNDIS device.
However, I noticed that this assignment causes a random MAC address
generation on ubuntu16.04 or later which is inconvenient to set up
network interface.
This new assignment scheme fixes this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/stm32f4discovery: Change RNDIS MAC address assignment
In previous implementation, mac[0] was assigned to 0xaa for RNDIS
host to avoid MAC address conflicts with RNDIS device.
However, I noticed that this assignment causes a random MAC address
generation on ubuntu16.04 or later which is inconvenient to set up
network interface.
This new assignment scheme fixes this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/viewtool-stm32f107: Change RNDIS MAC address assignment
In previous implementation, mac[0] was assigned to 0xaa for RNDIS
host to avoid MAC address conflicts with RNDIS device.
However, I noticed that this assignment causes a random MAC address
generation on ubuntu16.04 or later which is inconvenient to set up
network interface.
This new assignment scheme fixes this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
sixlowpan: Fixes logic surrounding the Universal/Local bit. This bit represents whether the IID is locally/globally administered. The U/L bit is bit 1 of the MSB of the EUI-64. It should only be inverted in cases where there is a full EUI-64. In cases whe
* sixlowpan: Fixes logic surrounding the Universal/Local bit. This bit represents whether the IID is locally/globally administered. The U/L bit is bit 1 of the MSB of the EUI-64. It should only be inverted in cases where there is a full EUI-64. In cases where the IID is derived from say, a short address, this bit should be forced to 0, indicating that it is locally administered.
See:
https://tools.ietf.org/html/rfc4291#section-2.5.1https://tools.ietf.org/html/rfc4944#section-6https://tools.ietf.org/html/rfc2464#section-4
* sixlowpan: Account for endianness with U/L bit.
Approved-by: GregoryN <gnutt@nuttx.org>
Fix lc823450 related
* configs/lc823450-xgevk: Fix IOB params in rndis/defconfig
These prameters work for HTTP audio streaming.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Fix up_allocate_heap() in lc823450_allocateheap2.c
This change fixes heap size and also implements up_addregion().
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
net/sixlowpan: Fixes decompression of ipaddr from MAC address. The logic used to populate the IP from the radio address should match sixlowpan_ipfromsaddr/sixlowpan_ipfromeaddr
Approved-by: GregoryN <gnutt@nuttx.org>
arch/arm/src/stm32f0l0: Some fixes for a clean build. Still have a problem with lots of error messages coming from kconfig-mconf, but the configuation looks fine. Sometimes kconfig errors are difficult to spot. I would appreciate it anyone can spot the issue.
arch/arm/src/stm32f0l0/hardware: Rename the chip directory to hardware. This will hopefully eliminate some problems that I have seen with the chip include paths not being unique in more complex configuartions.
configs/nucleo-f072rb, configs/nucleo-f091rc, configs/stm32f051-discovery, and configs/stm32f072-discovery: Update for all of the naming changes made in arch/arm/src/stm32f0l0
arch/arm/include/stm32f0l0: Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0. Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
arch/arm/src/stm32f0l0: Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0. Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h: Adjust cloned CC13x9 FCFG1 header file so that it reflects reality.
arch/arm/src/tiva/hardware/cc13x0/cc13x0_fcfg1.h: Add CC13x0 FCFG1 header file. Initial commit is the same as the CC13x2/CC26x2 FCFG1 header with a few name changes.
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_fcfg1.h: Initial FCFG1 header file for the cc13xx/cc26xx family.
arch/arm/src/tiva: Add GPIO IRQ stubs for clean compile
arch/arm/src/tiva/cc13xx: Add build framework for CC13xx GPIO interrupts. Change prototypes of some GPIO IRQ interfaces so that the function prototype is common between LM3S, LM4F, TM4C, and CC13xx.
Master
configs/nucleo-f334r8: add example for the SPWM generation (custom STM32 PWM usage)
arch/arm/src/stm32/stm32_pwm: fix compilation errors if the upper-half PWM logic is not enabled
include/nuttx/drivers/pwm.h: remove dependency on CONFIG_PWM for the upper-half PWM header. This allows compilation for the lower-level PWM drivers even if the upper-half PWM logic is not used.
arch/arm/src/stm32/stm32_tim.c: fix compilation error if there is no TIM8
configs/nucleo-f334r8/highpri: remove the upper-half ADC from configuration
configs/nucleo-f302r8/highpri: remove the upper-half ADC from configuration
configs/stm32f429i-disco/highpri: remove the upper-half ADC from configuration
Approved-by: GregoryN <gnutt@nuttx.org>
arch/arm/src/tiva: Add CC13xx GPIO driver plus various fixes for clean compilation.
arch/arm/src/tiva/ and configs/launchxl-cc1312r1: Make type of the GPIO pin configuration an abstract type so that CC13xx MCUs can share the same GPIO function prototypes and usage model.
arch/arm/src/tiva: Add CC13xx logic to enable power domains needed by peripherals and to enable clocking to peripherals.
arch/arm/src/tiva: Rename some header files so that they are unique in order to avoid including the wrong file. Fix various compile issues found during some initial trial builds.
arch/arm/src/tiva: Add CC13xx clock enable and power enable macros that are backward compatible with lm/tm4c macros.
