The FPU register saving upon vfork entry was missing.
Also added macro that tells the actual size of an FPU reg, instead
of just having a coefficient for qfpu/no-qfpu.
Summary:
- This commit adds support for semihosting and hostfs
Impact:
- None
Testing:
- Tested with nsh and nsh64 (defconfig will be updated later)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
by renaming riscv_dispatch_syscall to sys_callx, so the caller
don't need the immediate step(syscallx->riscv_dispatch_syscall)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This implements initial support for kernel build (address environments,
page allocator) for RISC-V.
This is done a bit differently compared to the ARMV7 implementation:
- Support implemented for Sv39 MMU, however the implementation should be
extensible for other MMU types also.
- Instead of preserving and moving the L1 references around, a canonical
approach is used instead, where the page table base address register
is switched upon context switch.
- To preserve a bit of memory, only a single L1/L2 table is supported,
this gives access to 1GiB of virtual memory for each process, which
should be more than enough.
Some things worth noting:
- Assumes page pool is mapped with vaddr=paddr mappings
- The CONFIG_ARCH_XXXX_VBASE and CONFIG_ARCH_XXXX_NPAGES values are
ignored, with the exception of CONFIG_ARCH_DATA_VBASE which is used
for ARCH_DATA_RESERVE
- ARCH_DATA_RESERVE is placed at the beginning of the userspace task's
address environment
IRQ_NSTACKS, ARCH_CPU_COUNT, CONFIG_SMP_NCPUS all relate to each
other. However, a bit of clean up can be done and everything can
be merged into SMP_NCPUS.
The MPFS bootloader case works also as it requires only 1 IRQ stack
for the hart that executes as bootloader.
ESP32C3 use customized irq encoding so it's hard to share further code
with other risc-v based chips, in this patch, we keep the exception
number definition with risc-v spec.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
- Add config "ARCH_USE_S_MODE" which controls whether the kernel
runs in M-mode or S-mode
- Add more MSTATUS and most of the SSTATUS register definitions
- Add more MIP flags for interrupt delegation
- Add handling of interrupts from S-mode
- Add handling of FPU from S-mode
- Add new context handling functions that are not dependent on the trap
handlers / ecall
NOTE: S-mode requires a companion SW (SBI) which is not yet implemented,
thus S-mode is not usable as is, yet.
They are not really defined and used in any where:
uint32_t up_getmisa(void);
uint32_t up_getarchid(void);
uint32_t up_getimpid(void);
uint32_t up_getvendorid(void);
uint32_t up_gethartid(void);
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
- Add test for mode support, which is architecture dependent
- Add tests for address alignment and region size
- Add option to query for access rights
- The function goes through every PMP entry and tests if an address
range from [base, base+size] has been configured for desired
access rights.
- If several PMP entries match the range and access rights, the
information is combined
- End result is either no access, a partial match was found, or a full
match was found. Details about the partial match are not provided.
The intent for testing access rights and not just blindly applying them
is a case where they are already set in e.g. a bootloader. In this
case, nothing should be done, unless the configuration does not match,
in which case the software must not continue further.
It can provide better auto complete experience for modern code editor,
since they use clang/gcc based parser to analyze code but lacks some
target dependent info such as __LP64__ for riscv64.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Gregory Nutt has submitted the SGA
Omni Hoverboards has submitted the SGA
David Sidrane has submitted the ICLA
Mateusz Szafoni has submitted the ICLA
Sebastien Lorquet has submitted the ICLA
Paul Alexander Patience has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Ken Pettit has submitted the ICLA and we can migrate the licenses
to Apache.
Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
tcpip ok
update wifi demo configuration
fix tcpip input cause misalign fault
change some api definetions in nuttx
fix wifi manager strlen copy without suffix null character
fix 602 network buf allocation issue
wifi scan works
[ble] Add controller code
[BLE] Add nuttx adapt code for blecontroller .
[BLE] modified include file path, to fix cflag is too long.
[ble]Test ble peripheral pass, save code.
[ble] Organize the code
[BLE] Add blecontroller config for nuttx
[BLE] Add config for ble example
fix tcp lost packet when rx
support wpa3.
Copy default config from wifi default config. Create ble for local test and ble tester for autopts.
Add config for local test.
Add pts teset config for host test
Add config for mesh test
Create task to init blecontroller
Delete blecontroller rx thread.
using idle task to receive hci command from host
Set ble device name to /dev/ble, and fix code.
1.fix a ke schedule risk 2. CFG_HOST is enabled only in the case that CONFIG_BLE_HOST_DISABLE is not enabled, by lanlan
rm _sp_main stack.
change h/l workq_stack_size 6K
change l workq_stack_size 3K.
[ble] delete file_detach
color idle stack.
clear bl602 netdev code
SCAN is sorted according to RSSI
enlarge nsh command line buffer
fixup stack overflow check checkfail when startup
arch/risc-v/BL602:fix reboot cause crash
reboot default use romapi.
riscv/bl602:netdev support defered input, remove wifi_tx function
risc-v/bl602:fix sem_timedwait usage error in bl_cmds
risc-v/bl602:fix memory access out of bounds when copy ssid
remove ble and wifi source, download when build
add bl602 blob gitignore
risc-v/bl602:remove ble-pts defconfig
Fix some typos in NuttX style naming
Fix the replacement of tab to space
fix wlan interface down still receive packet
fix wapi crash, rx when ifdown,and ble_hci_rx_do
change system reset to rom dirver
change ble hci interval to 50ms
NuttX support wifi enable/disable log via KConfig
support country code configuration in Kconfig
fix ap tx not work
The GPIO example was also extended to include testing an interrupt pin.
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
This commits adds support for the ESP32-C3 IO Mux and GPIO Matrix. It
also includes necessary board logic to run the GPIO example with 2
outputs.
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Modify the default configuration in KConfig.
Sync latest commit from mainline.
Remove unused demo configuration
fixup bl602 nsh defconfig cause CICD failed
Rebase from mainline code
