As ESP32 has 2 I2C interfaces and BMP180 is a I2C sensor, the criterias to use BMP180 in I2C0 or I2C1 are:
1- First, bring-up routines search for BMP180 in I2C0.
If BMP180 is found in I2C0, then /dev/press0 is created.
2- If BMP180 cannot be registered in I2C0, bring-up routines search for it in I2C1.
If BMP180 is found in I2C1, then /dev/press0 is created.
It means only one BMP180 could be suported in Nuttx. In my tests I've observed
that BMP180 example application doesn't seem to work with /dev/press1 BMP180 device,
therefore even BMP180 is found in I2C1, it'll be registered as /dev/press0 device.
It was missing and it wasn't possible to enable I2C (0 and/or 1)
before this fix.
To sum up, this fix implements a I2C register function in ESP32
bring-up routines (esp32_bringup.c) and call if for I2C0 and/or
I2C1 during ESP32 bringup (these function callings are conditioned
by CONFIG_ESP32_I2C (to check if I2C support has been configured),
CONFIG_ESP32_I2C0 (to check if I2C0 support has been configured)
and CONFIG_ESP32_I2C1 (to check if I2C1 support has been configured).
Once this fix is implemented, /dev/i2c0 and/or /dev/i2c1 interfaces
become available and work fine.
interrupts.
This example uses the GPIO driver with the 3 on board LEDs outputs and one input
as an interrupt pin.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
regards to the data used by the ROM.
Static alloaction sections should end at the begining of the ROM data.
The rest of memory (End of ROM data --> End of DRAM) is added to the
heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
In the current compilation environment, the recursive assignment(=) for compile
flags will be delayed until every file is actually need to be compile.
For example:
--------------------------------------------------------------------------------
arch/arm/src/Makefile:
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)common}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(ARCH_SUBDIR)}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)sched}
CPPFLAGS += $(INCLUDES) $(EXTRAFLAGS)
CFLAGS += $(INCLUDES) $(EXTRAFLAGS)
CXXFLAGS += $(INCLUDES) $(EXTRAFLAGS)
AFLAGS += $(INCLUDES) $(EXTRAFLAGS)
--------------------------------------------------------------------------------
All compilation options will be included recursively,
which will be delayed until the compilation options are actually used:
tools/Config.mk:
--------------------------------------------------------------------------------
define COMPILE
@echo "CC: $1"
$(Q) $(CC) -c $(CFLAGS) $($(strip $1)_CFLAGS) $1 -o $2
endef
--------------------------------------------------------------------------------
All compile flags to be reexecuted $(INCDIR) as long as one file needs to be compiled,
but in fact, the compilation options have not changed in the current directory.
So the we recommand to change the syntax of assignment
From
Recursive (=)
To
Simple (:=)
In this way, we can ensure that all compilation options are expanded only once and reducing repeated works.
Signed-off-by: chao.an <anchao@xiaomi.com>
Add new option -A is added to tools/testbuild.sh that will take the
created build executable and store it in a folder for the config
that generated it under $ARTIFACTDIR which can be set via an
environment variable or defaulted to $(TOPDIR)/buildartifacts
This is also helpful for local testing because you can now run
tools/testbuild.sh -A sim.dat and have all of the simulation
targets generated without having to rebuild along the way.
In the GitHub Actions workflow the artifacs are uploaded
two two bundles one for macOS and one for Linux
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
Fixes an issue I saw when trying libcxx.
esptool.py has a limit of 16 sections.
It complains like:
A fatal error occurred: Invalid segment count 23 (max 16).
Usually this indicates a linker script problem.
Both CPUs are soft-reset with a call to board_reset. This is actually a
Core Reset, so both cores and all registers are reset. The only
exception is RTC.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
to save the preserved space(1KB) and also avoid the heap overhead
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I694073f68e1bd63960cedeea1ddec441437be025
In the commit
612acb9d93
the CONFIG_PREALLOC_MQ_MSGS is set by default to 4 and should be removed from defconfig.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Change the preallocated message and descriptor from 32/24 to 4.
The total size is reduce from 1892 to 532
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I79d199465daef678986868f773876289859f42fc
Summary
- This commit should fix CI errors
Impact
- No impact
Testing
- Build check only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
since the maximum number of argument pass to wd_start in the whole
code base is 2 and change CONFIG_MAX_WDOGPARMS in some defconfig
from 1 to 2 oherwise pthread_condclockwait will fail
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ib6cb28b8c0722058849e7be916e164513431d21c
ESP32 runs code in a SPI Flash, so users can also use it to store
data directly or mount some parts into a filesystem.
The SPI Flash usually use SPI0.
This driver was implemented by Dong Heng dongheng@espressif.com
and modified to fix coding style by Alan Carvalho de Assis.
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
Make.defs under board folder can still overwrite the default as needed
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I1c300a8ace4b54d475ef8d398661ed65ca273a2e
so all boards support uClibc++/libc++ automatically
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ibe6fafbec57f7acb26ea6188a3e9923ea82295c5
since cxx initialization is controlled by CONFIG_HAVE_CXXINITIALIZE now
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I39438dc3006d0a0b810052ecef50cd3c92f09d83
Only Make.defs files tht followed the same pattern as the ARM Make.defs were modified. This excludes some of the sim and renesas Make.defs files and all of the z80 Make.defs files.
