Masayuki Ishikawa reports that this commit breaks ALL PROTECTED mode builds.
It violates the basic requirements of the use of the MPU in protected mode. Those basic requirements are:
1. The MPU region must be aligned to the base address of the memory region being mapped (it may NEVER extend before the memory region). That is, the following MUST always be zero:
(base & ((1 << l2size) - 1))
2. The MPU region must never extend beyond the end of the memory region. That is, the following must be true:
size >= (1 << l2size)
This reverts commit 8b63d02309.
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
Many small changes related to coding style.
Author: Petro Karashchenko <petro.karashchenko@gmail.com>
configs/beaglebone-black: Adds initial support for the BeagleBone Black board.
arch/arm/src/am335x: Adds initial support for the TI AM355x family.
Fix lc823450 start
* arch/arm/src/lc823450: Use CONFIG_STACK_COLORATION instead of CONFIG_DEBUG_STACK
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Fix go_os_start() in lc823450_start.c
I found a bug in go_os_start() that it returns immediately
because it does not compare r1 to zero. This commit fixes
this bug. Also, this commit fixes its description.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/stm32f0l0: Various changes for a clean compilation. Still does not compile correctly due to missing FLASH latency definitions.
arch/arm/src/stm32f0l0/hardware: Add framework for the STM32 L0. Currently set to same as the STM32F0.
arch/arm/src/stm32f0l0/hardware: Very fragmentary FLASH header register definitions for the STM32 L0.
arch/arm/src/stm32f0l0: Bring in DMA v1. Cannot possibly be functionaly yet due to the limited number for M0 interrupts.
arch/arm/src/stm32f0l0: Add STM32 F0/L0 LSE and backup power domain controls.
arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h: Add STM32L0 PWR header file.
arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.
arch/arm/include/stm32f0l0/chip.h: WIP.
arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.
arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.
nuttx/arch/arm/include/stm32f0l0: Add STM32L0 IRQ number definition file.
arch/arm/src/stm32f0l0: Add STM32L0 RCC driver.
arch/arm/src/stm32f0l0/hardware: Adds basic STM32L0 header files.
arch/arm/src/stm32f0l0: Add STM32L0 chip selections.
configs/: Hook new STM32L0 boards into the configuration system.
configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled
configs: add basic support for nucleo-l073rz
configs: add basic support for b-l072z-lrwan1
- Avoids the use of up_aesinitialize() entirely, which resolves dependency problems, because this function does not make sure that an actual hardware aes implementation was made available: each SoC is now responsible to ensure the AES hardware is initialized before first use. This applies to lpc43xx, stm32 and sam34.
- Remove definitions of the NEVER used aes_init and aes_update operations. The new AES API will be more suitable.
- Change the unusual naming in stm32 (avoiding possible naming clashes)
- Change the unusual naming in sam34 (avoiding possible naming clashes)
- Add some FAR to pointers and enforce the 80 col limit in stm32 and sam
Fix lc823450 related
* configs/lc823450-xgevk: Fix IOB params in rndis/defconfig
These prameters work for HTTP audio streaming.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Fix up_allocate_heap() in lc823450_allocateheap2.c
This change fixes heap size and also implements up_addregion().
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
arch/arm/src/stm32f0l0: Some fixes for a clean build. Still have a problem with lots of error messages coming from kconfig-mconf, but the configuation looks fine. Sometimes kconfig errors are difficult to spot. I would appreciate it anyone can spot the issue.
arch/arm/src/stm32f0l0/hardware: Rename the chip directory to hardware. This will hopefully eliminate some problems that I have seen with the chip include paths not being unique in more complex configuartions.
configs/nucleo-f072rb, configs/nucleo-f091rc, configs/stm32f051-discovery, and configs/stm32f072-discovery: Update for all of the naming changes made in arch/arm/src/stm32f0l0
arch/arm/include/stm32f0l0: Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0. Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
arch/arm/src/stm32f0l0: Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0. Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
