current implementation incorrectly update CURRENT_REGS to interrupt context if
trigger nested interrupt, (e.g, hard fault occurs during interrupt handling)
this would ambiguous for programs using CURRENT_REGS, this patch will prohibit
the update of CURRENT_REGS on nested interrupt handling
Signed-off-by: chao.an <anchao@xiaomi.com>
Some toolchains may be built without libm support, but using
such toochain should not generate any errors in case if math
functions are not used in the program
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.
Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
When enable DEBUG_TCBINFO config, a global struct will
provide, then debuggers can aware nuttx task infomation.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
This reverts commit d9a5b92c1a306a70df52d50a02a80dc8ef20bf0d.
Revert "arch/arm: Remove -march and -mtune"
This reverts commit b8e99cf12f3a287311a2d341f285c71a5da3e4d4.
When NuttX is booted from a foreign (non NuttX)
bootloader. There as a possibility that the
bootloader configured the MPU, in an
incompatible way for the NuttX memory usage.
The option to reset the MPU before it is initialized
may not succeed if the bss and data initialization
code violated the previous MPU configurations.
Added herein are ARM_MPU_RESET and
ARM_MPU_EARLY_RESET. The former can be used
If the system is capable of booting and running
NuttX MPU configuration code without an MPU
violation. The latter is used if the system can
not run the bss and data initialization code.
These are options so that a NuttX may be configured to
not clobber a bootloader MPU configuration in a system
that is architected to share the MPU configuration task.
This reverts commit 45672c269d.
Because:
* It's very confusing to have cc as LD.
* I don't see what "-nostartfiles -nodefaultlibs" in LDFLAGS are
supposed to do when we use LD directly. It would be simpler to
remove them from our LDFLAGS.
use the same condition check in declaration and reference
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.
* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
arch: Allocate the space from the beginning in up_stack_frame
and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
1.To support the different MCU in series(e.g. cortex-m0+)
2.It's redundant since we already specify in compliler option
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Pierre-Noel Bouteville has submitted the ICLA and we can migrate the licenses
to Apache.
David Sidrane has submitted the ICLA and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
David S. Alessio has submitted the ICL and we can migrate the licenses
to Apache.
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
In scenarios where there is suspicion that someone might be touching your data when you don't expect, you can setup a watchpoint, and then guard accesses that you know are valid. If the debugger halts due to the watchpoint, you'll see where the unexpected access is coming from.
Bug description:
CONFIG_SMP=y
Suppose we have 2 cores in SMP, here is the ps return:
PID GROUP CPU PRI POLICY TYPE NPX STATE STACK USED FILLED COMMAND
0 0 0 0 FIFO Kthread N-- Assigned 004076 000748 18.3% CPU0 IDLE
1 0 1 0 FIFO Kthread N-- Running 004096 000540 13.1% CPU1 IDLE
nsh> kill -4 0
or:
nsh> kill -4 1
system blocked.
Reason:
In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.
Fix:
Add condition to cover saved_irqcount == 0.
Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
Summary:
- This commit fixes global IRQ control logic
- In previous implementation, g_cpu_irqset for a remote CPU was
set in sched_add_readytorun(), sched_remove_readytorun() and
up_schedule_sigaction()
- In this implementation, they are removed.
- Instead, in the pause handler, call enter_critical_setion()
which will call up_cpu_paused() then acquire g_cpu_irqlock
- So if a new task with irqcount > 1 restarts on the remote CPU,
the CPU will only hold a critical section. Thus, the issue such as
'POSSIBLE FOR TWO CPUs TO HOLD A CRITICAL SECTION' could be resolved.
- Fix nxsched_resume_scheduler() so that it does not call spin_clrbit()
if a CPU does not hold a g_cpu_irqset
- Fix nxtask_exit() so that it acquires g_cpu_irqlock
- Update TODO
Impact:
- All SMP implementations
Testing:
- Tested with smp, ostest with the following configurations
- Tested with spresense:wifi_smp (NCPUS=2,4)
- Tested with sabre-6quad:smp (QEMU, dev board)
- Tested with maix-bit:smp (QEMU)
- Tested with esp32-core:smp (QEMU)
- Tested with lc823450-xgevk:rndis
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
and remove the special handling in the stack dump
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
PR #1450 broke the Cygwin build. Refer to Issue #1672.
The use of of logic like:
EXTRA_LIBPATHS += -L "${dir ${shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcc.a}}"
fails when the Toolchain $(CC) is a native Windows toolchain. That is because the returned path is a Windows-style patch which cannot be handled by the make 'dir' command. Commit 4910d43ab0 reorganized a lot of definitions and replaced the correct code with the use of the limit make 'dir' command. The original code used the Bash dirname command which does not suffer from this limitation; it can handle both POSIX and Windows paths.
This was verified using the stm32f4discover:nsh toolchain with the Windows native ARM Embedded toolchain. That toolchain returns:
arm-none-eabi-gcc --print-file-name=libgcc.a
c:/program files (x86)/gnu tools arm embedded/9 2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/libgcc.a
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
since exit will be only callable from userspace and change
the 1st argument from "const uint8_t *" to "const char *"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I86487d57210ab63109148232da71dbc4d60a563b
