Commit Graph

595 Commits

Author SHA1 Message Date
Mateusz Szafoni
a9626f3ad3 /arch/arm/src/stm32: Bring in some mostly cosmetic updates from PR783 (most of the PR is going to the stm32f0l0 directory). 2018-12-18 10:53:49 -06:00
Gregory Nutt
b4ab6bc7f2 Squashed commit of the following:
arch/arm/src/stm32f0l0:  Some fixes for a clean build.  Still have a problem with lots of error messages coming from kconfig-mconf, but the configuation looks fine.  Sometimes kconfig errors are difficult to spot.  I would appreciate it anyone can spot the issue.

    arch/arm/src/stm32f0l0/hardware:  Rename the chip directory to hardware.  This will hopefully eliminate some problems that I have seen with the chip include paths not being unique in more complex configuartions.

    configs/nucleo-f072rb, configs/nucleo-f091rc, configs/stm32f051-discovery, and configs/stm32f072-discovery:  Update for all of the naming changes made in arch/arm/src/stm32f0l0

    arch/arm/include/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.

    arch/arm/src/stm32f0l0:  Rename stm32f0 to stm32f0l0 to make a speace for STM32 L0.  Rename files, functions and defines, removeing the f0_ from the names in order to make them MCU agnostic.
2018-12-16 10:50:16 -06:00
Gregory Nutt
7113cef6b7 Squashed commit of the following:
arch/arm/src/tiva:  Add CC13xx logic to enable power domains needed by peripherals and to enable clocking to peripherals.

    arch/arm/src/tiva:  Rename some header files so that they are unique in order to avoid including the wrong file.  Fix various compile issues found during some initial trial builds.

    arch/arm/src/tiva:  Add CC13xx clock enable and power enable macros that are backward compatible with lm/tm4c macros.
2018-12-09 07:03:10 -06:00
Mateusz Szafoni
ca4ef377fb Merged in raiden00/nuttx_pe (pull request #776)
arch/arm/include/stm32/chip.h: fix typo

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-06 17:52:11 +00:00
Gregory Nutt
619998e32d arch/arm/include/tiva/tm4c_irq.h: Fix a typo introduced in recent changes. Found in build testing. 2018-12-06 08:42:24 -06:00
Gregory Nutt
d830b323dd arch/arm/src/tiva: Starting to work through alternate function pin configuration and GPIO interrupts for C13xx. Works a lot differently than the LM and Tiva parts. 2018-12-05 15:17:22 -06:00
Mateusz Szafoni
428b625428 Merged in raiden00/nuttx_pe (pull request #773)
arch/arm/include/stm32/chip.h: remove redundant STM32 family definitions. It is already done in arch/arm/src/stm32/Kconfig

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-05 11:46:36 +00:00
Gregory Nutt
3d23c68c05 arch/arm/src/tiva: Add GPIO header files. Reoganized tiva_gpio.c so that we can also handle the cc13xx GPIO which is very different. 2018-12-04 13:16:52 -06:00
Dave Marples
d0cda60442 In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts. 2018-12-03 17:41:59 -06:00
Gregory Nutt
ffc7dbf36b arch/arm/include/tiva: Add support for cc13xx interrupts. arch/arm/src/armv7-m: Add FPB header file. 2018-12-03 07:26:02 -06:00
Gregory Nutt
f0e6e06a37 Squashed commit of the following:
arch/arm/src/tiva/hardwar:  Move LM3S and LM4F include files to hardware/lm/ sub-directory.  Move all TM4C header files files to hardware/tm4c/ sub-directory.

    arch/arm:  Add basic configuration/build support for CC13xx parts.  Conditioned on EXPERIMENTAL.
2018-12-01 12:22:05 -06:00
Mateusz Szafoni
0a288ac3db Merged in raiden00/nuttx_pe (pull request #769)
configs: add support for nucleo-f103rb, nucleo-f207zg and nucleo-l152re

Approved-by: GregoryN <gnutt@nuttx.org>
2018-12-01 12:22:05 +00:00
Gregory Nutt
a6682a9bef Squashed commit of the following:
arch/arm/src/max326xx and configs/max32660-evsys/src:  Fix some issues with GPIO setup of output pins.  Correct polarity of on-board LED output.  The on-board LED is now functional.

    arch/arm/src/max326xx: WFI instruction in IDLE loop seems to interfere with stability.  Commented out for now.  Needs to be investigated further.
2018-11-28 11:20:31 -06:00
Gregory Nutt
b9903dc8c8 arch/arm/src/max326xx: Finish DMA implementation. Clean up compile issues when DMA, GPIO interrupts are enabled. 2018-11-20 11:14:11 -06:00
Gregory Nutt
03cd52a5a2 arch/arm/include/max326xx: Add missing MAX32660 interrupt vectors. arch/arm/src/max326xx: Add missing MAX32660 GPIO interrupt handler. 2018-11-19 18:02:57 -06:00
Gregory Nutt
1d2a69539b Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_serial.c:  Add a mostly commented out serial driver.  With this, we can accomplish a complete build with many warnings for 'Missing logic'
    configs/max32660-evsys/src/max326_button.c:  Add support for the on-board button.
    arch/arm/src/max326xx:  Add a mostly empty max326_lowputc.c file mostly so that we can get further in the compilation.  Fixed several more compile errors revealed by this.
    arch/arm/src/max326xx:  Add peripheral clock control header file.
2018-11-19 10:47:28 -06:00
Gregory Nutt
169198ff38 arch/arm/src/max326xx/max32660: Add GPIO driver and GPIO interrupt support. 2018-11-18 11:22:51 -06:00
Gregory Nutt
8e18e8ae54 arch/arm/src/max326xx: Get's past a few initial compile problems. Still a long road ahead. 2018-11-17 15:36:40 -06:00
Gregory Nutt
06f132c5d0 Brings in WIP port for the Maxim Integrated MAX326xx MCU family. Not really very much in place yet so marked EXPERIMENTAL in Kconfig file.
Squashed commit of the following:

    Update a README.  Mark MAX326XX as EXPERIMENTAL before bringing into master.
    arch/arm/src/max326xx/chip:  Add MAX32660 TMR register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 WDT register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 RTC register definition header files.
    arch/arm/src/max326xx/chip:  Add MAX32660 UART register definition header files.
    arch/arm/src/max326xx/chip:  Add DMA register definition header files.
    Update some comments explaining what is meant by a 'chip family'
    arch/arm/src/max326xx/chip:  Add GPIO register definition header files.
    arch/arm/src/max326xx/chip:  Add FLC register definition header files.
    arch/arm/src/max326xx/chip:  Add FCR, PWRSEQ, and SIR register definition header files.
    arch/arm/src/max326xx/chip:  Add ICC register definition header file.
    arch/arm/src/max326xx/chip:  Add memory map header files.
    arch/arm/include/max326xx:  Minor fleshing out.
    arch/arm/arm/include/max326xx: Add basic support for Maxim MAX326xx family.  arch/arm/Kconfig and arch/arm/src/max326xx/Kconfig:  Add basic condiguration support for the MAX326xx.
2018-11-16 13:17:47 -06:00
Juha Niskanen
e37f260d67 arch/arm/src/stm32l4: add initial support for STM32L412 and STM32L422 chips 2018-11-09 09:54:20 -06:00
Petteri Aimonen
ec6c7839d3 Merged in paimonen/nuttx/pullreq_STM32_NDAC_fix (pull request #752)
NuttX: STM32F407VG has only one DAC

NDAC=2 causes compilation error when trying to use e.g. STM32_DAC1_CR macro.

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-09 12:15:57 +00:00
David Sidrane
a0745bbef6 Merged in david_s5/nuttx/master_imxrt (pull request #748)
Adding imxrt 106x

* imxrt:Fix comment in imxrt105x_memorymap

* imxrt:Add imxrt1060 memory map

* imxrt:Add imcrt106x to imxrt_memorymap

* imxrt:Add i.MX RT 106x to Kconfig

* imxrt:Moved IMXRT_GPIO_NPORTS to chip.h & fixed comments

* imxrt:105x IRQ fix comment

* imxrt:gpioirq GPIO4,5 using wrong boundry

* imxrt:Add RT106x irq headers & Kconfig

* imxrt:Add rt106x GPIO chip headers

* imxrt:Extend Number of GPIO ports

* imxrt:Add 106x DMAMUX header

* imxrt:iomuxc add 106x

* imxrt:106x iomuxc extend Indexes

* imxrt:pinmux Add 106x

* imxrt:clockconfig use imxrt_memorymap.h

* imxrt:allocateheap use OCRAM2 as BASE when avaialbe

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-06 22:47:20 +00:00
Mateusz Szafoni
2a4ed884b5 Merged in raiden00/nuttx_pe (pull request #743)
arch/arm/stm32: add support for STM32F303xD/E; configs: add basic support for nucleo-f303ze

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-28 16:39:56 +00:00
raiden00pl
342cbe58dd Merged in raiden00/nuttx_pe (pull request #732)
configs: add support for nucleo-f302r8 board

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-05 13:02:49 +00:00
raiden00pl
af8a002a10 Merged in raiden00/nuttx_h7 (pull request #720)
I2C support for STM32H7

* stm32h7/chip.h: update peripherals

* stm32h7x3xx_rcc.h: update definitions

* stm32h7x3xx_rcc.c: remove some unused code and configure I2C clocks

* stm32h7: add lower half I2C driver (based on F7 I2C driver)

* configs/nucleo-h743zi: add LSM303AGR and LSM6DSL configuration

* Remove whitespace

* sensors/lsm303agr.c, sensors/lsm6dsl.c: add mising include, remove whitespace

Approved-by: GregoryN <gnutt@nuttx.org>
2018-09-16 15:58:25 +00:00
Gregory Nutt
aee1c39eab configs/metro-m4: Fix RxD interrupt pin selection. The number SERCOM interrupts do not refer to PAD numbers, but to bit positions in the INFLAG register (very tiny footnote in the data sheet). With with final fix, the basic NSH configuration appears fully functional. 2018-09-01 15:29:22 -06:00
Gregory Nutt
6ada0e10ba configs/metro-m4: Fix RxD PAD selection. Add a configuration option to use OSCULP32K instead of XOSC32K. 2018-09-01 14:38:19 -06:00
Gregory Nutt
0001607f71 arch/arm: (1) Add semihost support for syslog, (2) Add semihost support for HostFS 2018-08-23 08:00:07 -06:00
Gregory Nutt
8c61c2f31b Remove trailing spaces at the end of lines. 2018-08-13 07:39:38 -06:00
Juha Niskanen
2589fc943e arch/arm/src/stm32l4: Add initial support to STM32L4+ chips 2018-08-13 07:06:51 -06:00
David Sidrane
9ef481ce4b Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/kinetis:  Cosmetic changes from review of coding standard.

Author: David Sidrane <david_s5@nscdg.com>
    Merged in david_s5/nuttx/master_kinetis (pull request #710)

    kinetis:Add DMA and use it as RX FIFOs on Serial

    * Add initial implementation of the DMA

    * Add across Kxx family support [WIP]

    * Incorporate the DMA into the serial

        Add polling to serial

        do DMA initialisation at UART startup and fix DMA mux setting.

        Fix circular DMA handling in the serial driver.

    * Adapt defconfig to enable UART1,4 RXDMA

    * [WIP] - refactor this with new CONFIG DMA settings

    * kinetis/Kconfig:Bring inline with upstream stucture

          1. Use the Serial console configuration from drivers/serial/Kconfig
            and friends.
          2. Prefix arch specific featurs as such
             UARTx_RXDMA->KINETIS_UARTx_RXDMA

    * Kinetis:Serial formatting and clean up

    * kinetis:DMA Formating and Cleanup

    * kinetis:serial Use cleaner DMA API

    * kinetis:Make.defs fix duplicate/errant kinetis_dma.o

    * kinetis:serial Fix warning/error on only one uart using DMA

          The driver can support no DMA on any UART, DMA on some
          UARTs or DMA on all UARTs.

          In the case of no DMA we disable the DMA based variables
          and logic. In the case of all DMA we disable the non
          DMA variables and logic, and in the mixed case both
          DMA and non DMA variable and logic are enabled.

    * kinetis:dma config fix formatting

    * kinetis:chip/dma fix formatting

    * kinetis:DMA config assume Unknown

           Assume KINETIS_DMA_VERSION_UKN for all SoC not versioned
           This is as the code was in nuttx prior to this commit

    * kinetis:DMAMUX contain versioning- use HAS pattern define Unknown

          The pattern for chip versioning is to define 'HAS' constants.
          Define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG to contain the
          version numbers to the include soc header and use that define
          in the chip headers.

          Define the KINETIS_DMAMUX_VERSION_UKN for the default as prior
          this commit addressing was by default monotonic for CHCFG

    * freedom-k66f:Disable Serial RXDMA

          The application has to add calling of the kinetis
          serial dma poll as it is application specific.

    Approved-by: GregoryN <gnutt@nuttx.org>
2018-08-10 08:03:50 -06:00
Juha Niskanen
e402dadf5d arch/arm/src/stm32l4: Avoid using redundant CONFIG_STM32L4_STM32L4X2. This is almost always same as CONFIG_STM32L4_STM32L4X3. Avoid duplication to reduce macro clutter. This patch limits CONFIG_STM32L4_STM32L4X2 usage to dependency tracking and pinmap. Also enable ADC for CONFIG_STM32L4_STM32L4X5 (untested, but same RM). 2018-08-09 06:42:54 -06:00
Gregory Nutt
5996d70883 Revise commit 09ccd43d61: That change had the subtle side-effect of unconditionally enabling interrupts in the primask. That may be what we want in most cases, but certainly not all. This does increse the size of the inline function by about 48-bits per instantiation. 2018-08-04 07:37:31 -06:00
Gregory Nutt
09ccd43d61 arch/arm/include/armv7-m, arch/arm/include/armv7-m, arch/arm/include/stm32f7: Add a configuration to enable workaround for r0p1 Errata 837070: Increasing priority usingwrite to BASEPRI does not take effect immediately.
This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower priority than the new boosted priority can pre-empt execution.  Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted priority. This effect is only limited to the next instruction. Subsequent instructions are guaranteed to see the new boosted priority.

This was raised in Bitbucket issue 113 from Vadzim Dambrouski.
2018-08-02 16:51:58 -06:00
Gregory Nutt
754c8493ff arch/arm/src/samd5e5: Leverage the SAMD2L2 DMA controller. 2018-07-29 11:31:26 -06:00
Gregory Nutt
a9d713bbcc This is the initial commit the port to the SAMD5x/E5x MCU family and also support for the Adafruit Metro M4 board. It port is untested and unfinished. It currently will not even link due to some missing clock related logic.
Squashed commit of the following:

    arch/arm/src/samd5e5: Clean-up EIC logic.
    arch/arm/src/samd5e5:  Fix some compilation issues; Still issues with the EIC logic from samd2x.
    arch/arm/src/samd5e5:  Fix some compilation issues; bring in some EIC logic from samd2x.
    arch/arm/src/samd5e5:  Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
    configs/metro-m4:  Add LED support.
    arch/arm/src/samd5e5:  Bring in SAML21 clock configuration.  This is a WIP; it cannot possible even compile yet.
    arch/arm/src/samd5e5:  Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
    arch/arm/src/samd5e5: Add SERCOM utility function.
    arch/arm/src/samd5e5:  Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5.  This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
    arch/arm/src/samd5e5: Add sam_config.h header file
    arch/arm/src/samd5e5/:  Add Generic Clock (GCLK) utility functions.
    arch/arm/src/samd5e5:  Add EVSYS register definition file
    arch/arm/src/samd5e5 and configs/metro-m4:  Use SERCOM3 for the Arduino serial shield as console.
    arch/arm/src/samd5e5/chip:  Add SERCOM USART, SPI, I2C master, and slave register defintions header files
    arch/arm/src/samd5e5/chip:  Add AES, PM, TRNG, and WDT header files.
    arch/arm/src/samd5e5/chip:  Add pin multiplexing header files.
    Various fixes to configuration system; fix metro-m4/nsh defconfig file.
    configs/metro-m4:  Add initial support for the Adafruit Metro M4 board.
    arch/arm/src/samd5e5:  Add peripheral clock helpers.
    arch/arm/src/samd5e5/chip:  Add PAC register definition header file.  Fix some errors in the memory map header file.
    arch/arm/src/samd5e5:  Add chip.h headerf file.
    arch/arm/src/samd5e5:  Add PORT register definitions and support from SAML21.
    arch/arm/include/samd5e5:  Add interrupt vector definitions.
    arch/arm/src/samd5e5:  Add some boilerplate files.  Correct some typos.
    arch/arm/src/samd5e5/chip/sam_eic.h:  Add EIC register definitions.
    arch/arm/src/samd5e5/chip:  Add OSC32KCTRL and OSCCTRL register definitions.
    arch/arm/src/samd5e5/chip:  Add GCLK, MCLK, and RSTC header files.
    arch/arm/src/samd5e5/chip/sam_cmcc.h:  Add CMCC register definitions
    arch/arm/src/samd5e5/chip/sam_supc.h:  Add SUPC header file.
    arch/arm/src/samd5e5:  Add start-up logic.
    arch/arm/src/samd5e5:  Add Make.defs file
    arch/arm/src/samd5e5/chip:  Add memory map header file.
    arch/arm/include/samd5e5:  Add chip.h header file.
    arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig:  Add configuration logic for the SAMD5x/Ex family.
2018-07-26 12:12:08 -06:00
Gregory Nutt
c3b406826e Rename all usage of samdl/SAMDL to samd2l2/SAMD2L2 to make room in the name space for the forthcoming samd5e5/SAMD5E5
Squashed commit of the following:

    Change all remaining occurrences of SAMDL to SAMD2L2.

    configs/:  Change all remaining occurrences of SAMDL to SAMD2L2

    configs/:  Change all occurrences of CONFIG_SAMDL_* to CONFIG_SAMD2L2_*
    arch/arm/src and include:  Rename all directories from samdl to samd2l2.  Change all configuration variable names and other usage from SAMDL to SAMD2L2.
2018-07-22 15:54:12 -06:00
Daniel P. Carvalho
9223123cd2 arch/arm/src/stm32l4: Added custom pin mapping for STM32L4X2XX processors. 2018-07-16 15:42:13 -06:00
Alan Carvalho de Assis
283b73edc5 Fix lots of typos in C comments and Kconfig help text 2018-07-08 18:24:45 -06:00
Gregory Nutt
bdb73a60ca Fix some errors found in build testing. 2018-06-25 17:06:29 -06:00
Gregory Nutt
cb374e6e62 arch/: Clean up some naming and spacing. 2018-06-20 15:38:06 -06:00
Gregory Nutt
49ec86ddb1 arch/arm: Fix an error found in build testing. 2018-06-20 13:12:54 -06:00
Gregory Nutt
8bd9cfe038 Squashed commit of the following:
arch/arm:  Remove support for CONFIG_ARMV7M_CMNVECTOR.  It is now the only vector support available.  Also remove CONFIG_HAVE_CMNVECTOR.  That no longer signifies anything."
    arch/arm/src/stm32:  This commit removes support for the dedicated vector handling from the STM32 architecture support. Only common vectors are now supported.
2018-06-20 12:30:37 -06:00
Gregory Nutt
9a51854223 arch/arm/src/lc823450: This commit removes support for the dedicated vector handling from the LC823450 architecture support. Only common vectors are now supported. 2018-06-20 10:04:38 -06:00
Gregory Nutt
ade6751345 arch/arm/src/tiva: This commit removes support for the dedicated vector handling from the Tiva/LM architecture support. Only common vectors are now supported. 2018-06-20 09:18:42 -06:00
Gregory Nutt
b38618d0c6 Squashed commit of the following:
arch/arm/src/lpc17xx:  This commit removes support for the dedicated vector handling from the LPC17xx architectures. Only common vectors are now supported.
    arch/arm/src/kinetis:  This commit removes support for the dedicated vector handling from the Kinetis architectures. Only common vectors are now supported.
2018-06-20 08:18:32 -06:00
Gregory Nutt
01b740c66b arch/arm/src/efm32: Support for common vector handling is forced for all EFM32 chips. Yes the architecture provides support for the old-style dedicated vector handling which can never be compiled. Furthermore, the old-style dedicated vector handling is deprecated in favor of common vector handling. The commit resolves this inconsistency be removing support for the dedicated vector handling from the EFM32 architecture support. 2018-06-19 13:37:00 -06:00
Simon Laube
7b0475450c This commit brings in a partial, WIP port to the STMicro STM32H7. The port is still missing several key components that make unusable in its current form. However, the changes have lingered on a branch long enough.
See configs/nucleo-h743zi/README.txt for a detailed description of the state of the port.
2018-06-16 16:59:34 -06:00
Gregory Nutt
6230ab01b6 arch/arm/include/armv7-m: Last change requires inclusion of chip.h for definition. 2018-06-06 10:38:51 -06:00
Gregory Nutt
977d41d519 Based on a change recommended by Mark Shulte:
Signal handlers maybe run with interrupts enabled or disabled, depending on how the task the received the signal was blocked. (i.e.: If sem_wait() is called, then we disable interrupts, then block the currently running task). This could be dangerous, because user code would be running with interrupts disabled.

This change forces interrupts to be enabled in up_sigdeliver() before executing the signal handler calling up_irq_enable() explicitly.  This is safe because, when we return to normal execution, interrupts will be restored to their previous state when the signal handler returns.
2018-06-06 09:54:30 -06:00