Commit Graph

20279 Commits

Author SHA1 Message Date
anjiahao
bc30b294aa mm:add heap args to mm_malloc_size
use malloc_size inside of where used mm_malloc_size

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-01-17 21:57:37 +08:00
dongjiuzhu1
8101978765 arch/sim: fix compile break when using mallinfo_task with custom mm manager
/usr/bin/ld: nuttx.rel: in function `mallinfo_task':
nuttx/mm/umm_heap/umm_mallinfo.c:67: undefined reference to `mm_mallinfo_task'

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-01-17 16:48:30 +08:00
luoyong1
a32124879d arch/arm/src/armv7-a/r: fix kconfig error of l2 cache latency
fix the error of the config name and set latency config param bool to int

Signed-off-by: luoyong1 <luoyong1@xiaomi.com>
2023-01-17 12:45:42 +09:00
Xiang Xiao
62c5afe655 Fix warning in file included from chip/sam_clockconfig.c:34:
chip/sam_clockconfig.c: In function 'sam_usbclockconfig':
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:51: error: 'regval' is used uninitialized [-Werror=uninitialized]
  135 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                                                   ^
chip/sam_clockconfig.c:422:12: note: 'regval' was declared here
  422 |   uint32_t regval;
      |            ^~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-16 18:59:44 -03:00
ligd
fedad91b0d sim/mem: don't let siwtch out when operated the host mem
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-01-17 01:18:03 +08:00
ligd
c08cc01c9d sim/oneshot: don't need sleep_until when open CONFIG_SIM_WALLTIME_SIGNAL
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-01-17 01:18:03 +08:00
Xiang Xiao
f64da13e9b libxx: Add CXX_STANDARD to select -std=c++??
and default to "c++17"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-16 15:41:57 +02:00
TimJTi
6b4da4ad6e Ensure SFR CKTRIM register correctly set, SAMA5D2/D3 only 2023-01-16 21:40:00 +08:00
Dong Heng
118222ba46 xtensa/esp32: Partition device supports encryption mode 2023-01-16 09:55:44 -03:00
dongjiuzhu1
7cd325f3be mm/mm_heap: remove kasan in MM_ADD_BACKTRACE
do simple copy to instead of memset and memcpy operation because
they have been instrumented, if you access the posion area,
the system will crash.

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-01-16 20:32:17 +08:00
chao an
415a09115d boards/sim/windows: enable custom options
1. boards/sim: enable child status
2. boards/sim/windows: enable custom options
3. sim/windows: enable hostfs

Signed-off-by: chao an <anchao@xiaomi.com>
2023-01-16 20:30:39 +08:00
zhangyuan21
806a2a8b8d arch/armv7-ar: flush dcache when addr is not aligned with cache line
When invalidate address is not aligned with cache line,
must align address and flush the cache line.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-01-16 16:14:32 +08:00
zhangyuan21
4bb155db64 arch/arm: add barrier instruction for cache ops
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-01-16 16:14:32 +08:00
Xiang Xiao
f783f5c384 arch/arm: Fix typo error in cp15_cacheops.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-16 16:14:32 +08:00
Xiang Xiao
1ea9db4ebe Fix error: implicit declaration of function 'cp15_invalidate_icache'; did you mean 'cp15_invalidate_dcache'?
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-16 16:14:32 +08:00
chenrun1
c61195bcc9 arch/armv7-a & armv7-r:Add invalidate icache behavior
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-01-16 16:14:32 +08:00
ligd
7e4c5d3daa armv7a/r: cache function should depends on CONFIG_ARCH_XCACHE
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-01-16 16:14:32 +08:00
Julian Oes
22fa59074f stm32h7: add SMPS PWR option for STM32H7X7
The dual core STM32H747 / STM32H757 there is an additional option to
select SMPS rather than LDO as the power selection.

This commit adds this option to the STM32H747 config and the
stm32h7x7xx source.

Signed-off-by: Julian Oes <julian@oes.ch>
2023-01-16 13:31:23 +08:00
zhangyuan21
fc623949a3 arch/arm: move hard code macro to kconfig
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-01-16 13:31:04 +08:00
luoyong1
6975bbb38d arch/arm/src: add pl310 l2cache's kconfig for latency
Signed-off-by: luoyong1 <luoyong1@xiaomi.com>
2023-01-16 13:31:04 +08:00
Alan Carvalho de Assis
97402f9121 esp32: Fix QEnconder reset position and small typo
The PCNT RST bit needs to be set to zeroing the counter and then
this same bit needs to be cleared to returning counting.
2023-01-16 09:41:46 +08:00
Jukka Laitinen
f9c8b4015f Revert "arch: Don't free the context if the reference doesn't equal zero"
struct stm32_i2c_inst_s instance is allocated on every call to
stm32_i2cbus_initialize, and that instance is supposed to be deleted on every
call to stm32_i2cbus_uninitialize.

The "refs" counter just keeps track on when the last one is deleted, and
everything is unregisterd/disabled.

This reverts commit 8098c80338.
2023-01-15 19:52:05 +08:00
ssssenai
077ad5b45f arch: xtensa/esp32: Add esp32_himem_chardev.c
Summary:
- It is applicable to esp32 products and uses the himem part
  of 8M psram by creating character devices.

Impact:
- None

Testing:
- Use esp32-wrover series products for more than 1000 functional verifications.
2023-01-14 14:07:46 +08:00
Janne Rosberg
246a677045 sama5/sam_flexcom_spi: enable DMA support 2023-01-14 13:40:14 +08:00
Janne Rosberg
f6d164bf9d sama5/dmac: add defines for ATSAMA5D2
This allows xdma to be used on SAMA5D2x chips
2023-01-14 13:40:14 +08:00
ptr_b
890f9ad2ed arch/sim: add arch/math.h
To avoid introducing __GLIBC__ symbol which may affect others

Signed-off-by: ptr_b <bijunda1@xiaomi.com>
2023-01-13 23:09:47 +08:00
W-Mai
bcb0abc05d sim/posix/sim_linuxspi.c: fix select not work and incorrect behaviour
Fixed missing `SPI_SELECT` method and incorrect sending behavior in sim_linuxspi

Signed-off-by: xinbingnan <xinbingnan@xiaomi.com>
2023-01-13 15:32:13 +08:00
Petro Karashchenko
45ed6f657c arch/arm/cxd56xx: do not clear enabled callback event on card insertion
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-01-13 12:18:36 +08:00
dongjiuzhu1
cf987238c0 sim/hci: add depends on config for SIM_HCISOCKET to fix compile break
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-01-13 02:21:34 +08:00
Jukka Laitinen
70de321de3 arch/Kconfig: remove virtual memory allocator dependency from MM_SHM
The dependency should be vice versa; the MM_SHM should depend on the
existence of the virtual memory range allocator.

Create a new CONFIG flag CONFIG_ARCH_VMA_MAPPING, which will define that
there is a virtual memory range allocator. Make MM_SHM select that flag

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-01-13 02:20:13 +08:00
Lucas Saavedra Vaz
674b480198 arch/xtensa/esp32s2: Add initial support for touch pad polling 2023-01-12 22:23:42 +08:00
Lucas Saavedra Vaz
749d0dfe84 arch/xtensa/esp32s2: Add RTC GPIOs configuration functions 2023-01-12 22:23:42 +08:00
Lucas Saavedra Vaz
cdd0787b54 arch/xtensa/esp32: Fix typo and check PU/PD registers 2023-01-12 22:23:42 +08:00
Lucas Saavedra Vaz
3dad6b273e arch/xtensa/esp32s2: Add missing SENS and RTCCNTL registers 2023-01-12 22:23:42 +08:00
xinbingnan
383458c64e sim/Kconfig: move some i2c,spi configs from board to arch
Move `SIM_I2CBUS_ID` and `SIM_SPIDEV_NAME` from board to arch.
This allows you not to rely on board configuration.

Signed-off-by: xinbingnan <xinbingnan@xiaomi.com>
2023-01-11 17:28:43 +08:00
Lucas Saavedra Vaz
2b7d8981e2 arch/xtensa/esp32s3: Add initial support for touch pad polling 2023-01-11 02:00:41 +08:00
Lucas Saavedra Vaz
24995f6918 arch/xtensa/esp32s3: Add RTC GPIOs configuration functions 2023-01-11 02:00:41 +08:00
Lucas Saavedra Vaz
c8dd4b068d arch/xtensa/esp32s3: Add missing registers and definitions 2023-01-11 02:00:41 +08:00
Dong Heng
07342f7957 xtensa/esp32: SPI support to configure as R/W/RW mode 2023-01-11 01:54:36 +08:00
raiden00pl
88dd705d27 stm32/stm32f7 CANv1: protect TX buffer during CAN error frame generation
Follow up to eb240e0 (PR #8060)
2023-01-11 01:53:49 +08:00
chao an
eef818e51f risc-v/esp32c3: correct receive buffer size
1. correct receive buffer size, d_len should keep the l2 header size
2. fix race condition issue of de/enqueue rx queue

Signed-off-by: chao an <anchao@xiaomi.com>
2023-01-10 11:28:06 -03:00
Carlos Sanchez
eb240e014c stm32: protect TX buffer during CAN error frame generation. 2023-01-10 13:33:35 +08:00
Petro Karashchenko
5f92c62874 boards/cxd56xx/spresense: add fs automount driver for SD Card
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-01-10 10:39:23 +09:00
Carlos Sanchez
78248183aa s32k1xx: reserve MSG_DATA extra space only when needed by config. 2023-01-09 21:06:56 +02:00
Carlos Sanchez
3c6d45fa99 s32k1xx: avoid buffer overflow when CAN time is used for non-FD CAN.
s32k1xx: fix initialization of MAXMB field in MCR.
2023-01-09 21:06:56 +02:00
Dong Heng
67ccee2c4f xtensa/esp32: ESP32 SPI Flash encryption supports 16-bytes align writing 2023-01-10 01:10:10 +08:00
Sergey Nikitenko
e0f99d93ac stm32wb: add i2c driver 2023-01-09 09:27:17 +08:00
chenwen@espressif.com
eed2cce3f2 xtensa/esp32: Optimize WLAN device buffer 2023-01-07 13:46:37 +08:00
chenwen@espressif.com
933d1a0a80 xtensa/esp32: Add Wi-Fi softap event 2023-01-06 12:25:36 -03:00
Dong Heng
f137a7b552 xtensa/esp32: Fix macro "CONFIG_NETDEV_IOCTL" control range error 2023-01-06 20:40:53 +08:00
Dong Heng
7097cfd000 xtensa/esp32: Add option to enable ETH PHY reset pin 2023-01-06 20:40:53 +08:00
Lee Lup Yuen
6d70b91a55 arm64/a64: Fix PIO Interrupt
The current implementation of PIO Interrupt for Allwinner A64 is incomplete. This PR fixes the implementation of PIO Interrupt for all supported PIO Ports (PB, PG and PH).

### Modified Files

`arch/arm64/src/a64/a64_pio.c`, `a64_pio.h`: Add implementation of PIO Interrupt

`arch/arm64/include/a64/irq.h`: Add IRQ for PIO Port PH

`arch/arm64/src/a64/hardware/a64_pio.h`: Fix addresses of PIO Interrupt Registers
2023-01-06 13:43:44 +08:00
yinshengkai
4752dcd12a arch/stm32: Initialize up_perf after system boot
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-01-06 13:32:12 +08:00
anjiahao
172d467c26 arch:add faultmask register operation to armv7-m & armv8-m
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-01-05 23:17:43 +02:00
anjiahao
c02fea36d8 arch:change tcbinfo regs num
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-01-05 23:36:12 +08:00
gaojiawei
1486600d7d sim: Fix make tool doesn't rebuild dependencies of the libboard target
Signed-off-by: gaojiawei <gaojiawei@xiaomi.com>
2023-01-05 22:27:00 +08:00
Xiang Xiao
b0a0ba3ad7 fs: Move mmap callback before truncate in [file|mountpt]_operations
since mmap may exist in block_operations, but truncate may not,
moving mmap beforee truncate could make three struct more compatible

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-04 17:43:59 +02:00
Xiang Xiao
779a610ca3 Remove the unnecessary NULL fields in global instance definition of file_operations
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-04 00:32:13 +02:00
zouboan
7e81dce71c arm64/a64: add driver for Allwinner A64 I2C bus
arm64/a64: add driver for Allwinner A64 I2C bus

arm64/a64: add driver for Allwinner A64 I2C bus

arm64/a64: add driver for Allwinner A64 I2C bus
2023-01-03 01:45:56 +08:00
Jukka Laitinen
f33dc4df3f Change FIOC_MMAP into file operation call
- Add mmap into file_operations and remove it from ioctl definitions.
- Add mm_map structure definitions to support future unmapping
- Modify all drivers to initialize the operations struct accordingly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-01-02 11:23:20 -03:00
Jukka Laitinen
41e9df2f3e Add ftruncate into file operation calls
- Add truncate into file_operations
- Move truncate to be common for mountpt_operations and file_operations
- Modify all drivers to initialize the operations struct accordingly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-01-02 11:23:20 -03:00
Xiang Xiao
d3872e0479 arch/esp32c3: Fix the compiler error in esp32c3_spi.c
which is made by:
commit 87a1f69a3c
Author: Alan Carvalho de Assis <acassis@gmail.com>
Date:   Fri Dec 16 15:23:39 2022 -0300

    Modify the IRQ APIs to be compatible with ESP32/S2/S3

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-31 14:57:47 +02:00
Alan Carvalho de Assis
87a1f69a3c Modify the IRQ APIs to be compatible with ESP32/S2/S3 2022-12-31 12:47:41 +08:00
Peter van der Perk
75631e6169 S32K3XX Progmem fixes and size config 2022-12-29 22:12:19 +02:00
Alan Carvalho de Assis
1b58542dd4 esp32c3: Clear the timer interrupt to avoid losing the next one 2022-12-28 09:45:29 +08:00
Alan Carvalho de Assis
e3748be0e5 esp32s3: Clear the timer interrupt to avoid losing the next one 2022-12-28 09:45:29 +08:00
Alan Carvalho de Assis
e67b968f15 esp32s2: Clear the timer interrupt to avoid losing the next one 2022-12-28 09:45:29 +08:00
Alan Carvalho de Assis
1ab8c1ea01 esp32: Clear the timer interrupt to avoid losing the next one 2022-12-28 09:45:29 +08:00
zhangyuan21
f31ea8af7f arch: add volatile for regs in up_dump_register function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-27 13:34:03 +08:00
Lee Lup Yuen
17639af0a8 arm64/pinephone: Add driver for LCD Panel (Xingbangda XBD599)
This PR adds the driver for Xingbangda XBD599 LCD Panel (based on Sitronix ST7703 LCD Controller) on PINE64 PinePhone. This PR also includes:

- The driver for X-Powers AXP803 Power Mgmt IC, which calls our driver for Allwinner A64's Reduced Serial Bus. The PMIC Driver is needed to power on the MIPI DSI Interface for the LCD Panel.

- A simple Display Driver that renders a Test Pattern on the LCD Display at startup. It calls our Allwinner A64 drivers for Display Engine, Timing Controller TCON0 and MIPI Display Serial Interface.

The NuttX Frame Buffer Driver will be implemented in the next PR.

`arch/arm64/src/a64/a64_de.c`, `a64_de.h`: Changed the Frame Buffer pointer to `const` for Allwinner A64 Display Engine

`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for PWM, for controlling the PWM Backlight

`boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Call `fb_register()` to start the Display Driver at startup

`boards/arm64/a64/pinephone/src/Makefile`: Added LCD Driver, PMIC Driver and Display Driver to Makefile

`boards/arm64/a64/pinephone/Kconfig`: Added the Kconfig option for "PINE64 PinePhone > LCD Display" (`CONFIG_PINEPHONE_LCD`) which enables the LCD Driver, PMIC Driver and Display Driver

`boards/arm64/a64/pinephone/src/pinephone_lcd.c`, `pinephone_lcd.h`: Driver for Xingbangda XBD599 LCD Panel

`boards/arm64/a64/pinephone/src/pinephone_pmic.c`, `pinephone_pmic.h`: Driver for X-Powers AXP803 Power Mgmt IC

`boards/arm64/a64/pinephone/src/pinephone_display.c`: Simple Display Driver that renders a Test Pattern in `up_fbinitialize()`

`boards/arm64/a64/pinephone/configs/lcd/defconfig`: New PinePhone Board Configuration `pinephone:lcd` that enables the LCD Driver (`CONFIG_PINEPHONE_LCD`)

`platforms/arm/a64/boards/pinephone/index.rst`: Added PinePhone Board Configuration `pinephone:lcd` that enables the LCD Driver
2022-12-27 11:44:17 +08:00
Xiang Xiao
b9d7d00943 arch: Remove the unused arch color function variant
up_check_tcbstack_remain, up_check_stack, up_check_stack_remain and up_check_intstack_remain

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-24 22:40:52 +02:00
Masayuki Ishikawa
2f80a05eae arch: qemu-rv: Fix qemu_rv_mtimer_interrupt() for BUILD_KERNEL
Summary:
- I noticed that rv-virt:ksmp64 sometimes stops during boot.
- Finally, I found that it posts the Supervisor Software Interrupt
  before the OS finishes hardware initialization.
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-12-24 11:25:39 -03:00
zhangyuan21
45394eb6dc arch: save user context in assert common code
This is the work continue with #7875

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-24 13:02:56 +08:00
Peter van der Perk
aac9eb57e8 S32K3XX Progmem dataflash with littlefs support 2022-12-24 12:03:56 +08:00
Lee Lup Yuen
c8cf27e848 arm64/a64: Add driver for Reduced Serial Bus
This PR adds the driver for Reduced Serial Bus (RSB) on Allwinner A64 SoC. The RSB Driver will be called by the upcoming Power Mgmt IC Driver for PINE64 PinePhone, to power on the LCD Display.

`arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > RSB" (`CONFIG_A64_RSB`), which enables the RSB Driver

`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for RSB

`arch/arm64/src/a64/Make.defs`: Added the RSB Driver to the Makefile

`arch/arm64/src/a64/a64_de.c`: Increase PLL Timeout for Allwinner A64 Display Engine

`boards/arm64/a64/pinephone/configs/nsh/defconfig`: Set PinePhone Board Config `CONFIG_BOARD_LOOPSPERMSEC` to the value computed by `calib_udelay`

`arch/arm64/src/a64/a64_rsb.c`, `a64_rsb.h`: RSB Driver for Allwinner A64

`platforms/arm/a64/boards/pinephone/index.rst`: Added RSB as supported peripheral for PinePhone
2022-12-24 12:01:46 +08:00
Ville Juven
5fb3a960f5 riscv/addrenv: Test that satp contents make sense
Check that satp (the page directory root) is not 0, which means it has
not been set.
2022-12-23 10:47:04 +08:00
rajvinder kaur
3fd10fd504 s32k1xx\Kconfig: Add config option to enable UART invert setting. 2022-12-23 10:46:27 +08:00
Peter van der Perk
371f81d157 S32K3XX FlexCAN kconfig fix to work in conjunction with EMAC ioctl 2022-12-23 00:32:59 +08:00
Peter van der Perk
7f3cd2d3e8 S32K3XX EMAC MII PHY implementation 2022-12-23 00:32:59 +08:00
Peter van der Perk
7c8f3b4916 LPC17_40 CAN driver SocketCAN enforce TX fifo behaviour
Apply suggestions from code review

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-22 11:55:59 +08:00
TimJTi
e1b8c02f96 Add SAMA5D2 MCAN support
Update arch/arm/src/sama5/sam_mcan.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/sama5/sam_mcan.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/sama5/sam_mcan.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/sama5/sam_mcan.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/sama5/sam_mcan.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/sama5/sam_mcan.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-21 14:51:57 -03:00
ligd
18beaaa480 sim: remove unused variable in sim_saveusercontext()
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-21 17:45:32 +08:00
ligd
ec191d05b6 sim/looper: close interrupt when looper run
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-21 16:59:56 +09:00
ligd
5744c62443 sim: set timer irq as real timer
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-21 16:59:56 +09:00
Lee Lup Yuen
64a54d2dfd arm64/a64: Add driver for Display Engine
This PR adds the driver for Display Engine 2.0 on Allwinner A64 SoC. The Display Engine Driver will be called by the upcoming LCD Driver for PINE64 PinePhone.

`arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > DE" (`CONFIG_A64_DE`), which enables the Display Engine Driver

`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for Display Engine

`arch/arm64/src/a64/Make.defs`: Added the Display Engine Driver to the Makefile

`boards/arm64/a64/pinephone/configs/nsh/defconfig`: Removed Scheduler Debug Info (`CONFIG_DEBUG_SCHED_INFO`) from the PinePhone Board Config, because it garbles the Console Output.

`arch/arm64/src/a64/a64_de.c`, `a64_de.h`: Display Engine Driver for Allwinner A64

`platforms/arm/a64/boards/pinephone/index.rst`: Added Display Engine as supported peripheral for PinePhone
2022-12-21 13:17:34 +08:00
Petro Karashchenko
3e36f40130 compiler.h: rename printflike to printf_like
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-21 10:56:45 +08:00
Petro Karashchenko
b107e4f417 nuttx: unify MIN, MAX and ABS macro definition across the code
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-21 09:31:28 +08:00
Xiang Xiao
fd0d6a9bf5 compiler.h: Add _ between format|printf|syslog|scanf|strftime and like
align with other macro naming style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-21 01:05:19 +02:00
TimJTi
bc9b476d55 Update sam_mcan.c 2022-12-20 19:49:13 -03:00
ligd
886df37569 sim/fb: remove the lpwork in fb & lcd, merge to looper task
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-21 01:43:37 +08:00
zouboan
60c0184b76 A64/irq.h: Add irq definition of Allwinner A64 interrupts 2022-12-20 23:34:23 +08:00
ligd
2dbfd8e798 sim_uart: fix printf error when use irq mode
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-20 18:01:54 +08:00
dongjiuzhu1
eb102a668f sim/uart: check if txbuffer is not full before uart write
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-20 18:01:54 +08:00
David Sidrane
4fa163ade7 s32k3xx:EDMA fix git count 2022-12-20 18:01:21 +08:00
Peter Bee
9f537d7a3f sim/video: fix hang when user temporarily blocks
host_set_fmt should not return error when EBUSY

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-12-20 17:00:44 +08:00
Peter Bee
a897fe3005 sim/video: rename dq_buf to dqbuf
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-12-20 17:00:44 +08:00
David Sidrane
d33475d2d4 s32k3xx:Serial add DMA 2022-12-20 13:28:54 +08:00
ligd
f2de1ce930 sim/alsa: don't let siwtch out when open alsa mixer
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-20 13:28:19 +08:00
ligd
c74627cbec sim/head: don't let switch out when do poweroff
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-20 13:28:19 +08:00
TimJTi
e6bfaa14ee SAMA5D2 add Flexcom SPI
Flexcom working, DMA not looked at for SAMA5D2

Update sam_flexcom_spi.c

Update sam_flexcom_spi.h

Update sam_config.h

Update hardware/sam_flexcom_spi.h

pkarashchenko reviews

SAMA5 serial and flexcom serial corrections
2022-12-20 12:20:28 +08:00
David Sidrane
e89e7eab8d s32k1xx:serial:Fix selection of RTS to iflow 2022-12-20 01:51:10 +08:00
David Sidrane
033adeced4 imxrt:serial:Fix selection of RTS to iflow 2022-12-20 01:50:57 +08:00
Lee Lup Yuen
377477a948 arm64/a64: Add driver for TCON0
This PR adds the driver for TCON0 (Timing Controller) on Allwinner A64 SoC. The TCON0 Driver will be used by the upcoming Display Driver for PINE64 PinePhone.

`arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > TCON0" (`CONFIG_A64_TCON0`), which enables the TCON0 Driver

`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for TCON0

`arch/arm64/src/a64/Make.defs`: Added the TCON0 Driver to the Makefile

`arch/arm64/src/a64/a64_tcon0.c`, `a64_tcon0.h`: TCON0 Driver for Allwinner A64

`platforms/arm/a64/boards/pinephone/index.rst`: Added TCON0 as supported peripheral for PinePhone
2022-12-19 20:10:54 +08:00
Peter van der Perk
b5fd0b2381 S32K3XX MR-CANHUBK3 Add protected knsh support 2022-12-19 20:10:34 +08:00
Xiang Xiao
6e66603da5 arch/sim: Disable interrupt in up_interrupt_context for SMP
like other arch to fix the race condition

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 18:03:27 +02:00
Xiang Xiao
07758d9b58 arch/sim: Rename sim_interruptcontext.c to sim_doirq.c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 18:03:27 +02:00
Xiang Xiao
1905a02ddf arch/sim: Change up_interrupt_context to inline function like arm
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 18:03:27 +02:00
Xiang Xiao
b6f1be8e03 arch/sim: Move up_nputs to sim_uart.c
and remove arch/sim/src/sim/sim_nputs.c

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 18:03:27 +02:00
Xiang Xiao
86c692f7a7 arch/sim: Move sim_macho_init.c to posix folder
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 18:03:27 +02:00
Xiang Xiao
87f3681629 arch/sim: Remove arch/sim/src/sim/sim_romgetc.c
since it's no sense to support it on sim platform

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 18:03:27 +02:00
GD32-MCU
659bd495b0 Add i2c driver for gd32f450 MCU 2022-12-17 17:12:26 +08:00
Petro Karashchenko
cc0ee12092 arch/arm/samv7: add ARCH_RAMVECTORS support
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-17 13:57:03 +08:00
Petro Karashchenko
e28e4fd320 arch/arm: fix typos in start files
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-17 13:56:17 +08:00
TimJTi
ad33ccfa53 SAMA5 serial and flexcom serial corrections 2022-12-17 01:09:43 +02:00
Xiang Xiao
7e75c475d4 arch/sim: Move '\n' process from tty_send to up_putc
to avoid this special process happen twice

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 01:04:15 +02:00
Xiang Xiao
4b3ea5b052 arch/sim: Don't need check isconsole in tty_setup and tty_shutdown
since serial framework never call these callbacks in case of console

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-17 01:04:15 +02:00
Xiang Xiao
d5689e070b net/arp: Remove nuttx/net/arp.h
1.move ARPHRD_ETHER to netinet/arp.h
1.move arp_entry_s to net/arp/arp.h
2.move arp_input to nuttx/net/netdev.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-16 22:10:59 +02:00
zhangyuan21
453a1a7332 arch: move stack and task dump to common code
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-17 01:59:35 +08:00
Gustavo Henrique Nihei
7114cc2978 risc-v/esp32c3: Revert aes_cypher name change introduced in #6920
"aes_cypher" is a function from NuttX crypto, so better use instead of
defining a new interface in the driver.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-16 16:19:47 +02:00
zhangyuan21
632d87ee71 arch: remove up_release_pending function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-16 21:29:57 +08:00
Peter van der Perk
19ca5ecbb0 Fix S32K1XX PM which was broken by #7869 2022-12-16 20:37:47 +08:00
Peter Bee
aeed8f5d26 include/nuttx/video: remove validate_buf
Removing validate_buf since it's only locally called in driver

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-12-16 17:03:35 +08:00
Peter Bee
71c34d6391 sim/video: call validate_buf when set_buf
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-12-16 17:03:35 +08:00
Lucas Saavedra Vaz
077c790830 arch: Make REG_[GET/SET]_FIELD thread safe for ESP SOCs 2022-12-16 13:32:43 +08:00
David Sidrane
707ac4b8f6 s32k1xx:Apply style changes from code review
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-16 01:06:12 +08:00
David Sidrane
75baa5b932 s32k1xx:LPSPI use DMA 2022-12-16 01:06:12 +08:00
David Sidrane
89f99dceed s32ke3xx:EDMA Usage Clean up 2022-12-15 22:21:32 +08:00
David Sidrane
df4eb4896d s32k3xx:LPSPI register usage cleanup 2022-12-15 22:21:32 +08:00
Petro Karashchenko
949a0d6032 arch/arm: remove FAR from ARM files
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-15 11:38:17 +08:00
Petro Karashchenko
e9fe00c573 arch/renesas: remove FAR and apply formatting
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-15 11:38:17 +08:00
Almir Okato
8f3c425067 xtensa/esp32s3: Enable booting from MCUboot bootloader
Add support for booting from MCUboot bootloader on ESP32-S3.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2022-12-15 00:42:13 +08:00
Peter van der Perk
d172d8cd0f S32K FlexCAN don't use a blocking wait in tx avail 2022-12-14 10:45:43 -05:00
Lucas Saavedra Vaz
773e3fad43 arch/xtensa/esp32: Add initial support for touch pad polling 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
b8ef8daef9 arch/xtensa/esp32: Add missing macros to iomux 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
2280b33eea arch/xtensa/esp32: Add functions to get RTC clock 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
f9a9512d3c arch/xtensa/esp32: Fix typo in SENS registers 2022-12-14 22:38:10 +08:00
Lucas Saavedra Vaz
15dadd0099 arch/xtensa/esp32: Remove redundant RTC registers 2022-12-14 22:38:10 +08:00
Lee Lup Yuen
b895207489 arm64/a64: Add driver for MIPI DSI
This PR adds the driver for Allwinner A64's MIPI Display Serial Interface (DSI) and MIPI Display Physical Layer (D-PHY).

This driver will be used by the upcoming Display Driver for PINE64 PinePhone.

- `include/nuttx/crc16.h`: Added 16-bit CRC-CCITT

- `libs/libc/misc/Make.defs`: Added 16-bit CRC-CCITT to Makefile

- `arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > MIPI DSI" (`CONFIG_A64_MIPI_DSI`), which enables the MIPI DSI Driver

- `arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for MIPI DSI

- `arch/arm64/src/a64/Make.defs`: Added the MIPI DSI Driver to the Makefile

- `libs/libc/misc/lib_crc16ccitt.c`: Compute 16-bit CRC-CCITT

- `arch/arm64/src/a64/mipi_dsi.c`, `mipi_dsi.h`: Compose MIPI DSI Packets (Long, Short, Short with Parameter)

- `arch/arm64/src/a64/a64_mipi_dsi.c`, `a64_mipi_dsi.h`: MIPI DSI Driver for Allwinner A64

- `arch/arm64/src/a64/a64_mipi_dphy.c`, `a64_mipi_dphy.h`: MIPI D-PHY Driver for Allwinner A64

- `platforms/arm/a64/boards/pinephone/index.rst`: Added MIPI DSI as supported peripheral for PinePhone

Co-Authored-By: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-14 22:37:32 +08:00
David Sidrane
1760057e29 s32k1xx:Apply Style Changes from code review
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-14 21:03:31 +08:00
David Sidrane
592e946bdf 32k1xx:serial:Support GPIO (buffler level) Flow control 2022-12-14 21:03:31 +08:00
David Sidrane
5a948ed3dd 32k1xx:serial fix HW Handshaking 2022-12-14 21:03:31 +08:00
David Sidrane
9bb1226b04 s32k1xx:serial Add EDMA 2022-12-14 21:03:31 +08:00
David Sidrane
8a412ba59b s32k1xx:Refactor DMAMUX for s32k11x, s32k14x 2022-12-14 21:03:31 +08:00
anjiahao
bc0fe0ea16 crypto:add some hardware support
esp32c3: aes hmac-sha1 hmac-sha256
stm32f0l0g0 stm32l1 : aes
sam34: aes
lpc43: aes
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-12-14 02:33:56 +08:00
anjiahao
2b071b7a42 arch/armv8m:support pmu api
The register definition comes from CMSIS
https: //github.com/ARM-software/CMSIS_5
commit id:10bf763a82318c0c852ff9ecc2d5cd8cebe7d761
file: Core/Include/pmu_armv8.h
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-12-14 00:27:02 +08:00
David Sidrane
4284d0398b imxrt:Serial LPUART_STAT_PF s/b LPUART_STAT_NF
as a result of a typo LPUART_STAT_NF was not checked and
   cleared on LPUART_STAT_PF.
2022-12-14 00:26:42 +08:00
Peter van der Perk
6b3b5751c1 S32K automatically calculate size of periphclocks array 2022-12-13 19:50:01 +08:00
chao an
47fbfa215e fs/hostfs: mode_t of mkdir(2) should use the nuttx prototype
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-13 18:16:20 +08:00
chao an
aad16d16e2 sim/windows: add hostfs support for windows
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-13 18:16:20 +08:00
田昕
0382b63f5d move common assert logic together.
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-12-12 17:05:02 +08:00
chao an
61563d6004 risc-v/es32c3: improve passthrough performance by iob offload
Use iob offload model to improve passthrough performance

1. Use iob buffer instead of reserved packet buffer
2. Enable TCP/UDP buffer mode

-------------------------------------------------
|  Protocol      | Server | Client |            |
|-----------------------------------------------|
|  TCP           |    7   |    12  |  Mbits/sec |
|  TCP(Offload)  |   17   |    11  |  Mbits/sec |
|  UDP           |   10   |    16  |  Mbits/sec |
|  UDP(Offload)  |   43   |    28  |  Mbits/sec |
-------------------------------------------------

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-11 16:19:20 +08:00
Peter Bee
a5a1a68a25 arch/sim: add v4l2 driver for sim
communicate with Linux host v4l2 drivers

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-12-09 23:37:49 +08:00
Gustavo Henrique Nihei
9af5dca7dc risc-v/esp32c3: Refactor and rename linker scripts
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-09 11:19:27 +08:00
zhangyuan21
ffd2eb5b14 arch/arm: only compare callee-saved registers for fpu
Registers S0-S15 (D0-D7, Q0-Q3) do not need to be preserved. They can be used for passing
arguments or returning results in standard procedure-call variants.
Registers D16-D31 (Q8-Q15), do not need to be preserved.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-09 11:00:38 +08:00
Alan Carvalho de Assis
fbdd246878 esp32: Fix maximum I2C FIFO size (now SSD1306 will work) 2022-12-09 02:23:28 +08:00
wangbowen6
27ea9f7625 arm/Kconfig: add cortex-m85 config
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-12-09 01:53:10 +08:00
Gustavo Henrique Nihei
236ee5c80d xtensa/esp32: Rename linker scripts into more meaningful names
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-08 21:55:29 +08:00
wangbowen6
c44f87eb1a arm: add syscall SYS_save_context support for old arm and armv7-r
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-12-08 12:37:29 +08:00
TimJTi
18482efc39 SAMA5D2 fix printf formatter
Update sam_adc.c

Update sam_adc.c

%08x -> PRIx32

More %08x

Revert incorrect change (PRIx32)

Update sam_tc.c

Update sam_tc.c

more style corrections/typos

Update arch/arm/src/sama5/sam_adc.c

Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
2022-12-07 21:33:17 +01:00
zouboan
753f46dffe arch/arm64: add support of systemreset 2022-12-07 21:17:39 +08:00
chao an
af149b44cd risc-v/backtrace: fix compile warning
common/riscv_backtrace.c: In function 'up_backtrace':
common/riscv_backtrace.c:145:27: error: passing argument 1 of 'backtrace' from incompatible pointer type [-Werror=incompatible-pointer-types]
  145 |           ret = backtrace(g_intstackalloc,
      |                           ^~~~~~~~~~~~~~~
      |                           |
      |                           uint8_t * {aka unsigned char *}
common/riscv_backtrace.c:64:33: note: expected 'uintptr_t *' {aka 'unsigned int *'} but argument is of type 'uint8_t *' {aka 'unsigned char *'}
   64 | static int backtrace(uintptr_t *base, uintptr_t *limit,
      |                      ~~~~~~~~~~~^~~~
common/riscv_backtrace.c:146:43: error: passing argument 2 of 'backtrace' from incompatible pointer type [-Werror=incompatible-pointer-types]
  146 |                           g_intstackalloc + CONFIG_ARCH_INTERRUPTSTACK,
      |                                           ^
      |                                           |
      |                                           uint8_t * {aka unsigned char *}
common/riscv_backtrace.c:64:50: note: expected 'uintptr_t *' {aka 'unsigned int *'} but argument is of type 'uint8_t *' {aka 'unsigned char *'}
   64 | static int backtrace(uintptr_t *base, uintptr_t *limit,
      |                                       ~~~~~~~~~~~^~~~~

Regression by:
| commit 70290b6e38
| Author: Xiang Xiao <xiaoxiang@xiaomi.com>
| Date:   Tue Sep 20 02:38:54 2022 +0800
|
|     arch: Change the linker generated symbols from uint32_t to uint8_t *
|
|     and remove the duplicated declaration
|
|     Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-07 19:13:09 +08:00
Gustavo Henrique Nihei
1ecaa4e672 xtensa/esp32s3: Configure the PMS peripheral for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-07 03:07:45 +08:00
Gustavo Henrique Nihei
bfc40c74d0 xtensa/esp32s3: Add support for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-07 03:07:45 +08:00
Lucas Saavedra Vaz
4320eed4a1 arch/xtensa/esp32: Optimize macros and ensure overwrite protection 2022-12-07 00:02:28 +08:00
Xiang Xiao
d6c8c269f5 arch/sim: Change usrsock_host_ prefix to host_usrsock_
to align with other similar function style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-06 13:12:21 +01:00
Xiang Xiao
79c8b7d3fd arch/sim: Change sim_host_ prefix to host_
to align with the other similar function style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-06 13:12:21 +01:00
Xiang Xiao
4e24ef23f4 arch/sim: Move host files to the correct location
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-06 13:12:21 +01:00
Lee Lup Yuen
c2d75c930b arm64/a64: Add drivers for PIO and LEDs
This PR adds the drivers for Allwinner A64 PIO (Programmable I/O) and PinePhone LEDs (Red / Green / Blue).

The PIO Driver is based on the NuttX PIO Driver for Allwinner A10: [`arch/arm/src/a1x/a1x_pio.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_pio.c)

-   `arch/arm64/src/a64/Make.defs`: Add PIO Driver to Makefile

-   `boards/Kconfig`: Add `ARCH_HAVE_LEDS` to PinePhone

-   `boards/arm64/a64/pinephone/src/pinephone.h`: Define PinePhone LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_boardinit.c`: Start Auto LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Start User LEDs

-   `boards/arm64/a64/pinephone/src/Makefile`: Add LED Driver to Makefile

-   `boards/arm64/a64/pinephone/configs/nsh/defconfig`: Add `CONFIG_USERLED` to `nsh` config

-   `arch/arm64/src/a64/a64_pio.c`, `a64_pio.h`: Allwinner A64 PIO Driver

-   `arch/arm64/src/a64/hardware/a64_memorymap.h`: PIO Memory Map

-   `arch/arm64/src/a64/hardware/a64_pio.h`: PIO Definitions

-   `boards/arm64/a64/pinephone/include/board.h`: Define PinePhone LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_autoleds.c`: Driver for Auto LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_userleds.c`: Driver for User LEDs

-   `introduction/supported_platforms.rst`: Add Allwinner A64 as Supported Platform

-   `platforms/arm/a64/boards/pinephone/index.rst`: Add PIO and LEDs to PinePhone
2022-12-06 18:14:39 +08:00
Lucas Saavedra Vaz
9cdbec3769 arch/xtensa/esp32: Modify REG_[GET/SET]_FIELD to use [get/set]reg32 2022-12-06 10:53:06 +08:00
Peter van der Perk
9c27d96b8a s32k3xx:LPSPI Check for TX complete before RX
Co-authored-by: David Sidrane <david.sidrane@nscdg.com>
2022-12-05 22:35:21 +08:00
Peter van der Perk
e7449cf97a S32K3XX EDMA Set Backdoor for DTCM memory map 2022-12-05 22:35:21 +08:00
pengyiqiang
922c4df7ef arch/sim: add fb poll notify support 2022-12-05 17:24:43 +08:00
chao an
4592ce2f07 sim/netdriver: set ipv6 addr to host route
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-05 13:54:07 +08:00
chao an
53a63c517a sim/netdriver: fix build break if enable NET_IPv6 only
In file included from sim/sim_netdriver.c:73:
sim/sim_netdriver.c: In function ‘netdriver_ifup’:
sim/sim_netdriver.c:284:32: error: ‘struct net_driver_s’ has no member named ‘d_ipaddr’; did you mean ‘d_ipv6addr’?
  284 |   sim_netdev_ifup(devidx, dev->d_ipaddr);
      |                                ^~~~~~~~
sim/sim_internal.h:279:67: note: in definition of macro ‘sim_netdev_ifup’
  279 | #  define sim_netdev_ifup(idx,ifaddr)         sim_tapdev_ifup(idx,ifaddr)
      |

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-05 01:42:01 +08:00
chao an
d12ddf56df arm/arm: sync ARM_THUMB support from cortex-a
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-05 01:09:31 +08:00
Xiang Xiao
c6e9edcbb6 net: Rename arp_arpin to arp_input
align with other similar function(e.g. ipv4_input and ipv6_input)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-04 20:39:21 +08:00
chao an
62004a28a6 net/d_buf: remove d_buf reference from l3/l4
l3/l4 stack will decouple the reference of d_buf gradually, Only legacy
devices still retain d_buf support, new net devices will use d_iob

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-04 20:37:14 +08:00
chao an
4b70e4ff77 arm/cortex-r: sync ARM_THUMB support from cortex-a
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-04 20:12:31 +08:00
wangbowen6
4859d40a51 arm_syscall: add SYS_save_context for armv7-a
I noticed that there is not register information in the crash log
when DEBUGASSERT failed, the reason is that the arm_dumpstate()
call up_saveusercontext() to get the context of current task but
armv7-a do not support syscall SYS_save_context.

crash log:
[48/12/ 7 16:14:03] [CPU1] [10] [a7] up_assert: Assertion failed CPU1 at file:mm_heap/mm_free.c line: 115 task: panel_apps
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38443440 0x38081f30 0x38002888 0x3802cb7c 0x38036e34 0x38037978 0x380386f0 0x38037e64
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38036edc 0x380376a0 0x38035a2c 0x380070d0 0x3804eae4 0x3802abd0 0x3802277c 0x3804b998
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38091be8 0x38099250 0x38096adc 0x3808f134 0x3802d5d8 0x380191a4
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R0: 00000000 R1: 00000000 R2: 00000000  R3: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R4: 00000000 R5: 00000000 R6: 00000000  R7: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R8: 00000000 SB: 00000000 SL: 00000000  FP: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: IP: 00000000 SP: 00000000 LR: 00000000  PC: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: CPSR: 00000000

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-12-04 01:52:49 +08:00
okayserh
0dafa5f921 Added initial USB support for stm32f746g discovery. 2022-12-03 20:06:47 +08:00
David Sidrane
da7fe760e8 s32k1xx:LPI2C Add DMA support
s32k3xx:LPI2C fix RESET so it compiles
2022-12-03 13:54:34 +08:00
chao an
34d2cde8a8 net/l2/l3/l4: add support of iob offload
1. Add new config CONFIG_NET_LL_GUARDSIZE to isolation of l2 stack,
   which will benefit l3(IP) layer for multi-MAC(l2) implementation,
   especially in some NICs such as celluler net driver.

new configuration options: CONFIG_NET_LL_GUARDSIZE

CONFIG_NET_LL_GUARDSIZE will reserved l2 buffer header size of
network buffer to isolate the L2/L3 (MAC/IP) data on network layer,
which will be beneficial to L3 network layer protocol transparent
transmission and forwarding

------------------------------------------------------------
Layout of frist iob entry:

        iob_data (aligned by CONFIG_IOB_ALIGNMENT)
            |
            |                  io_offset(CONFIG_NET_LL_GUARDSIZE)
            |                                |
            -------------------------------------------------
      iob   |            Reserved            |    io_len    |
            -------------------------------------------------

-------------------------------------------------------------
Layout of different NICs implementation:

        iob_data (aligned by CONFIG_IOB_ALIGNMENT)
            |
            |                 io_offset(CONFIG_NET_LL_GUARDSIZE)
            |                                |
            -------------------------------------------------
 Ethernet   |       Reserved    | ETH_HDRLEN |    io_len    |
            ---------------------------------|---------------
 8021Q      |   Reserved  | ETH_8021Q_HDRLEN |    io_len    |
            ---------------------------------|---------------
 ipforward  |            Reserved            |    io_len    |
            -------------------------------------------------

--------------------------------------------------------------------

2. Support iob offload to l2 driver to avoid unnecessary memory copy

Support send/receive iob vectors directly between the NICs and l3/l4
stack to avoid unnecessary memory copies, especially on hardware that
supports Scatter/gather, which can greatly improve performance.

new interface to support iob offload:

  ------------------------------------------
  |    IOB version     |     original      |
  |----------------------------------------|
  |  devif_iob_poll()  |   devif_poll()    |
  |       ...          |       ...         |
  ------------------------------------------

--------------------------------------------------------------------

1> NIC hardware support Scatter/gather transfer

TX:

                tcp_poll()/udp_poll()/pkt_poll()/...(l3|l4)
                           /              \
                          /                \
devif_poll_[l3|l4]_connections()     devif_iob_send() (nocopy:udp/icmp/...)
           /                                   \      (copy:tcp)
          /                                     \
  devif_iob_poll("NIC"_txpoll)                callback() // "NIC"_txpoll
                                                  |
                            dev->d_iob:           |
                                                ---------------         ---------------
                             io_data       iob1 |  |          |    iob3 |  |          |
                                    \           ---------------         ---------------
                                  ---------------  |       --------------- |
                             iob0 |  |          |  |  iob2 |  |          | |
                                  ---------------  |       --------------- |
                                     \             |          /           /
                                        \          |       /           /
                                   ----------------------------------------------
                    NICs io vector |    |    |    |    |    |    |    |    |    |
                                   ----------------------------------------------

RX:

  [tcp|udp|icmp|...]ipv[4|6]_data_handler()(iob_concat/append to readahead)
                    |
                    |
      [tcp|udp|icmp|...]_ipv[4|6]_in()/...
                    |
                    |
          pkt/ipv[4/6]_input()/...
                    |
                    |
     NICs io vector receive(iov_base to each iobs)

--------------------------------------------------------------------

2> CONFIG_IOB_BUFSIZE is greater than MTU:

TX:

"(CONFIG_IOB_BUFSIZE) > (MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE + CONFIG_NET_LL_GUARDSIZE)"

                tcp_poll()/udp_poll()/pkt_poll()/...(l3|l4)
                           /              \
                          /                \
devif_poll_[l3|l4]_connections()     devif_iob_send() (nocopy:udp/icmp/...)
           /                                   \      (copy:tcp)
          /                                     \
  devif_iob_poll("NIC"_txpoll)                callback() // "NIC"_txpoll
                                                  |
                                             "NIC"_send()
                          (dev->d_iob->io_data[CONFIG_NET_LL_GUARDSIZE - NET_LL_HDRLEN(dev)])

RX:

  [tcp|udp|icmp|...]ipv[4|6]_data_handler()(iob_concat/append to readahead)
                    |
                    |
      [tcp|udp|icmp|...]_ipv[4|6]_in()/...
                    |
                    |
          pkt/ipv[4/6]_input()/...
                    |
                    |
     NICs io vector receive(iov_base to io_data)

--------------------------------------------------------------------

3> Compatible with all old flat buffer NICs

TX:
                tcp_poll()/udp_poll()/pkt_poll()/...(l3|l4)
                           /              \
                          /                \
devif_poll_[l3|l4]_connections()     devif_iob_send() (nocopy:udp/icmp/...)
           /                                   \      (copy:tcp)
          /                                     \
  devif_iob_poll(devif_poll_callback())  devif_poll_callback() /* new interface, gather iobs to flat buffer */
       /                                           \
      /                                             \
 devif_poll("NIC"_txpoll)                     "NIC"_send()(dev->d_buf)

RX:

  [tcp|udp|icmp|...]ipv[4|6]_data_handler()(iob_concat/append to readahead)
                    |
                    |
      [tcp|udp|icmp|...]_ipv[4|6]_in()/...
                    |
                    |
               netdev_input()  /* new interface, Scatter/gather flat/iob buffer */
                    |
                    |
          pkt/ipv[4|6]_input()/...
                    |
                    |
    NICs io vector receive(Orignal flat buffer)

3. Iperf passthrough on NuttX simulator:

  -------------------------------------------------
  |  Protocol      | Server | Client |            |
  |-----------------------------------------------|
  |  TCP           |  813   |   834  |  Mbits/sec |
  |  TCP(Offload)  | 1720   |  1100  |  Mbits/sec |
  |  UDP           |   22   |   757  |  Mbits/sec |
  |  UDP(Offload)  |   25   |  1250  |  Mbits/sec |
  -------------------------------------------------

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-03 11:47:04 +08:00
David Sidrane
ddc178122e s32k3xx:EDMA Add Error handeling 2022-12-03 02:47:42 +08:00
David Sidrane
1d84656f79 s32k3xx:EDMA Add Looping and Cleanup 2022-12-03 02:47:42 +08:00
David Sidrane
22390df92d s32k3xx:EDMA fix DMAMUX1 access violation 2022-12-02 22:56:07 +08:00
qiaohaijiao1
18bca596d4 sim/sim_alsa.c: add mp3 offload playback on sim
use host libmad to simulate read DSP.

Signed-off-by: qiaohaijiao1 <qiaohaijiao1@xiaomi.com>
2022-12-02 22:55:38 +08:00
chao an
c1c17794f9 arm/arm: generating assemble code in ARM states by default
The following changes omit the arm version:

| commit d321080351
| Author: chao an <anchao@xiaomi.com>
| Date:   Fri Dec 2 02:52:18 2022 +0800
|
|     arm/cortex-[a|r]: generating assemble code in ARM states by default
|
|     Signed-off-by: chao an <anchao@xiaomi.com>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-02 13:54:17 +08:00
TimJTi
b6c148e763 Style changes for sam_adc.c and sam_tsd.c 2022-12-02 01:09:25 +01:00
chao an
77aede7c87 arm/thumb: outputs an implicit IT block to avoid build break
Fix build break on thumb2 mode:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S: Assembler messages:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S:146: Error: thumb conditional instruction should be in IT block -- `movle pc,lr'

Reference:
https://developer.arm.com/documentation/100067/0612/armclang-Command-line-Options/-mimplicit-it

In A32 code, the integrated assembler accepts all conditional instructions
without giving an error or warning. In T32 code, the integrated assembler
outputs an implicit IT block when there is a conditional instruction
without an enclosing IT block. The integrated assembler does not give an
error or warning about this.

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 22:14:34 +01:00
chao an
9ab97df0a5 arm/cortex-[a|r]/thumb: force assembler files to be interpreted as Thumb code
The option '-mthumb' is only valid for C source files and it is not passed to the assembler.

If 'thumb' is not considered in some assembly projects, the system will generate
'undefined instructions' when running incompatible instruction:

arm_undefinedinsn: Undefined instruction at 0x380cfc98

This assembly file should be compiled with .thumb but it doesn't:

380cfc90 <hobot_i8_i32_gemm_nn_m4_n8_neon>:
380cfc90: e92d4ff0  push  {r4, r5, r6, r7, r8, r9, sl, fp, lr}
380cfc94: ed2d8b10  vpush {d8-d15}
380cfc98: e59d4064  ldr r4, [sp, #100]  ; 0x64   <-- Undefined instruction
380cfc9c: e59d5068  ldr r5, [sp, #104]  ; 0x68
380cfca0: e59d606c  ldr r6, [sp, #108]  ; 0x6c
380cfca4: e59d7070  ldr r7, [sp, #112]  ; 0x70
380cfca8: e1a08120  lsr r8, r0, #2
380cfcac: e1a091a1  lsr r9, r1, #3
380cfcb0: e1a0a122  lsr sl, r2, #2

After enable thumb:
  .syntax unified
  .thumb
or
  -Wa,-mthumb

.Lhobot_i8_i32_gemm_nn_m4_n8_neon:
38001100: e92d 4ff0   stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
38001104: ed2d 8b10   vpush {d8-d15}
38001108: 9c19        ldr r4, [sp, #100]  ; 0x64
3800110a: 9d1a        ldr r5, [sp, #104]  ; 0x68
3800110c: 9e1b        ldr r6, [sp, #108]  ; 0x6c
3800110e: 9f1c        ldr r7, [sp, #112]  ; 0x70
38001110: ea4f 0890   mov.w r8, r0, lsr #2
38001114: ea4f 09d1   mov.w r9, r1, lsr #3
38001118: ea4f 0a92   mov.w sl, r2, lsr #2

This commit will enable the thumb option of the assembly file by default,
so that when compiling the assembly file, the machine code and the system will be in a consistent state.

----------------------------------------------------------------
https://gcc.gnu.org/onlinedocs/gcc-4.5.2/gcc/ARM-Options.html

GCC Manual:
-mthumb
  Generate code for the Thumb instruction set. The default is to use the 32-bit ARM
  instruction set. This option automatically enables either 16-bit Thumb-1 or mixed 16/32-bit
  Thumb-2 instructions based on the -mcpu=name and -march=name options.

  ** This option is not passed to the assembler. **
  ** If you want to force assembler files to be interpreted as Thumb code,
     either add a `.thumb' directive to the source or pass the -mthumb option
     directly to the assembler by prefixing it with -Wa. **

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 22:14:34 +01:00
chao an
d321080351 arm/cortex-[a|r]: generating assemble code in ARM states by default
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 22:14:34 +01:00
Peter van der Perk
90472785d3 S32K3XX QSPI No need to check TX FIFO buffer when MPU is correctly configured 2022-12-01 08:00:32 -05:00
Peter van der Perk
ec5030ebe6 S32K3XX RAM fixes MPU Dcache ECC 2022-12-01 08:00:32 -05:00
Masayuki Ishikawa
f7937d11a2 arch: arm64: Fix qemu_pl011_txint() in qemu_serial.c
Summary:
- I noticed that the nsh prompt can not be shown when disabling
  debug features. Actually, the prompt will be shown when a user
  input happens.
- This commit fixes this issue by adding uart_xmitchars() as
  other serial drivers do.

Impact:
- None

Testing:
- Tested with qemu-armv8a:netnsh on QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-12-01 19:38:03 +08:00
Masayuki Ishikawa
3b2685409a arch: risc-v: Fix nsec overflow in riscv_mtimer_current()
Summary:
- I noticed that mtimer stops around 30min after boot.
- Finally, I found that nesc overflows in riscv_mtimer_current().
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with rv-virt:nsh on QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-12-01 19:33:39 +08:00
chao an
12b0fa9ec3 arm/sama5: fix recursive dependency
arch/arm/src/sama5/Kconfig:819:error: recursive dependency detected!
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:819:	choice <choice> contains symbol SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824:	symbol SAMA5_FLEXCOM0_USART is part of choice SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824:	symbol SAMA5_FLEXCOM0_USART is part of choice <choice>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 09:45:09 +08:00
TimJTi
a634da9a30 Fix SAMA5D2 ADC and TSD problems
SAMA5Dx ADC and TSD fixes

Ensures ADC and TSD work together. TSD now works on SAMA5D2 and should be OK, still, for other SAMA5D familiy members

Fix CI error

checkpatch error

Update arch/arm/src/sama5/sam_tsd.h

Squash commits to arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Squash commits to arch/arm/src/sama5/sam_tsd.c

Update arch/arm/src/sama5/sam_tsd.c

Update arch/arm/src/sama5/sam_tsd.c

Update arch/arm/src/sama5/sam_tsd.c

Update sam_tsd.c

Fixes after feedback from PR and additional testing

Update sam_tc.c

checkpatch.sh error was missed when fixing someone else's error...

feedback corrections missed

Co-Authored-By: Xiang Xiao <xiaoxiang781216@gmail.com>
Co-Authored-By: Petro Karashchenko <petro.karashchenko@gmail.com>

squashed everything after 248072e02C
2022-12-01 01:51:12 +08:00
TimJTi
57a21fbe1a Fixes for SAMA5D2 Flexcom USART
squashed everything after 8f8b8f5e05

Update Kconfig

Update Kconfig
2022-11-30 23:14:17 +08:00
Masayuki Ishikawa
1eb3d01956 arch: arm64: Add qemu_virtio.c
Summary:
- This commit adds qemu_virtio.c

Impact:
- None

Testing:
- Tested with qemu-armv8a:netnsh (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-11-29 13:16:44 +08:00
Masayuki Ishikawa
b1ebca68f1 arch: arm64: Remove arm64_netinitialize() from qemu_boot.c
Summary:
- This commit removes arm64_netinitialize() from qemu_boot.c

Impact:
- None

Testing:
- Tested with QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-11-29 13:16:44 +08:00