sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
4,829 Commits 1 Branch 0 Tags 291 MiB
aaaa8f2e9d
Commit Graph

4817 Commits

Author SHA1 Message Date
Gregory Nutt
89fd098a20 SAMV7: Add SAMV71 peripheral IDs and interrupt vector definitions 2015-03-05 16:34:22 -06:00
Gregory Nutt
10cfa3b7a5 Fix typo in file name 2015-03-05 15:48:48 -06:00
Gregory Nutt
f4ec5efe3a SAMV71: Add memory map header file 2015-03-05 15:47:29 -06:00
Gregory Nutt
67c21e6817 SAMV7 Kconfig: Add peripheral selections 2015-03-05 13:51:39 -06:00
Gregory Nutt
7704145bd3 Make ARM build system Cortex-M7 ready 2015-03-05 11:25:27 -06:00
Gregory Nutt
02e613b277 Add basic build directories and configuration logic for the SAMV7 family 2015-03-05 10:00:24 -06:00
Gregory Nutt
b6b50f5f42 Fix some BBRAM return values (from David Sidrane). Also some MTD-related cosmetic changes 2015-03-05 08:08:11 -06:00
Gregory Nutt
5158e10bc2 Fix two uses of DEBUG_COLORATION vs STACK_COLORATION (from David Sidrane). Also some corrected comments 2015-03-05 06:41:14 -06:00
Gregory Nutt
a5043d5e60 Add support for dumping board-specific information on assertion. From David Sidrane 2015-03-04 07:00:29 -06:00
Gregory Nutt
466b69fe00 Add missing SPI callback functions to the STM32 SPI driver. From Freddie Chopin 2015-03-04 06:52:46 -06:00
Gregory Nutt
a278893c69 Fix issues when AES support was added for the STM32L1. From Juha Niskanen 2015-03-04 06:38:03 -06:00
Gregory Nutt
32067448d7 Add support for new STM32L1 chip variant. From Juha Niskanen 2015-03-04 06:33:44 -06:00
Gregory Nutt
5eba2afbd6 STM32 BBSRAM driver updated by David Sidrane 2015-03-03 16:05:24 -06:00
Gregory Nutt
b17303e8ab PIC32MZ: Add DMA register definition header file 2015-03-03 15:57:47 -06:00
Gregory Nutt
e290a10fa6 PIC32MZ: Add I2C register definition file 2015-03-03 14:40:09 -06:00
Gregory Nutt
ef23616f8f PIC32MX: Copy some of the configuration updates from PIC32MZ 2015-03-03 13:16:58 -06:00
Gregory Nutt
4183594466 PIC32MZ SPI: Implement exchange() method; update SPI_REGDEBUG configuration and clean up implementation 2015-03-03 12:23:27 -06:00
Gregory Nutt
a3464c54bd PIC32MX SPI: Fix typos in Kconfig; Move constant SPI config data to ROM-able const structure 2015-03-03 10:06:49 -06:00
Gregory Nutt
da2319a27f PIC32MZ: Default SPI configuration setting is backward; refresh configuration 2015-03-03 09:16:10 -06:00
Gregory Nutt
1269fe8b58 PIC32MZ: Add a basic SPI driver 2015-03-03 08:58:27 -06:00
Gregory Nutt
33ac85adcb Adds architecture support for the STM32F372 and F373 (no board support yet). Only tested on STM32F373CC, but should work on the rest. Contributed by Marten Svanfeldt. 2015-03-02 10:33:42 -06:00
Gregory Nutt
9cb90824a1 PIC32MZ Starter Kit: Add support for on-board buttons 2015-03-02 10:01:10 -06:00
Gregory Nutt
625cd7b43a PIC32MZ: Implement support for IO port interrupts 2015-03-02 09:24:43 -06:00
Gregory Nutt
7ae730c810 PIC32MZ: Add ability to select flash ECC options 2015-03-01 09:08:44 -06:00
Gregory Nutt
b9f1e7e301 PIC32MZ: Fix yet another error in DEVCFG settings 2015-02-28 14:35:40 -06:00
Gregory Nutt
9377ec2f80 PIC32MZ: More fixups to DEVCFG settings. Still can't debug 2015-02-28 14:18:22 -06:00
Gregory Nutt
18b7234ad7 PIC32MZ: Ooops DMTCNT maximum value still bad 2015-02-28 13:48:16 -06:00
Gregory Nutt
0c7a1382b2 PIC32MZ: Fix reserved RAM for MPLABX; Revert FPLLRNG calculation; Fix maximum DMTCNT value 2015-02-28 12:49:03 -06:00
Gregory Nutt
f0a00f685a PIC32MZ: Fix some configuration settings and POSC mode should be external clock 2015-02-28 11:54:47 -06:00
Gregory Nutt
ee84648f96 PIC32MZ: Add an option to use the MIPS32 or the microMIPS ISA 2015-02-28 08:22:37 -06:00
Gregory Nutt
c29995fd85 Rename all use of up_boardinitialize(). Should not use common microprocessing naming convention but rather the microprocessor-specific naming conventioni 2015-02-28 07:14:37 -06:00
Gregory Nutt
429863f348 arch/: board function prototypes are now in include/nuttx/board.h. Remove from architecture header file; Add inclusion of nuttx/board.h to all files referencing board functions 2015-02-27 17:19:38 -06:00
Gregory Nutt
c0d2e33288 PIC32MZ: Correct a few more DEVCFG issues 2015-02-27 16:20:28 -06:00
Gregory Nutt
a7c1053f9d PIC32MZ: Review DEVCFG setting; adjust a few to match example code 2015-02-27 10:54:18 -06:00
Gregory Nutt
7378a97c74 PIC32MZ: Fix some repeated typos and work around an issue with passing defined parameters to a macro that takes multiple parameters 2015-02-26 15:39:57 -06:00
Gregory Nutt
a688cdc2ee PIC32MZ: Add logic to configure peripheral pins for the selecte UARTs 2015-02-26 15:05:11 -06:00
Gregory Nutt
db9b6b5f1a PIC32MZ: Add peripheral pin selection register definitions 2015-02-26 13:19:40 -06:00
Gregory Nutt
6961f84e62 Costmetic updates comments and style; Add NFS dependency on IPv4 2015-02-26 06:04:23 -06:00
Gregory Nutt
8fa7c8d4fa Tiva ADC: Drive updates from Calvin Maguranis 2015-02-25 13:38:22 -06:00
Gregory Nutt
a4d514c79b PIC32MX/Z: Partial review of PIC32MZ cp0 register -- need to do more; Also found issues with definitions for PIC32MX -- need to be retested 2015-02-25 13:33:09 -06:00
Gregory Nutt
2c929aa55f PIC32MZ: Add file for GPIO interrupt support. There are issues so configuration is EXPERIMENTAL for now 2015-02-25 11:09:04 -06:00
Gregory Nutt
8f8ed30d52 PIC32MZ: Add IOPort header file and GPIO configuration logic 2015-02-25 10:43:12 -06:00
Gregory Nutt
1b4bc931cd Adjust microMIPS compile options to enable interlinking with 32-bit code 2015-02-25 09:54:48 -06:00
Gregory Nutt
59412f25ce SAM4CM free-running time: Change overflow type from uint16 to uint32. From Max Neklyudov. 2015-02-25 08:12:31 -06:00
Gregory Nutt
70c8ff6581 Eliminate some warnings 2015-02-25 08:05:35 -06:00
Gregory Nutt
b99ff9e03b Refresh configuration 2015-02-25 07:22:58 -06:00
Gregory Nutt
0d6ba023a1 PIC32MZ: Add serial driver 2015-02-24 19:44:25 -06:00
Gregory Nutt
c3d282df7b PIC32MZ: Add low level UART support 2015-02-24 17:23:56 -06:00
Gregory Nutt
87faa1008f PIC32MZ: Add UART register definition header file 2015-02-24 17:00:14 -06:00
Gregory Nutt
65d762f902 PIC32MZ: Add error exception handling and interrupt decode logic 2015-02-24 16:11:30 -06:00
Gregory Nutt
6798e67177 PIC32MZ: Add support for a timer interrupt 2015-02-24 15:36:08 -06:00
Gregory Nutt
d0940671cf PIC32MZ: Add interrupt controller support 2015-02-24 14:50:54 -06:00
Gregory Nutt
acef552fac PIC32MZ: Add interrupt controller register definitions 2015-02-24 13:16:04 -06:00
Gregory Nutt
6cf496ee67 PIC32MX: Standardize of naming in comments 2015-02-24 11:32:15 -06:00
Gregory Nutt
f5a0fb060d PIC32MZ: Add Oscillator header file; Add logic to set up peripheral clocks on reset 2015-02-24 11:16:32 -06:00
Gregory Nutt
354e5a9a11 PIC32MZ: Add beginnings of CPU initialization logic. Still some bad logic for setting up peripheral clocking 2015-02-24 09:30:30 -06:00
Gregory Nutt
d4ce089451 Merge commit '45e0cf1f4a7664974933db2a408ccea6acad4eff' 2015-02-24 07:13:48 -06:00
sauttefk
a6695b442e Fix SSI TX and RX legacy mapping of TM4C1294NC 2015-02-24 03:31:12 +01:00
Gregory Nutt
15579510e8 PIC32MZ: Fix some PLL setup logic 2015-02-23 17:27:28 -06:00
Gregory Nutt
db10058d27 PIC32MZ: Fix an error in the branch target of the hard-coded power up reset branch 2015-02-23 17:09:57 -06:00
Gregory Nutt
9e92b9041b PIC32MZ: Most related to start up file a FLASH device configuration setup 2015-02-23 16:36:35 -06:00
Gregory Nutt
cfd139e8af PIC32MZ: Make sure that the microMIPS ISA is selected on all common MIPS32 assembly files when the PIC21MZ is selected 2015-02-23 12:09:34 -06:00
Gregory Nutt
9a4f360265 PIC32MZ: Resolve a PIC32 dependency in the generic MIPS32 code 2015-02-23 11:56:16 -06:00
Gregory Nutt
b7a8a1f8aa Finishes PIC32MZ device configuration definitions 2015-02-23 09:58:34 -06:00
Gregory Nutt
d75acb630d PIC32MZ: Add memorymap and devcfg header files 2015-02-22 16:21:12 -06:00
Gregory Nutt
5559b72abd PIC32MZ: Framework for startup function. Still has too much PIC32MX garbage in it to be credible 2015-02-22 14:30:53 -06:00
Gregory Nutt
9c9fc13b6c MIPS: Add some build support for the M14K and also for the PIC32MZ Starter Kit. Still a long way to go 2015-02-22 13:45:59 -06:00
Gregory Nutt
a81ebff6e0 Remove support for obsolete PIC32 toolchain configuration names 2015-02-22 12:14:20 -06:00
Gregory Nutt
024a5cb278 PIC32MZ: Add just enough PIC32MZ logic that we can run 'make menuconfig' 2015-02-22 10:53:24 -06:00
Gregory Nutt
f273bcfa82 Fix a typo that prevents building PIC32... How long has that been there? 2015-02-21 19:41:59 -06:00
Gregory Nutt
c5b3e3e7aa Current Pinguino toolchain uses prefix p32 instead of mips 2015-02-21 19:41:26 -06:00
Gregory Nutt
0dc70108b8 STM32: Fix for compilation introduced by last backup RAM change. Not sure it it is correct, be now things do compile 2015-02-21 17:51:03 -06:00
Gregory Nutt
63711ad338 Adds the ability to use the STM32F2 and STM32F4 Battery Backedup SRAM in the file system. With an option to Save Panic context to one of the files. From David Sidrane. 2015-02-21 15:15:51 -06:00
Gregory Nutt
7d43cf2087 Changes to support fully write protecting the backup domain. N.B. stm32_pwr_enablebkp did not account for the delay from enable to the domain being writable. The KISS solution is a up_udelay. A more complex solution would be a negated write test with restore. From David Sidrane. 2015-02-21 14:53:33 -06:00
Gregory Nutt
2d91128111 Tiva GPIO clean-up by Calvin Maguranis 2015-02-20 13:40:25 -06:00
Gregory Nutt
a0a553f3e9 Tiva: Move GPIIO prototypes out of arch/arm/include/tiva/irq.h to arch/arm/tiva/tiva_gpio.h where they belong 2015-02-20 13:31:43 -06:00
Gregory Nutt
ac0cd3655a Fix some time value changes; mostly changing greater than 1000000000 to greater than or equal to 1000000000. From Juha Niskanen 2015-02-20 07:07:36 -06:00
Gregory Nutt
2532e33de2 VFS: The inode unlink method should not be support if operations on the root pseudo-filesystem are disabled. 2015-02-18 09:34:58 -06:00
Gregory Nutt
d3196ca5c3 The RTC ioctl() method is now a configuration option 2015-02-18 08:23:10 -06:00
Gregory Nutt
57eb72a13f Add an IOCTL method to the RTC interface 2015-02-18 08:05:31 -06:00
Gregory Nutt
80cb25a0ff Tiva ADC: Should not have its own ADC debug. Should use the common Analog debug 2015-02-17 14:54:56 -06:00
Gregory Nutt
7354e41aa6 Tiva: Updated files to allow for ADC triggering by the timer. I’ve cleaned up some parts of the ADC code, too, and fleshed out the PWM triggering ioctl. From Calvin Maguranis 2015-02-17 13:50:30 -06:00
Gregory Nutt
d578829ddd Tiva SPI: Cosmetic improvements 2015-02-17 12:45:47 -06:00
Gregory Nutt
56b29b00ea EFM32 USB Device: Is not basically functional with this change. From Pierre-noel Bouteville. 2015-02-16 15:45:49 -06:00
Gregory Nutt
ff6b34967b Fix a compilation error. From Macs Neklyudov 2015-02-16 14:30:15 -06:00
Gregory Nutt
0081b0840b Missed a Kconfig definition in the last commit 2015-02-16 10:41:12 -06:00
Gregory Nutt
c747521953 STM32 RTC: Extend the RTC interface to support reading subseconds. From Jussi Kivilinna 2015-02-16 07:18:09 -06:00
Gregory Nutt
f7bb64b327 Suffer the consequences of moving struct timeval to its correct location 2015-02-15 15:18:35 -06:00
Gregory Nutt
529bc9626c Add support for RTC driver to the STM32F4-Discovery board 2015-02-15 10:11:01 -06:00
Gregory Nutt
68d39b69aa Remove an unused variable 2015-02-15 08:51:39 -06:00
Gregory Nutt
726b0d5f58 RTC: A little more clean-up of the RTC driver 2015-02-15 08:19:23 -06:00
Gregory Nutt
53322a50f4 STM32 RTC: Implement the rdtime() method of the RTC lower half interface 2015-02-13 13:56:22 -06:00
Gregory Nutt
702f155fd0 STM32 RTC driver lower half: Implement the settime method of the RTC interface 2015-02-13 13:36:15 -06:00
Gregory Nutt
b0b6747d49 Break out a new internal interface, stm32_rtc_setdatetime(). This eliminates some un-necessary time conversions. From Freddie Chopin. 
Add a skeleton implementation of the RTC lower half interface at arch/arm/src/stm32/stm32_rtc_lowerhalf.c.  This is just the framework for the RTC lower half.  None of the interface methods have yet been implemetned.
 2015-02-13 12:56:58 -06:00
Gregory Nutt
c662563b83 Forgot to add a file in the last commit 2015-02-13 10:05:10 -06:00
Gregory Nutt
501bc15fbd RTC: Remove all backdoor interfaces from rtc.h 2015-02-13 08:41:34 -06:00
Gregory Nutt
d1fa95ffc3 Merge commit 'd000b0ac237cb6b17e3d355b55250c3ca7e9f2d6' 2015-02-11 18:07:03 -06:00
sauttefk
7384d3bd79 Add TI EK-TM4C1294XL launchpad support 2015-02-12 00:30:38 +01:00
Gregory Nutt
24e51794f9 Kinetis: Add architectural support for the K26Z128VLH4. From Derek B. Noonburg 2015-02-11 07:15:45 -06:00
Gregory Nutt
28c2d93212 LP17 Ethernet Driver: Fix some compile problems when IPv6 is enabled 2015-02-10 15:23:11 -06:00
Gregory Nutt
5566a458d1 LPC17xx: Add IPv6 support to the LPC17 Ethernet driver. Untested... I no longer have a proper environment for LPC17 debug. 2015-02-10 14:04:08 -06:00
Gregory Nutt
9e6cd16a8b SAM4 Ethernet Driver: No supports operation using the high priority work queue so that packet processing can occur outside of interrupt level processing. 
SAM4E-EK: The nsh configuration now configures the Ethernet driver for execution on the HP work thread.
 2015-02-10 11:10:55 -06:00
Gregory Nutt
8b0d9fb456 Fix some warning 2015-02-09 18:24:31 -06:00
Gregory Nutt
0a6ae631dc Clone the SAMA5D4 IPv6 support to the SAM4E EMAC and SAMAd3 EMAC and GMAC drivers. 2015-02-09 17:16:55 -06:00
Gregory Nutt
f0d318c124 Big, very risky change: Remove all occurrences of up_maskack_irq() that disable and enable interrupts with up_ack_irq() that only acknowledges the interrupts. This is only used in interrupt decoding logic. Also remove the logic that unconditionally re-enables interrupts with the interrupt exits. This interferes with the drivers ability to control the interrupt state. This is a necessary, sweeping, global change and unfortunately impossible to test. 2015-02-09 16:12:11 -06:00
Gregory Nutt
08677542dc SAMA5D Ethernet: Add support for CONFIG_NET_NOTINTS so that the driver can operate from the work queue thread instead of doing everything from the interrupt level. 2015-02-09 15:26:05 -06:00
Gregory Nutt
25f187d754 ARMv7-A interrupt handler: Should not automatically re-enable interrupts on interrupt return. That interferes with the driver's ability to manage interrupts. 2015-02-09 15:24:31 -06:00
Gregory Nutt
fa580e17cf Oops... Conditioned on IPv4 wheren IPv6 was intended 2015-02-09 14:16:32 -06:00
Gregory Nutt
987715e8a3 Fix IPv4-dependend debug output 2015-02-09 13:18:31 -06:00
Gregory Nutt
09b356c497 SAMA5D4 EMAC: Add support for Multicast address matching and IPv6 2015-02-09 10:50:38 -06:00
Gregory Nutt
67f0563fad Add logic so that STM32 Ethernet drivier can avoid interrupt level processing and, instead, execute on the work thread. 2015-02-09 08:33:29 -06:00
Gregory Nutt
8bac6b71ce SYSLOG: Add an option to use the syslog'ing device as the system consolution. This option enables a low-level, write-only console device at /dev/console (similar to the low-level UART console device). From Pierre-noel Bouteville. 2015-02-08 06:53:24 -06:00
Gregory Nutt
b2ed249b42 STM32 SPI: Clean-up asymmetric configuration of SPI6 2015-02-07 18:59:06 -06:00
Gregory Nutt
706f01b8a2 STM32 SPI: The source clock for SPI 4,5, and 6 should be PCLK2, not PCLK1 (for F411, F427, and F429). Per David Sidrane. 2015-02-07 13:59:45 -06:00
Gregory Nutt
9318121175 Updated Tiva ADC files 2015-02-06 16:56:12 -06:00
Gregory Nutt
3ca8d3766a Tiva ADC: Add Kconfig options for ADC. From Calvin Maguranis 2015-02-05 19:05:13 -06:00
Gregory Nutt
225489a99a Tiva ADC: Partial build support. Still missing Kconfg changes 2015-02-05 18:01:18 -06:00
Gregory Nutt
376f39c822 Tiva ADC: Adds a Tiva ADC driver. From Calvin Maguranis 2015-02-05 17:36:23 -06:00
Gregory Nutt
a6bda5f8ba Tiva ADC: Register definitiona header file from Calvin Maguranis 2015-02-05 16:29:17 -06:00
Gregory Nutt
46a153aa3e Adds support for TM4C123G timers; integrates with the TM4C123G Launchpad. From Calvin Maguranis 2015-02-05 13:51:32 -06:00
Gregory Nutt
ee8d792737 Networking: Changes need to build ICMPv6 'router' configuration on STM32 with network debug enabled 2015-02-05 11:47:56 -06:00
Gregory Nutt
821ffc0b8a STM32: Add an IPv6 configuration for the STM32F4-Discovery board (witht he STM32-DISCO_BB base board). Verify that the STM32 Ethernet driver works with IPv6. 2015-02-05 11:21:04 -06:00
Gregory Nutt
de75731989 Add IPv6 support to network driver skeleton and to SAMA5D4 Ethernet driver (which, unfortunately is still missing address filtering logi) 2015-02-05 10:49:32 -06:00
Gregory Nutt
506c6c8512 ICMPv6: Add logic to behave like a router (if so configured): NuttX will not send the router advertisement message in response to any router solicitation messages. 2015-02-05 09:43:29 -06:00
Gregory Nutt
1646e643d7 Networking: Break out Ethernet definitions into a separate file; add IPv6 multicast addresses as common globals, Ethernet drivers need to filter link-local, all nodes Ethernet address 2015-02-04 14:51:20 -06:00
Gregory Nutt
f036df9faa Minor update to Kconfig file selections 2015-02-04 08:21:32 -06:00
Gregory Nutt
011c6e0c7e Re-arrange condition logic from the last change to avoid having STM32-specific conditional logic outside of the STM32 sandbox. 2015-02-04 07:24:19 -06:00
Gregory Nutt
2393a074e5 STM32: Add driver for STM32L162XX AES peripheral. Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com> 2015-02-04 06:49:05 -06:00
Gregory Nutt
d617384d27 EFM: Remove a misbehaving assertion. From Pierre-noel Bouteville 
Also remove spaces before and after paretheses to conform to coding standard.
 2015-02-03 13:34:37 -06:00
Gregory Nutt
d08e29e0a0 Remove and extra endif from the Kconfig 2015-02-03 12:46:40 -06:00
Gregory Nutt
5189cddef2 Convert the 64-bit usec limit to a 32-bit tick limit 2015-02-03 07:18:17 -06:00
Gregory Nutt
f017f4c8a8 SAM4CM: Add support for tickless operation 2015-02-03 07:00:54 -06:00
Gregory Nutt
c51ebf8c72 Refresh some configurations 2015-02-01 12:15:46 -06:00
Gregory Nutt
ec6383d2d2 Fix compile issues with configs/sim/nettest 2015-02-01 12:00:30 -06:00
Gregory Nutt
5f72080e0a SIM: fix a case in the simulated Ethernet driver where it was using a old structure name 2015-02-01 09:00:42 -06:00
Gregory Nutt
b15632e8ba drivers/ramdisk.c and include/nuttx/fs/ramdisk.h: Add logic to dispose of the drvier and RAM buffer when the RAM disk has been unlinked and all open references to the RAM disk have been closed. Add new parameters to romdisk() to specify what should be done with the RAM/ROM buffer -- Should it be freed or not? Changed all calls to ramdisk() to use these new parameters. 2015-02-01 07:24:16 -06:00
Gregory Nutt
d8561fbcae Remove execute privileges from some header files 2015-02-01 06:24:18 -06:00
Gregory Nutt
515856c3d9 EFM32 Add support of BURTC and add possibility of debug message of RMU: Pierre-noel Bouteville 2015-02-01 06:19:53 -06:00
Gregory Nutt
d9d530850a Review/modifications for change of last merge 2015-01-31 14:10:53 -06:00
Gregory Nutt
e4b0df0431 Merge commit '1207647ee19ac48746300f2d3fa8f4679c32de95' 2015-01-31 13:47:10 -06:00
Gregory Nutt
0817d47964 Fix a missing quotation mark in configuration description 2015-01-30 12:28:04 -06:00
Gregory Nutt
6b900ec05c EFM32: Logic to unconditionally enable LE clocking. Even you don't use core clock LE as source for LFA or LFB, to read are write any register not clocked by HFPERCLK or HFCORECLK, HFCORECLKLE should be enabled. From Pierre-noel Bouteville. 2015-01-30 07:44:49 -06:00
Gregory Nutt
56200909a0 ARM assembly language memcpy.S was not returning a value in R0 it is required to do. From David Sidrane 2015-01-29 06:36:53 -06:00
Gregory Nutt
a2efa2fed8 Unix domain: More fixes. With these changes, apps/examples/ustream works 2015-01-28 08:39:48 -06:00
Gregory Nutt
5a0ac60538 Merge remote-tracking branch 'origin/master' into afunix 2015-01-27 16:44:42 -06:00
Gregory Nutt
944b34e31f Unix domain: A few fixes from early integration 2015-01-27 16:39:30 -06:00
Gregory Nutt
ce80d90e6d Tiva Ethernet: Move place where interrupts are disabled. It is probably not possible, but the logic looks like it could leave interrupts disabled 2015-01-27 14:59:31 -06:00
Gregory Nutt
af612f6fad Unix domain: More fixed to build without Ethernet or Slip 2015-01-27 14:26:10 -06:00
Gregory Nutt
9b5fe1e446 Various fixes to get Unix domain sockets to build on the simulator without Ethernet 2015-01-27 14:11:46 -06:00
Gregory Nutt
523b12c624 Recent changes to stm32_rtcc.c do not compile with STM32L15XX configurations. From Jussi Kivilinna. 2015-01-27 09:20:42 -06:00
Gregory Nutt
2ce16c8fda Disabling any of EXTI 5-9 interrupts was disabling interrupts for all EXTI 5-9. Same issue with EXTI 10-15. From Jussi Kivilinna. 2015-01-27 09:15:43 -06:00
jeditekunum
9da75dc4f7 Interrupt vectors for ATMEGA1284P. 2015-01-26 14:10:46 -06:00
jeditekunum
96d06d7a70 Fix typos. 2015-01-26 13:55:26 -06:00
Gregory Nutt
d78464404a Get USART 2 & 3 working on lpc4357-evb. These changes are required to get USART 2 and 3 working on the Embest development board. From Toby Duckworth 2015-01-26 07:33:22 -06:00
jeditekunum
6d361911f1 First step at porting to MoteinoMEGA. LED shows assert failure at boot. Appears to be short double blink, short off (~1sec), followed by 250ms toggle cycles. Most of it derived from amber board. 2015-01-24 14:31:35 -06:00
Gregory Nutt
30b141e2c8 Remove CONFIG_DEBUG_STACK. Adding CONFIG_STACK_COLORATION makes this configuration option pointless 2015-01-24 06:49:51 -06:00
Gregory Nutt
e8f266001d Add CONFIG_STACK_COLORATION that does the same thing as CONFIG_DEBUG_STACK but without enabling debug. From David Sidrane 2015-01-24 06:03:39 -06:00
Gregory Nutt
16f72b3470 Add support for the EFM32 reset management unit (RMU). From Pierre-noel Bouteville 2015-01-23 15:25:10 -06:00
Gregory Nutt
639fe6c297 Armv7-M: Remove Px4-only setting of stack to 0xff. This is incompatible with standard NuttX stack montitoring logic 2015-01-22 10:09:10 -06:00
Gregory Nutt
b3db229b77 STM32 Ethernet: Port IPv6 address filtering from the Tiva TM4C driver 2015-01-21 15:04:39 -06:00
Gregory Nutt
9588b0e7a7 All Ethernet drivers (again): Missed one place where arp_out() is called and neighber_out() needs to be called 2015-01-21 11:36:33 -06:00
Gregory Nutt
8a48b3890f SourceForge Ticket #38. Stray character in arch/avr/src/at90usb/at90usb_serial.c 2015-01-20 16:38:18 -06:00
Gregory Nutt
723b7fc430 Networking: Modify all Ethernet drivers: Do neighbor look-up on all outgoing IPv6 packs in order to properly set the destination link layer address. 2015-01-20 15:52:25 -06:00
Gregory Nutt
f6063c3896 Networking: Add missing raw/packet socket support to all Ethernet drivers 2015-01-20 15:14:29 -06:00
Gregory Nutt
07132f462f Ethernet drivers: Use IFF_IS_IPv4 macro. Cannot rely on the EtherType being set correctly. 2015-01-20 06:26:14 -06:00
Gregory Nutt
19a71b395c TM4C Ethernet: Fix the ICMPv6 multicast address 2015-01-19 14:56:43 -06:00
Gregory Nutt
674a86027a Tiva Ethernet: Add support for receiving IPv6 multicast frames 2015-01-19 12:43:13 -06:00
Gregory Nutt
3aafa0b93d nuttx/arch/arm/src/stm32/stm32_serial.c: fix declaration and definition of up_receive() and up_dma_receive() to match fields of uart_ops_s from nuttx/include/nuttx/serial/serial.h 2015-01-19 06:42:27 -06:00
Gregory Nutt
0d8ef0993f Tiva Ethernet: When calling into the stack from the worker thread, it is necessary to have the stack locked 2015-01-18 16:58:11 -06:00
Gregory Nutt
f14538bf52 Tiva Ethernet: Don't try to print IPv4 address if IPv4 is not enabled 2015-01-18 11:38:40 -06:00
Gregory Nutt
41b1f5d9cf Tiva Ethernet: Back out previous change... it is WRONG 2015-01-17 11:55:20 -06:00
Gregory Nutt
30183a73be Tive Ethernet: Fix some race conditions in the driver that become apparent when debug is enabled 2015-01-17 10:59:45 -06:00
Gregory Nutt
f5824701b7 Tiva Ethernet: Costmetic changes to comments and debug strings 2015-01-17 10:27:57 -06:00
Gregory Nutt
f0c112b3b0 Tiva Ethernet: Remove assertion. Just log and error and continue 2015-01-17 10:01:55 -06:00
Gregory Nutt
2236a996e5 TM4C Ethernet: Add some assertions 2015-01-16 15:25:18 -06:00
Gregory Nutt
ac69e11a5f Networking: All Ethernet drivers: Call ipv6_input if IPv6 is enabled and an IPv6 packet is received 2015-01-15 09:31:23 -06:00
Gregory Nutt
836a8b1625 - Rename devif_input() ipv4_input() 
- Copy net/devif/devif_input.c to ipv6_input.c.  Remove all IPv4-specific logic.
- Rename net/devif/devif_input.c to ipv4_input.c.  Remove all IPv6-specific logic
- Split IPv4 header structure out as net_ipv4hdr_s from net_iphdr_s
 2015-01-15 08:03:56 -06:00
Gregory Nutt
6bc54c3541 Networking: Condition certain ARP logic on CONFIG_NET_ARP in all Ethernet drivers 2015-01-15 07:07:39 -06:00
Gregory Nutt
d3174cdac4 Update README 2015-01-14 09:10:26 -06:00
Gregory Nutt
11eec5f5d8 Tiva Timer: Revert the previous change. Thre is a better way to handler timerout interrupts. 
Removed setting of the initial timer interval load value (or, rather, it is always set to zero for a free-running timer).  Also, do not unconditional enable the timer out interrupt.  The timerout interrupt is not not enabled until tiva_timer32_setinterval() is called.
 2015-01-14 07:33:59 -06:00
Gregory Nutt
db59dd2208 Tiva Timer: Remove a big chunk of unnecessary logic 2015-01-13 17:08:37 -06:00
Gregory Nutt
fe4e3f4529 Tiva Timer: Timer test must attach a timer handler or the timer is stopped at the first interrupt 2015-01-13 15:55:54 -06:00
Gregory Nutt
08638e10bd Timer Timer: Timer driver now initializes without complaints. Need a test driver of some kind to make more testing progress. 2015-01-13 11:49:00 -06:00
Gregory Nutt
5aab327457 DK-TM3C129X Timer: Add timer initialization logic to the board bring-up 2015-01-13 11:10:35 -06:00
Gregory Nutt
0aa32a003c Tiva Timer: Rename tiva_timerlow.c to tiva_timerlow32.c since it only supports 32-bit periodic timers 2015-01-13 10:10:02 -06:00
Gregory Nutt
ffa34aa5db Tiva Timer: Completes implementation of the timer driver lower half 2015-01-13 10:06:40 -06:00
Gregory Nutt
1bd74b4dcc Tiva Timer: Allow timeout interrupts even if the reload value is zero. That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000 2015-01-13 08:29:25 -06:00
Gregory Nutt
cfc0732c57 Tiva Timer: Add conditional compilation to enable/disable each timer feature. Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL 2015-01-13 07:49:20 -06:00
Gregory Nutt
73e6fc8142 Tiva Timer: Rename tiva_timer.c to tiva_timerlib.c 2015-01-12 15:55:41 -06:00
Gregory Nutt
f93e69e94e Tiva Timer: First cut at timer driver lower half (still incomplete) 2015-01-12 15:52:48 -06:00
Gregory Nutt
4510be6c7d Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well 2015-01-12 10:14:48 -06:00
Gregory Nutt
9e546ff37a Tiva interrupts: Fix chip-specific interrupt un-definitions 2015-01-12 10:00:42 -06:00
Gregory Nutt
90da8aa71d Tiva Timers: Add interfaces to read the current timer value 2015-01-12 10:00:41 -06:00
Gregory Nutt
e5a0dcd0f9 USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts 2015-01-11 08:05:09 -06:00
Gregory Nutt
b75c43f6ef Tiva Timer: Fix a typo 2015-01-10 12:42:39 -06:00
Gregory Nutt
3c06976ba7 Tiva Timer: Implements configuration of the 32-bit RTC timer 2015-01-10 12:41:15 -06:00
Gregory Nutt
c0e1dc3b8a Tiva Timer: Add support for RTC match interrupts 2015-01-10 12:22:37 -06:00
Gregory Nutt
a2a5c47d9d Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns 2015-01-10 10:07:56 -06:00
Gregory Nutt
2eeca96330 Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled 2015-01-10 08:34:39 -06:00
Gregory Nutt
2871677362 Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes 2015-01-09 16:49:00 -06:00
Gregory Nutt
df48abcc47 Tiva Timer: Add logic to acknowledge Tiva Timer interrupts 2015-01-09 15:01:49 -06:00
Gregory Nutt
9ae597c441 Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module 2015-01-09 14:10:31 -06:00
Gregory Nutt
7384857658 Tiva Timer: Add more interrupt management logic 2015-01-09 13:29:03 -06:00
Gregory Nutt
626d6cdab4 Tiva Timer: Add functions to set match registers; Add logic to select count direction 2015-01-09 12:05:26 -06:00
Gregory Nutt
8552b2f679 Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers. 2015-01-09 11:07:52 -06:00
Gregory Nutt
d5d3a23ac3 Tiva Timers: Add framework to support tmer interrupts 2015-01-09 10:21:59 -06:00
Gregory Nutt
1193b4aa55 STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE 2015-01-08 17:47:34 -06:00
Gregory Nutt
09bd382697 Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations 2015-01-08 13:44:10 -06:00
Gregory Nutt
58818e1afd Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode. 2015-01-08 11:08:54 -06:00
Gregory Nutt
d3bc0b7223 Tiva Timer: Add register level debug support 2015-01-08 10:14:38 -06:00
Gregory Nutt
6c612cf967 Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit 2015-01-08 09:47:38 -06:00
Gregory Nutt
92dc58c376 Tiva Timer: SYNC regiser is only available on GPTM0 2015-01-08 08:07:31 -06:00
Gregory Nutt
e55df605a8 Tiva Timer: Update timer register bit definitions for the LM4F 2015-01-08 08:03:47 -06:00
Gregory Nutt
1ed2956ad5 Tiva Timer: Extend timer register definitions to handle other chips 2015-01-08 07:56:00 -06:00
Gregory Nutt
1ace391fcf MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy. 
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.

This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.

From David Sidrane
 2015-01-08 06:23:42 -06:00
Gregory Nutt
5c68f0dd34 Tiva Timer: Missed one register bit field definition 2015-01-07 12:03:08 -06:00
Gregory Nutt
9eb693845e TM4C129X Timer: Completes timer register definition header file 2015-01-07 11:43:56 -06:00
Gregory Nutt
81afc06f54 TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete 2015-01-07 10:07:47 -06:00
Gregory Nutt
28a52cbd23 TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions 2015-01-07 08:57:48 -06:00
Gregory Nutt
0748291ce9 Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms 2015-01-06 10:49:47 -06:00
Gregory Nutt
c429a4d93f Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL) 2015-01-06 10:48:08 -06:00
Gregory Nutt
10b349bd1a Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt 2015-01-05 15:12:45 -06:00
Gregory Nutt
52c4334429 Tiva: Fixes to support building Tiva TM4C129X I2C driver 2015-01-05 13:15:40 -06:00
Gregory Nutt
67aeab7105 Tiva: Update I2C register definitions to include support for the TM4C129X 2015-01-05 13:08:07 -06:00
Gregory Nutt
c4f64c72c8 Tiva Ethernet: Add support for PHY interrupts 2015-01-03 13:16:26 -06:00
Gregory Nutt
40113f0b93 Tiva Ethernet: Configure external PHY interrupt pin 2015-01-03 10:59:12 -06:00
Gregory Nutt
a7e0acbc6f Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK 2015-01-03 09:28:54 -06:00
Gregory Nutt
15f0a046fd Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers 2015-01-03 06:52:19 -06:00
Gregory Nutt
6bb12a34dc Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion 2015-01-02 14:05:42 -06:00
Gregory Nutt
28d44e1b30 Cosmetic changes 2015-01-02 13:59:47 -06:00
Gregory Nutt
b828741900 Tiva: Fix typos in conditional compilation 2015-01-02 13:59:30 -06:00
Gregory Nutt
91a92fc538 Tiva Ethernet: Add lots of debug output for testing 2015-01-02 13:10:25 -06:00
Gregory Nutt
ce3dac34b2 Tiva: If peripheral ready register not available, then lets say the peripheral is ready 2015-01-02 12:58:20 -06:00
Gregory Nutt
194e5a9600 Tiva: Wait for the console UART to be ready before configuring it 2015-01-02 12:57:41 -06:00
Gregory Nutt
47b8ce855e Tiva Ethernet: Fix compile problem when debug enabled 2015-01-02 12:04:22 -06:00
Gregory Nutt
86dc1726aa Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X 2015-01-02 11:53:02 -06:00
Gregory Nutt
9688a9aacb Tiva Ethernet: MMC interrupts need to be disable initially 2015-01-02 11:40:48 -06:00
Gregory Nutt
ea3895c2e8 Tiva Ethernet: Update DMA BUSMODE settings based on TI example code 2015-01-02 11:10:41 -06:00
Gregory Nutt
67699b8cae Tiva Ethernet: Update PHY initialization 2015-01-02 10:11:57 -06:00
Gregory Nutt
a97d304d1a STM32 RTC: Add Kconfig options needed with the preceding commit 2015-01-02 06:45:45 -06:00
Gregory Nutt
7b89f64b37 stm32-rtc: Add support for the internal low speed clock (LSI) 
Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock.  Turn on by defining CONFIG_RTC_LSICLOCK.

From Kevin Hester <kevinh@geeksville.com> via Lorenz Meier.
 2015-01-02 06:32:40 -06:00
Gregory Nutt
367af5c65d Cosmetic update to some comments 2015-01-02 06:07:56 -06:00
Gregory Nutt
adb9ac6c60 Cosmetic change to file formatting 2015-01-01 15:55:33 -06:00
Gregory Nutt
bc3fc9e3a3 TM4C129X Ethernet: Add logic to get pre-programmed MAC address from user FLASH registers 2015-01-01 12:28:46 -06:00
Gregory Nutt
48f6e06ed1 Tiva FLASH: Add FLASH register definitions for the TM4C129 family 2015-01-01 11:44:35 -06:00
Gregory Nutt
e83f531724 Tiva PHY: Hard code some properties of the internal PHY 2015-01-01 08:11:17 -06:00
Gregory Nutt
14992be38f Tiva Ethernet: Update Ethernet intializaiton logic. Still things to be done 2015-01-01 07:55:15 -06:00
Gregory Nutt
61edf50f9a Tiva: Add peripheral ready header file; fix typos in clock/pwr enable header files 2015-01-01 07:54:31 -06:00
Gregory Nutt
0eb224aeae Ethernet skeleton: Add some more example logic 2014-12-31 13:45:19 -06:00
Gregory Nutt
cc038a61f6 Tiva Ethernet: Integrate use of workqueue so the network processing is not done at the interrupt level 2014-12-31 13:03:00 -06:00
Gregory Nutt
b81661c258 Tiva Ethernet: Add basic clock/power controls for Ethernet and internal PHY 2014-12-31 11:40:01 -06:00
Gregory Nutt
903e7f5d2b Tiva Ethernet: First cut at TM4C129X Ethernet driver. Initial commit is basically just the STM32 Ethernet driver with modifications for a clean compilation in the Tiva environment 2014-12-31 11:34:24 -06:00
Gregory Nutt
a96c91db1e Tiva Ethernet: Minor naming update for compatibility 2014-12-31 09:39:00 -06:00
Gregory Nutt
7c07766468 Tiva Ethernet: Add DMA descriptor definitions 2014-12-31 07:32:11 -06:00
Gregory Nutt
119e957472 Mostly cosmetic 2014-12-30 17:00:15 -06:00
Gregory Nutt
f61d15bb55 Tiva Ethernet: Completes TM4C129X Ethernet register definition header file 2014-12-30 13:42:19 -06:00
Gregory Nutt
408139dada Don't error out if no ethernet definitions available 2014-12-30 13:26:18 -06:00
Gregory Nutt
9a71dc091b Tiva Ethernet: More progress with register bit definitions 2014-12-30 11:08:18 -06:00
Gregory Nutt
8cea115be7 Tiva Ethernet: More progress with register bit definitions 2014-12-30 09:22:24 -06:00
Gregory Nutt
6bd5702778 TM4C129G Ethernet: Add Ethernet register addresses. Header files still incomplete 2014-12-30 08:09:09 -06:00
Gregory Nutt
1dc66f3104 Tiva: Add framework to support the uniqueu TM4C Ethernet register definitions 2014-12-30 07:07:16 -06:00
Gregory Nutt
a0727124c2 stm32: update description and code documentation. Also fixes a few code formattings. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:59:46 -06:00
Gregory Nutt
1a27614552 stm32: fix wait upon vertical blank. This should never have occurred before. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:48:25 -06:00
Gregory Nutt
171c017a0c stm32: fix faulty access to non existing layer. This disables operation that requires double layer support, when configured for single layer only. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:45:30 -06:00
Gregory Nutt
23ac4caf5a C5471: choice has a default value. It should not 2014-12-28 18:15:17 -06:00
Gregory Nutt
ad9429a527 Tiva SSI: Fix oversight in last commit. Would only fixe the case where the single SSI enabled was SSI0 2014-12-28 16:58:36 -06:00
Gregory Nutt
c802d5276b Tiva SSI: Fix some recent breakage to the Tiva SSI driver for the case where only one SSI modules is enabled 2014-12-28 16:55:47 -06:00
Gregory Nutt
59c6f42be4 STM32 Serial: PX4 HW workarround for flaky STM32 RTS. From David Sidrane 2014-12-27 18:58:18 -06:00
Gregory Nutt
d597e94332 Remove STM32-specific RX flow control logic from the upper level serial driver to the lower level STM32 serial driver 2014-12-27 09:45:45 -06:00
Gregory Nutt
405d72c1ad Serial Upper Half: Add watermarks to RX flow control logic 2014-12-27 07:43:06 -06:00
Gregory Nutt
214183ff93 STM32: Fix some incorrectly placed conditional logic 2014-12-26 12:41:35 -06:00
Gregory Nutt
78affd0f9a EFM32 Timer/PWM: Add support for timer/PWM EFM32GG. From Pierre-noel Bouteville 2014-12-26 09:55:19 -06:00
Gregory Nutt
45a93bb30e ARMv7M: More runtine stack checking logic. From David Sidrane 2014-12-26 08:46:25 -06:00
Gregory Nutt
570943bd71 STM32 I2C: Add strings to decode trace events. From David Sidrane 2014-12-26 08:35:21 -06:00
Gregory Nutt
831167f806 Add support for run time stack checking for the STM32. From David Sidrane 2014-12-26 08:30:42 -06:00
Gregory Nutt
8a2a594348 Tiva: Update UART header file for TM4C129X 2014-12-22 14:11:56 -06:00
Gregory Nutt
21f6598faf Tiva: Upate GPIO header file for TM4C129X 2014-12-22 12:59:13 -06:00
Gregory Nutt
f91583af61 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 12:01:33 -06:00
Gregory Nutt
bd2d83c656 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 11:53:31 -06:00
Gregory Nutt
3b863966fe TM4C129X: First cut at new Tiva clock configuration logic 2014-12-22 11:45:10 -06:00
Gregory Nutt
5184e4dade TM4C129X: A small step toward understanding new Tiva clocking 2014-12-22 09:30:41 -06:00
Gregory Nutt
7b6d0391ab Tiva: Rename TIVA_CRC_BASE to TIVA_CCM_BASE 2014-12-21 17:44:11 -06:00
Gregory Nutt
488b02ff6c Tiva: Add support for I2C6-9 2014-12-21 17:20:16 -06:00
Gregory Nutt
f26384c386 Tiva SSI and board configurations: hange negative Tiva logic CONFIG_SSIx_DISABLE to positive logic CONFIG_TIVA_SSIx. Add support for SSI2 and SSI3 2014-12-21 15:23:37 -06:00
Gregory Nutt
3ea03b9806 Improved comments 2014-12-21 14:09:04 -06:00
Gregory Nutt
f4543de408 TM4C129X: Increated power/clocking macros into I2C driver 2014-12-21 13:02:12 -06:00
Gregory Nutt
20986de89e TM4C129X: Add macros to enable/disable peripheral power 2014-12-21 11:40:39 -06:00
Gregory Nutt
9857b59e79 Tiva SSI: Use portable macros to enable peripheral clocking 2014-12-21 11:16:21 -06:00
Gregory Nutt
8ed83ac3a5 Tiva: More run mode clock enable macros 2014-12-21 11:02:56 -06:00
Gregory Nutt
d701532141 TM4C129X: Framework for new Tiva clocking logic (details not yet implemented) 2014-12-21 10:14:40 -06:00
Gregory Nutt
36acfdb26f Tiva: Completes first cut at system control header file 2014-12-20 12:05:22 -06:00
Gregory Nutt
22b4def56e Tiva: More TM4C129 system control register definitions 2014-12-20 11:10:10 -06:00
Gregory Nutt
e14608b272 Tiva: More TM4C129 system control register definitions 2014-12-20 09:59:21 -06:00
Gregory Nutt
b49f8b3baf Tiva: Add a configuration setting to better distinguish TM4C123 and 129 families. Reanem tm4c_syscontrol.h to tm4c123_syscontrol.h; rename tm4c129x_syscontrol.h to tm4c129_syscontrol.h 2014-12-20 08:38:11 -06:00
Gregory Nutt
ffae2cb3d7 Tiva: Updates to system control regiser definitions 2014-12-20 08:22:17 -06:00
Gregory Nutt
16a302e732 STM32 LTDC: Move ltdc.h from include/nuttx/video to arch/arm/include/stm32; Trivial updates after general review 2014-12-19 14:52:17 -06:00
Gregory Nutt
44d72c6545 stm32: Add configuration option for ltdc 
This adds the following ltdc configuration options:
- dither support
- cmap support, is this the right place for CONFIG_FB_CMAP?
- support for extended ltdc interface

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:58:39 -06:00
Gregory Nutt
193edfb7be stm32: implements ltdc frambuffer and support for ltdc layer operation 
This implements the framebuffer support for the generic nuttx framebuffer
interface, (see nuttx/video/fb.h)

This also implements the interface to perform hardware accelerated layer
operation by the ltdc controller and dma2d controller later (see
nuttx/video/ltdc.h).

The following methods are supported by the ltdc interface:

- getvideoinfo
  Get video information of the layer

- getplaneinfo
  Get plane information of the layer

- getlid
  Handle specific layer identifier. This allows to detect to current layer
  state (e.g. important for layer flipping)

- setclut
  Set the layer color lookup table. Up to 256 color entries supported.

- getclut
  Get the layer color lookup table

- setcolor
  Set the default layer color. In the context of the ltdc layer this means set
  the default color outside the active area or if the layer is disabled.

- getcolor
  Get the default layer color

- setcolorkey
  Set the layer colorkey (chromakey). Colorkey is enabled by blendmode
  LTDC_BLEND_COLORKEY

- getcolorkey
  Get the layer colorkey

- setalpha
  Set the constant alpha value. If blend mode LTDC_BLEND_SRCPIXELALPHA or
  LTDC_BLEND_DESTPIXELALPHA is defined than the blended color is calculated
  by the formel:
    Cdest = Pixelalpha * Constalpha * Csrc.
  Otherwise:
    Cest = Constalpha * Csrc

- getalpha
  get the alpha value

- setblendmode
  Set the layer blendmode.
  Supported blendmodes:
    non blendmode (do not perform blend operation independent on the layers
                   alpha and colorkey)
    alpha          alpha blending (transparency)
    destpixelalpha use pixel alpha value for the top layer (Layer2)
    srcpixelalpha  use pixel alpha value for the subjacent layer (Layer1)
    colorkey       enable colorkey

- getblendmode
  Get the layer blendmode

- setarea
  Set the active layer area, the visible rectangle inside the whole layer.
  This also allows to change the position of the whole layer which is visible in
  the selected area independent on the area position.

- getarea
  Get the active layer area

- update
  Reload the layer shadow register and make changes visible. Also supports
  layer flipping.

Note! Dithering and background color are static parameter and can only changed
at build time.

Implementation details:

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings are shadowed before they become active (except setclut).
They are still inactive until the layer is updated. This is done by the update
method. Should clut only active after an update or not? Clut is used for drawing
while the other settings usually used for blend or blit operations. So i think
this should be the right way.

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings shadowed before they become active (except clut).
They are still inactive until the layer is updated. This is done by the update
call. Should clut only activated after an update or not? Clut is used for draw
operation while the other settings usually used for blend or blit operations.
So i think this should be the right way.

Deviations from the ltdc hardware implementation:

- Shadow register update of both layer (Layer1 or Layer2) is independent as long
  LTDC_UPDATE_SIM is not set. This flag allows to update both layer simultaneous.
  Otherwise only the desired layer is updated.

Layer operation:

Keep in mind, both layer are allways active (of course if both enabled by the
configuration). First the Layer 1 is blended with the background color and the
result is blended with the Layer2. To avoid blend effects, set the Layer2 in non
blend mode. This is equal to blend with alpha = 255. Enable blending of Layer2
with the background color by enable blending of Layer1 and disable the opacity
by setting the alpha value to 0.

Layer flip:

A layer flip usual mean swapping two framebuffer. So the current inactive buffer
can refreshed with data while the active framebuffer is visible. A flip
operation changes the inactive layer to the active one and vice versa.

The ltdc implementation supports layer flip. This can be done by the update call
and the flag LTDC_UPDATE_FLIP. In this case ltdc makes the inactive layer
invisible. In detail, the inactive layer is disabled and the blendmode reset.
Detection of the current layer state (e.g. active or inactive) is supported
by the getlid method combined with one of the LTDC_LAYER_* flags.
Maybe an additional method "flip" for flip operation should be added to the ltdc
interface? But this make no sence from my view if the layer is a non LTDC layer,
e.g. playing with dma2d only.

Supported and tested nuttx pixel formats:

Single Layer without LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Single Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Dual Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Why is FB_FMT_ARGB8888 missing?

Changes:
- Remove unused register debug method.

Todo:
- Add support for backlight, currently not neccessary

Did i forgot something? Take a look in the ltdc example or the interface
description (see nuttx/include/video/ltdc.h).

Thanks to Ken for the base layout. ;)

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:48:53 -06:00
Gregory Nutt
83d87e5ef7 stm32: Add infrastructure for dma2d support 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:41:08 -06:00
Gregory Nutt
060a61dfac stm32: Add common stm32 layer description. This defines a common layer description for the ltdc and dma2d controller. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:37:08 -06:00