Commit Graph

43309 Commits

Author SHA1 Message Date
Petro Karashchenko
af614ac77d tls: restore C89 compatibility for TLS
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-13 21:14:53 -06:00
ligd
9a86aa7f77 syslog_rpmsg: fix typo
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 11:08:28 -06:00
ligd
93426ca7cc syslog_rpmsg: update syslog_rpmsg to support non-overwrite
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 11:08:28 -06:00
ligd
5b369c5cec libs/lbc: remove CHAR_BIT = 16 support
For CEVA platform CHAR_BIT is 16, and will do lots of extra work
when use IPC.
We will not support this platform anymore, so remove all the b2c operations.

Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 11:08:28 -06:00
Xiang Xiao
db6dd623c6 libc/gettextdomain: Fix the typo error
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-13 11:07:27 -06:00
ligd
f5ddbb317f rptun: support can_recursive check for openamp
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 08:32:57 -06:00
ligd
5b696559d9 audio/audio_comp.c: capbility channel should use collections
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 08:31:33 -06:00
ligd
5f3aa40f10 audio/audio_comp.c: capability should use collections
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 08:31:33 -06:00
chao.an
c2fd66bfab arch/arm/risc-v/xtensa: add support of all symbols for debugging
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 08:31:13 -06:00
chao.an
d3a07ca26c libs/printf: add support for print symbol name
Show a '%p' thing.  A nuttx extension is that the '%p' is followed
by an extra set of alphanumeric characters that are extended format
specifiers.

* - 'S' For symbolic direct pointers (or function descriptors) with offset
* - 's' For symbolic direct pointers (or function descriptors) without offset

printf("%ps %pS\n", ptr, ptr) will print:

module_start module_start+0x0/0x62

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 08:31:13 -06:00
chao.an
d20bd62e08 libc/allsyms: Load all symbols for debugging
let the nuttx print out symbolic crash information and
symbolic stack backtraces. This increases the size of the nuttx
somewhat, as all symbols have to be loaded into the nuttx image.

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 08:31:13 -06:00
Abdelatif Guettouche
d31a0d8aca arch/xtensa/esp32: Show CPU activity on IDLE task and on interrupts.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-13 08:30:58 -06:00
Abdelatif Guettouche
93def58b9d esp32-wrover-kit/esp32_autoleds.c: Use LEDs to show CPUs activity.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-13 08:30:58 -06:00
Abdelatif Guettouche
6262f7e99a esp32_idle.c: Change private function's name to start with esp32_
instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-13 08:30:58 -06:00
Jiuzhu Dong
8b0d45abef charger: fix crash when notify without pollwaiter
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-12-13 05:34:49 -06:00
ligd
68bbcf74c4 local_socket: filename use "/var/socket/xx" instead of "/var/socketxx"
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 02:37:11 -06:00
ligd
b294303e41 hostfs: add lock to hostfs_rewinddir
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 02:00:47 -06:00
chao.an
89e2f00dad arch/assert: fix the stack dump overflow
[ EMERG] kasan_report: kasan detected a read access error, address at 0x3c24fca8, size is 4
[ EMERG] up_assert: Assertion failed at file:kasan/kasan.c line: 104 task: init
[ EMERG] backtrace|10:  0x2c334666 0x2c35f0d6 0x2c359ef6 0x2c35f830 0x2c360ed4 0x2c3615c0 0x2c324e0c 0x2c30a168
[ EMERG] up_registerdump: R0: ffffffff R1: 00000004 R2: ffffffff R3: ffffffff
[ EMERG] up_registerdump: R4: 3c20d4f0 R5: 2c35acd5 R6: 00000000 FP: 3c24fae8
[ EMERG] up_registerdump: R8: 3c20d504 SB: ffffffff SL: 2c413e7c R11: 2c411eb8
[ EMERG] up_registerdump: IP: 00000002 SP: 3c24fae8 LR: 00000003 PC: 2c35f0d6
[ EMERG] up_registerdump: xPSR: 61010000 BASEPRI: 000000e0 CONTROL: 00000004

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 01:43:18 -06:00
chao.an
4703ef93cc sched/semaphore: remove redundant goto case
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 14:38:44 +09:00
chao.an
102a6357ca Revert "sched: Remove a redundant critical section"
There is a potential problem that can lead to deadlock at
condition wait, if the timeout of watchdog is a very small value
(1 tick ?), the timer interrupt will come before the nxsem_wait()

Revert "sched: pthread: Remove a redundant critical section in pthread_condclockwsait.c"
Revert "sched: semaphore: Remove a redundant critical section in nxsem_clockwait()"
Revert "sched: semaphore: Remove a redundant critical section in nxsem_tickwait()"

This reverts commit 7758f3dcb1.
This reverts commit 2976bb212e.
This reverts commit 65dec5d10a.

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 14:38:44 +09:00
chao.an
0b7b8d274f arm/cortex-m: enhance the crash dump
1. add irq stack information to list
2. add cpu loading into list

before:

Idle Task: PID=0 PRI=0 Stack Used=512 of 3048
hpwork: PID=1 PRI=224 Stack Used=304 of 2016
lpwork: PID=2 PRI=100 Stack Used=304 of 2016
rptun: PID=4 PRI=224 Stack Used=856 of 2008

after:

[ EMERG] [ap] up_showtasks:    PID    PRI      USED     STACK   FILLED       CPU   COMMAND
[ EMERG] [ap] up_showtasks:   ----   ----       928      2048    45.3%      ----   irq
[ EMERG] [ap] up_dump_task:      0      0       512      3048    16.7%     99.4%   Idle Task
[ EMERG] [ap] up_dump_task:      1    224       304      2016    15.0%      0.0%   hpwork
[ EMERG] [ap] up_dump_task:      2    100       304      2016    15.0%      0.0%   lpwork
[ EMERG] [ap] up_dump_task:      4    224       856      2008    42.6%      0.0%   rptun

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-12 21:40:29 -06:00
lupyuen
2a87b37a69 riscv/bl602: Swap SPI MISO and MOSI 2021-12-12 20:40:49 -06:00
Huang Qi
8ce3337e85 arch/risc-v: Implement TLS support
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-12 10:19:00 -06:00
Matheus Castello
294694bb2f arch: arm: select LIBC_ARCH_ATOMIC when config ARCH_CHIP_RP2040
Use the common atomic operations when needed.

Signed-off-by: Matheus Castello <matheus@castello.eng.br>
2021-12-11 11:32:17 -06:00
Xiang Xiao
1af8cd4de8 sched: Move argv from tcb_s to task_info_s
argv is allocated from stack and then belong to userspace,
so task_info_s is a best location to hold this information.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-11 10:08:53 -06:00
Xiang Xiao
3d6a5a2d0d syslog: Add [] around the prefix like others
make the output format consistent

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-11 10:08:32 -06:00
Jiuzhu Dong
befad07fd4 bch: specify the alignment of bch buffer by CONFIG_BCH_BUFFER_ALIGNMENT
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-12-11 10:01:54 -06:00
Jiuzhu Dong
f81ffb51cc bch/ioctl: support FLUSH cache by cmd: BIOC_FLUSH
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-12-11 10:01:54 -06:00
zhanghu6
84019b9170 noteram: when the buffer overflow happen and give the asan report
READ of size 1 at 0x5ec78f90 thread T0
0 0x59682d7a in noteram_remove note/noteram_driver.c:432
1 0x59683c43 in sched_note_add note/noteram_driver.c:854
0x5ec78f90 is located 0 bytes to the right of global variable 'g_noteram_info' defined in 'note/noteram_driver.c:95:30' (0x5ec78780) of size 2064
0x5ec78f90 is located 48 bytes to the left of global variable '*.Lubsan_type0' defined in 'note/noteram_driver.c' (0x5ec78fc0) of size 10
reason: that read pos is tail of g_noteram_info.ni_buffer causes overflow
2021-12-10 12:33:14 -06:00
Juha Niskanen
a35d205f3b arch/arm/src/stm32l4/stm32l4_pwm.c: fix printf format
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-12-10 12:30:26 -06:00
Masayuki Ishikawa
8438813ebe boards: spresense: Update smp/defconfig
Summary:
- Add CONFIG_ARCH_LEDS_CPU_ACTIVITY=y
- Add CONFIG_BOARDCTL_RESET=y

Impact:
- None

Testing:
- Tested with ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-12-10 06:46:22 -06:00
Jari van Ewijk
2e47ef32cf GPIO driver: register all pintypes as generic /dev/gpioN 2021-12-09 23:55:12 -06:00
Daniel Agar
efc949bceb arch/arm/src/stm32/Kconfig STM32_STM32F412 add SPI2 & SPI3 2021-12-09 21:30:41 -06:00
Masayuki Ishikawa
a8d446851c fs: fat: Use uint16_t instead of wchar_t
Summary:
- Due to the recent changes of wchar_t, ls command always
  causes errors for the fat file system.
- This commit fixes this issue by replacing wchar_t with
  uint16_t under fs/fat

Impact:
- None

Testing:
- Tested with spresense:wifi and stm32f4discovery:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-12-09 21:29:29 -06:00
Jari van Ewijk
bcf9b4e5cd timer-gpout example renamed to timer-gpio 2021-12-09 12:00:36 -06:00
chao.an
3d75c25737 cortex-m/hardfault: enhance the dump information of mem/hard-fault
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 11:42:21 -06:00
chao.an
66e604b40e cortex-m/hardfault: add usage-fault handler
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 11:42:21 -06:00
chao.an
2f449245cc cortex-m/hardfault: add bus-fault handler
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 11:42:21 -06:00
chao.an
99fa58c871 arm/cortex-m23: armv8-m baseline do not support mem-fault
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 05:36:00 -06:00
chao.an
3e812dd88c cortex-m/fault: add CFSR(Configurable Fault Status Register) Definitions
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 04:30:06 -06:00
Xiang Xiao
6357523892 arch: Add _wchar_t typedef like other basic types
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-09 16:57:23 +09:00
Xiang Xiao
334bb9768a Revert "sim: Specify -fshort-wchar as NuttX wchar_t is 16-bit"
It's better to apply the default compiler option to improve the compatibility
This reverts commit 3fc06ff2d1.
2021-12-09 16:57:23 +09:00
chao.an
9b502dca05 arm/backtrace: disable the sanitize address check
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 01:05:46 -06:00
chao.an
7a61588b00 cortex-m/backtrace: remove the push process to simplify backtrace
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 01:05:46 -06:00
chao.an
437c81f8d0 cortex-m/assert: dump all registers with alias
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 00:16:04 -06:00
chao.an
0161da4415 sched/dumpstack: raise the stack dump level to emergency
since sometimes dumpstack will be used in extreme situations(eg. assert)

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-09 00:14:30 -06:00
Masayuki Ishikawa
83edd2fbba sched: signal: Introduce a private spinlock in sig_action.c
Summary:
- This commit introduces a private spinlock in sig_action.c

Impact:
- None

Testing:
- Tested with spresense:wifi_smp and spresense:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-12-09 00:13:31 -06:00
ligd
2f55807acb sched/signal: add spinlock to g_sigfreeaction
To avoid nxsig_alloc_action() & nxsig_release_action() competition

Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-09 11:55:24 +09:00
Michal Lenc
ae57492189 samv7: enable MCAN driver support for both rev A and rev B
This commit enables the MCAN driver to function with both rev A and rev B
version of the chip. The version of the chip is selected automtically from
SAM_CHIPID_CIDR register so there is no need to predefined it in the
configuration.

The functonality was tested on rev B version of the chip. The rev A was
not tested since I do not have the functional board but the code remains
the same as in the previous NuttX version so it should not cause any
additional troubles.

The code is co-authored by Miloš Pokorný who wrote the initial transition
to rev B of the chip.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Co-authored-by: Miloš Pokorný <milos.pokorny@seznam.cz>
2021-12-07 23:36:11 -06:00
Huang Qi
58e0781e2e arch/arm: Implement TLS support
Signed-off-by: Huang Qi <no1wudi@qq.com>
2021-12-07 23:31:41 -06:00