Commit Graph

53217 Commits

Author SHA1 Message Date
Ville Juven
e6973c764c riscv/syscall: Optimize user service call performance
This patch changes how user service calls are executed:
Instead of using the common interrupt logic, execute the user service
call directly.

Why? When a user makes a service call request, all of the service call
parameters are already loaded into the correct registers, thus it makes
no sense to first clobber them and then reload them, which is what the
old logic does. It is much more effective to run the system call directly.

During a user system call the interrupts must be re-enabled, which the
new logic does as soon as we know the exception is a user service call
request.

This patch does NOT change the behavior of reserved system calls (like
switch_context), only the user service call request is affected.
2024-06-01 10:40:53 -03:00
Ville Juven
a5574d9485 risc-v_percpu: Add TCB to the per CPU structure
Also, convert the type to union; we don't need the list element once
the item has been popped from the free list (the linkage is never needed
when the item is in use).
2024-06-01 10:40:53 -03:00
Ville Juven
6bad48e4c7 riscv_syscall.S: Remove duplicated code
Return from exception is common code for both system calls and
exceptions
2024-06-01 10:40:53 -03:00
raiden00pl
394de18316 netfilter/ip_tables.h: fix gcc14 error
/home/raiden00/git/RTOS/nuttx/nuttx/include/nuttx/net/netfilter/ip_tables.h:281:24: error: returning 'char *' from a function with incompatible return type 'struct xt_entry_target *' [-Wincompatible-pointer-types]
  281 |   return (FAR char *)e + e->target_offset;
      |          ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~
2024-05-31 18:14:11 -03:00
raiden00pl
3ce9e34ec9 include/crypto/curve25519.h: fix gcc14 error
/home/raiden00/git/RTOS/nuttx/nuttx/include/crypto/curve25519.h:42:5: error: implicit declaration of function 'arc4random_buf' [-Wimplicit-function-declaration]
   42 |     arc4random_buf(secret, CURVE25519_KEY_SIZE);
2024-05-31 18:14:11 -03:00
anjiahao
3312ab2087 gdbstub:fix get thread rsp command crash
riscv-gdb/gdb/thread.c:1309: internal-error: void switch_to_thread(thread_info*): Assertion `thr != NULL' failed.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-05-31 23:19:18 +08:00
Jouni Ukkonen
a5cd1cf89b imx9: map flexspi peripheral interface
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-05-31 10:22:27 +08:00
Jouni Ukkonen
8382916d26 Map iMX93 OCRAM memory to mmu
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-05-31 10:22:27 +08:00
Jouni Ukkonen
e8de8cf60a Add S3MUA base address for Security Enclave
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-05-31 10:22:27 +08:00
Stuart Ianna
1f02c05c6d arch/litex/litex_arch_alarm: Support tickless schedular with arch alarm.
This provides an alternate tickless scheduling method, which uses the riscv
mtimer as a timebase, allowing the time and timeh registers to used
throughout an application.

The exiting tickless method, using Litex's timer0 has been left in place, as
it is a more performant option, but currently has the potential issue
identified in #11189.
2024-05-31 10:21:44 +08:00
Ville Juven
c1f3245167 riscv-v/fork.S: Fix clobbering of s0 in fork()
Value of s0 (callee-saved) must be preserved through the call, use
a0 (caller-saved) to calculate the original SP instead.
2024-05-31 02:29:48 +08:00
xuxin19
275ec7102c cmake:bugfix CMake compilation options settings should not use strings
when repeatedly enabling and disabling string-controlled configurations,
the generated toolchain configuration may be incorrect.

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-05-30 10:02:10 -03:00
simbit18
fde641fac9 Fix Kconfig style
correct block name board
Remove extra TABs
Add comments
2024-05-29 17:15:57 -03:00
hujun5
c06c10f6f3 armv6/7/8-m: use ISB instruction immediately after the MSR instruction
when changing the stack pointer, software must use an
ISB instruction immediately after the MSR instruction.
This ensures that instructions after the ISB instruction
execute using the new stack pointer.

https://developer.arm.com/documentation/101928/0101/The-Cortex-M85-Processor--Reference-Material/Programmer-s-model/Core-registers/CONTROL-register?lang=en

" When changing the stack pointer, software must use an ISB instruction immediately after the MSR instruction. This ensures that instructions after the ISB instruction execute using the new stack pointer."

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-29 14:16:55 -03:00
Alan Carvalho de Assis
105b97d799 boards/raspberrypi-pico: Add support to BMP280
Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-05-29 23:20:15 +08:00
Michal Lenc
f525bc2802 docs: add API description for pulse width modulation peripheral
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-29 10:02:34 -03:00
Michal Lenc
4d9e346ef4 docs: add API description for qencoder peripheral
This adds basic API description for quadrature encoder peripheral.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-29 10:02:34 -03:00
Michal Lenc
f47f9c05aa docs: add API description for ADC/DAC peripherals
This adds basic API description for ADC and DAC peripherals. External
ADC/DAC controllers are listed as well.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-29 10:02:34 -03:00
Huang Qi
97ec55db46 syscall.csv: Correct macro guard of setsockopt
setsockopt only available if both NET and  NET_SOCKOPTS enabled.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-05-29 20:37:12 +08:00
Huang Qi
047c9fce40 libc.csv: Guard execv with LIBC_EXECFUNCS
execv only available if LIBC_EXECFUNCS enabled.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-05-29 20:37:12 +08:00
Michal Lenc
3cc65d5d35 timers/mcp794xx: add option to digital trimming
MCP794XX supports digital trimming that periodically adds or subtracts
clock cycles, resulting in small adjustments in the internal timing.
This way inaccuracies of clock source can be compensated.

This commit adds option to set the trimming register for MCP794XX.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-28 16:34:41 -03:00
Michal Lenc
c59b48355c timers/mcp794xx: add possibility to store datetime in UTC
This commit adds configuration option CONFIG_MCP794XX_DATETIME_UTC.
If set, the datetime is stored in UTC instead of local time. The
default value is kept at local time to keep backwards compatibility
with devices currently using the RTC.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-28 16:34:41 -03:00
simbit18
3b2faa31e8 tools/ci/testlist: msys2.dat add qemu-v8a:nsh_smp
add build board qemu-v8a:nsh_smp 64-bit Arm Cortex-A53 with Multiple Cores
2024-05-28 16:29:06 -03:00
Michal Lenc
649ccb2d45 samv7: add support for user signature area in embedded flash
Embedded flash can have user signature area on SAMv7. This is a 512
bytes large page whose data are not erased by asserting ERASE pin or by
software ERASE command.

This commit adds arch to board interface for this area. It is possible
to perform read, write and erase operation. SAMV7_USER_SIGNATURE option
has to be set in the configuration.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-28 16:28:33 -03:00
simbit18
d0f893dfba tools/ci/platforms: linux.sh and ubuntu.sh fix mkdir: wamrc: File exists
mkdir wamrc -> mkdir -p wamrc
2024-05-28 10:22:34 -03:00
Roy Feng
2e98f29277 tls: fix build error under CONFIG_PTHREAD_ATFORK enabled 2024-05-28 13:54:30 +02:00
Yanfeng Liu
bfa1799f1c arm64/imx9evk: enlarge ocram size to unblock CI
This temporary fix is just to unblock CI errors:

```
Configuration/Tool: imx93-evk/bootloader
...
aarch64-none-elf-ld: region `ocram' overflowed by 88 bytes
```

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-28 19:39:11 +08:00
Alan Carvalho de Assis
8d7d687e86 Add support to transparent OLED SSD1309
This patch adds support to transparent OLED powered by SSD1309.
SSD1309 uses the driver from SSD1306.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-05-27 23:38:37 +08:00
simbit18
1cacc70f75 boards/risc-v/litex/arty_a7/Kconfig: Added if LITEX_SDIO for common dependency
Added if LITEX_SDIO
2024-05-27 23:24:54 +08:00
simbit18
97836bf3ab board: esp32c3, esp32 and esp32s3 corrected PM block
removed depends on PM from if PM block
2024-05-27 23:24:31 +08:00
Stuart Ianna
42865caebd nuttx/arch.h: Update parameter type to match definition.
The definition of nxsched_process_cpuload_ticks uses clock_t, which is
portable across uint32_t and uint64_t timers, and works if CONFIG_SYSTEM_TIME64 is
defined.
2024-05-27 23:23:49 +08:00
Michal Lenc
44ef021bc5 analog: add configuration option to set DAC FIFO size
DAC driver uses CONFIG_DAC_FIFOSIZE, but this is not configurable
from Kconfig. This adds the missing option and allows to set DAC
FIFO size from the configuration.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-05-27 23:23:28 +08:00
Yanfeng Liu
0fc2e74b04 sched/mqueue: reclaim message upon failure
This reclaims the allocated message if it can't be sent to avoid
memory leaks.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-26 10:03:34 -03:00
buxiasen
4197b5aec8 pm: do struct timespec copy to decrease api call times.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-05-25 12:07:38 +08:00
David Sidrane
e0396327a2 armv7-r:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
David Sidrane
602e69a810 armv8-m:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
David Sidrane
53307ea9b2 armv7-m:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
Jani Paalijarvi
cfa544357e mpfs_mpu: Check that size is valid for MPUCFG
The size must be power-of-two for NAPOT according to the the PMP spec.

Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
2024-05-24 21:32:55 +08:00
Jani Paalijarvi
9d4bd915eb riscv_pmp.c: Check that size is power of two for NAPOT
The size must be power-of-two according to the the PMP spec.

Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
2024-05-24 21:32:55 +08:00
YAMAMOTO Takashi
b3513c0811 esp32s2/esp32s3 textheap: do not require RTC heap
Unlike esp32, kmm memory is executable.
2024-05-24 21:31:42 +08:00
dongjiuzhu1
00cf0ada4f Revert "arch/sim: temporary remove vfork test to fix cibreak on arch sim"
This reverts commit 8e9f24e02e.
2024-05-24 15:41:20 +08:00
Eren Terzioglu
ea9eea4096 esp32[c3|c6|h2]: Add MWDT1 support 2024-05-24 13:59:03 +08:00
Eren Terzioglu
aa0bb55529 esp32[c3|c6|h2]: Add RWDT support 2024-05-24 13:59:03 +08:00
Eren Terzioglu
44e118eaf2 esp32[c3]: Add RTC IRQ support 2024-05-24 13:59:03 +08:00
buxiasen
07f0e0c166 PM: add stability governer
only when first time change state can hold WFI for enough time thresh,
allow second time goto target state,
suitable for the case when wakeup from sleep too slow, etc.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-05-23 09:57:19 -03:00
Petro Karashchenko
d144a2a80b arch/arm/samv7: enforce compilation error for incompatible configuration options
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:16:00 +08:00
Petro Karashchenko
357f8093ac arch/arm/samv7: fix U(S)ART clock enable for 1-wire
By default U(S)ART clocks are enabled in sam_lowput.c but
configuration check from sam_config.h may override USART configuration
and prevent clocks from been enabled.

This commit fix inconsistency in U(S)ART pinmux and clock configuration

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:46 +08:00
Petro Karashchenko
59a23768c5 arch/arm/samv7: remove duplicated prototypes
sam_lowputc.h is almost identical to sam_start.h so remove
one of the headers

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:21 +08:00
meijian
0bad215cf8 net/tcp: fix tcp will not close when tcp retransmission reaches TCP_MAXRTX
In "psock_send_eventhandler",when retransmit count bigger TCP_MAXRTX nuttx will set release wrb. But before this it will also set "conn->tx_unacked = 0" if we only retransmit one packet(conn->tx_unacked == sent),and In func "tcp_timer" only "conn->tx_unacked > 0" will close the tcp conn. So app will never close if nuttx retransmit over max timers.

Signed-off-by: meijian <meijian@xiaomi.com>
2024-05-22 17:46:04 -03:00
hujun5
61caf7cce9 types: on some arch, execution speed can be accelerated
in arm64 Let's see how the following code looks like in assembly

volatile cpu_set_t g_cpu_set;
cpu_set_t set_cpu_set_t_set(int cpu) {
  g_cpu_set &= ~(1 << cpu);
  return g_cpu_set;
}

when
typedef volatile uint32_t cpu_set_t;
Dump of assembler code for function set_cpu_set_t_set:
   0x0000000040288570 <+0>:	adrp	x2, 0x403ce000 <g_irqvector+1160>
   0x0000000040288574 <+4>:	ldr	w3, [x2, #2368]
   0x0000000040288578 <+8>:	mov	w1, #0x1
   0x000000004028857c <+12>:	lsl	w1, w1, w0
   0x0000000040288580 <+16>:	bic	w1, w3, w1
   0x0000000040288584 <+20>:	str	w1, [x2, #2368]
   0x0000000040288588 <+24>:	ldr	w0, [x2, #2368]
   0x000000004028858c <+28>:	ret

when
typedef volatile uint8_t cpu_set_t;
Dump of assembler code for function set_cpu_set_t_set:
   0x000000004028856c <+0>:	adrp	x2, 0x403ce000 <g_irqvector+1192>
   0x0000000040288570 <+4>:	ldrb	w3, [x2, #2336]
   0x0000000040288574 <+8>:	mov	w1, #0x1
   0x0000000040288578 <+12>:	and	w3, w3, #0xff           // At this time, there will be one more instruction
   0x000000004028857c <+16>:	lsl	w1, w1, w0
   0x0000000040288580 <+20>:	bic	w1, w3, w1
   0x0000000040288584 <+24>:	strb	w1, [x2, #2336]
   0x0000000040288588 <+28>:	ldrb	w0, [x2, #2336]
   0x000000004028858c <+32>:	ret

test:
We can use qemu for testing.

compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-22 19:10:03 +08:00