This commit adds basic support for electrically isolated 8 bit expander.
The expander communicates with the MCU via SPI interface. Both single
and multiple pin read are supported.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
isx019 driver freezes by I2C access in the interrupt context.
This I2C access is intended to stop data output from FPGA.
Delete this I2C access for the following reasons.
- Data output from FPGA does not affect power consumption
- There are no problems in capture restart without data output stop
since restart is done by image data block first.
This commit adds support for galvanic isolated ISO1H812G SPI expander.
Both single pin and multiple pin writes are supported.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Documentation for PWMIOC_SETCHARACTERISTICS ioctl command mentioned
that this command will neither start nor stop the pulsed output. This
however is incorrect as PWMIOC_SETCHARACTERISTICS command leads to
pwm_start() function which starts the pulsed output.
While this might not be the correct behaviour (I would probably welcome
the option to set PWM characteristics without starting the pulsed output)
it is the way the PWM driver is coded for many architectures. Future
enhancement might be to add function pwm_setchar() for example to just
set characteristics without starting the PWM output.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
TCP receive tested with different IOB_BUFSIZE:
| | 256B vs 1534B | 512B vs 1534B | 768B vs 1534B |
| :---------: | :-----------: | :-----------: | :-----------: |
| Non-SMP | ~85% | ~93% | ~96% |
| armv8a-SMP | ~66% | ~84% | ~92% |
| rv32/64-SMP | ~52% | ~72% | ~83% |
It seems we still get performance penalty on smaller IOBs, and may be
affected more under SMP mode. It may be caused by critical sections in
IOB operations.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
Some driver like virtio-net can offload fragmented IOBs, so an interface
to support this feature is needed.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
Previously, the CONFIG_NET_LL_GUARDSIZE is fixed to 32 (64-Bit) or
28 (32-Bit), it's a little bit tricky.
Now add support to any value greater than minimal size.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
In a multi-core heterogeneous architecture, tun device nodes of protocol
stack core can be accessed by other cores through ioctl
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
In class disconnect, resetconfig will be performed based on
configid, so configid should be cleared after disconnect.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
We use enter_critical_section to protect the read and write of priv structures,
sched_lock is mainly used to prevent active context switching caused by nxsem_post.
We do not actively switch contexts when reading and writing priv structures,
so sched_lock can be removed.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Adding the CONFIG_ARCH_PERF_EVENTS configuration to enable
hardware performance counting，solve the problem that some platform
hardware counting support is not perfect, you can choose to use
software interface.
This is configured using CONFIG_ARCH_PERF_EVENTS, so weak_functions
are removed to prevent confusion
To use hardware performance counting, must:
1. Configure CONFIG_ARCH_PERF_EVENTS, default selection
2. Call up_perf_init for initialization
Signed-off-by: wangming9 <wangming9@xiaomi.com>
