Commit Graph

20043 Commits

Author SHA1 Message Date
Lucas Saavedra Vaz
15dadd0099 arch/xtensa/esp32: Remove redundant RTC registers 2022-12-14 22:38:10 +08:00
Lee Lup Yuen
b895207489 arm64/a64: Add driver for MIPI DSI
This PR adds the driver for Allwinner A64's MIPI Display Serial Interface (DSI) and MIPI Display Physical Layer (D-PHY).

This driver will be used by the upcoming Display Driver for PINE64 PinePhone.

- `include/nuttx/crc16.h`: Added 16-bit CRC-CCITT

- `libs/libc/misc/Make.defs`: Added 16-bit CRC-CCITT to Makefile

- `arch/arm64/src/a64/Kconfig`: Added the Kconfig option for "A64 Peripheral Selection > MIPI DSI" (`CONFIG_A64_MIPI_DSI`), which enables the MIPI DSI Driver

- `arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for MIPI DSI

- `arch/arm64/src/a64/Make.defs`: Added the MIPI DSI Driver to the Makefile

- `libs/libc/misc/lib_crc16ccitt.c`: Compute 16-bit CRC-CCITT

- `arch/arm64/src/a64/mipi_dsi.c`, `mipi_dsi.h`: Compose MIPI DSI Packets (Long, Short, Short with Parameter)

- `arch/arm64/src/a64/a64_mipi_dsi.c`, `a64_mipi_dsi.h`: MIPI DSI Driver for Allwinner A64

- `arch/arm64/src/a64/a64_mipi_dphy.c`, `a64_mipi_dphy.h`: MIPI D-PHY Driver for Allwinner A64

- `platforms/arm/a64/boards/pinephone/index.rst`: Added MIPI DSI as supported peripheral for PinePhone

Co-Authored-By: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-14 22:37:32 +08:00
David Sidrane
1760057e29 s32k1xx:Apply Style Changes from code review
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-14 21:03:31 +08:00
David Sidrane
592e946bdf 32k1xx:serial:Support GPIO (buffler level) Flow control 2022-12-14 21:03:31 +08:00
David Sidrane
5a948ed3dd 32k1xx:serial fix HW Handshaking 2022-12-14 21:03:31 +08:00
David Sidrane
9bb1226b04 s32k1xx:serial Add EDMA 2022-12-14 21:03:31 +08:00
David Sidrane
8a412ba59b s32k1xx:Refactor DMAMUX for s32k11x, s32k14x 2022-12-14 21:03:31 +08:00
anjiahao
bc0fe0ea16 crypto:add some hardware support
esp32c3: aes hmac-sha1 hmac-sha256
stm32f0l0g0 stm32l1 : aes
sam34: aes
lpc43: aes
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-12-14 02:33:56 +08:00
anjiahao
2b071b7a42 arch/armv8m:support pmu api
The register definition comes from CMSIS
https: //github.com/ARM-software/CMSIS_5
commit id:10bf763a82318c0c852ff9ecc2d5cd8cebe7d761
file: Core/Include/pmu_armv8.h
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-12-14 00:27:02 +08:00
David Sidrane
4284d0398b imxrt:Serial LPUART_STAT_PF s/b LPUART_STAT_NF
as a result of a typo LPUART_STAT_NF was not checked and
   cleared on LPUART_STAT_PF.
2022-12-14 00:26:42 +08:00
Peter van der Perk
6b3b5751c1 S32K automatically calculate size of periphclocks array 2022-12-13 19:50:01 +08:00
chao an
47fbfa215e fs/hostfs: mode_t of mkdir(2) should use the nuttx prototype
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-13 18:16:20 +08:00
chao an
aad16d16e2 sim/windows: add hostfs support for windows
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-13 18:16:20 +08:00
田昕
0382b63f5d move common assert logic together.
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-12-12 17:05:02 +08:00
chao an
61563d6004 risc-v/es32c3: improve passthrough performance by iob offload
Use iob offload model to improve passthrough performance

1. Use iob buffer instead of reserved packet buffer
2. Enable TCP/UDP buffer mode

-------------------------------------------------
|  Protocol      | Server | Client |            |
|-----------------------------------------------|
|  TCP           |    7   |    12  |  Mbits/sec |
|  TCP(Offload)  |   17   |    11  |  Mbits/sec |
|  UDP           |   10   |    16  |  Mbits/sec |
|  UDP(Offload)  |   43   |    28  |  Mbits/sec |
-------------------------------------------------

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-11 16:19:20 +08:00
Peter Bee
a5a1a68a25 arch/sim: add v4l2 driver for sim
communicate with Linux host v4l2 drivers

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-12-09 23:37:49 +08:00
Gustavo Henrique Nihei
9af5dca7dc risc-v/esp32c3: Refactor and rename linker scripts
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-09 11:19:27 +08:00
zhangyuan21
ffd2eb5b14 arch/arm: only compare callee-saved registers for fpu
Registers S0-S15 (D0-D7, Q0-Q3) do not need to be preserved. They can be used for passing
arguments or returning results in standard procedure-call variants.
Registers D16-D31 (Q8-Q15), do not need to be preserved.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-09 11:00:38 +08:00
Alan Carvalho de Assis
fbdd246878 esp32: Fix maximum I2C FIFO size (now SSD1306 will work) 2022-12-09 02:23:28 +08:00
wangbowen6
27ea9f7625 arm/Kconfig: add cortex-m85 config
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-12-09 01:53:10 +08:00
Gustavo Henrique Nihei
236ee5c80d xtensa/esp32: Rename linker scripts into more meaningful names
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-08 21:55:29 +08:00
wangbowen6
c44f87eb1a arm: add syscall SYS_save_context support for old arm and armv7-r
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-12-08 12:37:29 +08:00
TimJTi
18482efc39 SAMA5D2 fix printf formatter
Update sam_adc.c

Update sam_adc.c

%08x -> PRIx32

More %08x

Revert incorrect change (PRIx32)

Update sam_tc.c

Update sam_tc.c

more style corrections/typos

Update arch/arm/src/sama5/sam_adc.c

Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
2022-12-07 21:33:17 +01:00
zouboan
753f46dffe arch/arm64: add support of systemreset 2022-12-07 21:17:39 +08:00
chao an
af149b44cd risc-v/backtrace: fix compile warning
common/riscv_backtrace.c: In function 'up_backtrace':
common/riscv_backtrace.c:145:27: error: passing argument 1 of 'backtrace' from incompatible pointer type [-Werror=incompatible-pointer-types]
  145 |           ret = backtrace(g_intstackalloc,
      |                           ^~~~~~~~~~~~~~~
      |                           |
      |                           uint8_t * {aka unsigned char *}
common/riscv_backtrace.c:64:33: note: expected 'uintptr_t *' {aka 'unsigned int *'} but argument is of type 'uint8_t *' {aka 'unsigned char *'}
   64 | static int backtrace(uintptr_t *base, uintptr_t *limit,
      |                      ~~~~~~~~~~~^~~~
common/riscv_backtrace.c:146:43: error: passing argument 2 of 'backtrace' from incompatible pointer type [-Werror=incompatible-pointer-types]
  146 |                           g_intstackalloc + CONFIG_ARCH_INTERRUPTSTACK,
      |                                           ^
      |                                           |
      |                                           uint8_t * {aka unsigned char *}
common/riscv_backtrace.c:64:50: note: expected 'uintptr_t *' {aka 'unsigned int *'} but argument is of type 'uint8_t *' {aka 'unsigned char *'}
   64 | static int backtrace(uintptr_t *base, uintptr_t *limit,
      |                                       ~~~~~~~~~~~^~~~~

Regression by:
| commit 70290b6e38
| Author: Xiang Xiao <xiaoxiang@xiaomi.com>
| Date:   Tue Sep 20 02:38:54 2022 +0800
|
|     arch: Change the linker generated symbols from uint32_t to uint8_t *
|
|     and remove the duplicated declaration
|
|     Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-07 19:13:09 +08:00
Gustavo Henrique Nihei
1ecaa4e672 xtensa/esp32s3: Configure the PMS peripheral for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-07 03:07:45 +08:00
Gustavo Henrique Nihei
bfc40c74d0 xtensa/esp32s3: Add support for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-07 03:07:45 +08:00
Lucas Saavedra Vaz
4320eed4a1 arch/xtensa/esp32: Optimize macros and ensure overwrite protection 2022-12-07 00:02:28 +08:00
Xiang Xiao
d6c8c269f5 arch/sim: Change usrsock_host_ prefix to host_usrsock_
to align with other similar function style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-06 13:12:21 +01:00
Xiang Xiao
79c8b7d3fd arch/sim: Change sim_host_ prefix to host_
to align with the other similar function style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-06 13:12:21 +01:00
Xiang Xiao
4e24ef23f4 arch/sim: Move host files to the correct location
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-06 13:12:21 +01:00
Lee Lup Yuen
c2d75c930b arm64/a64: Add drivers for PIO and LEDs
This PR adds the drivers for Allwinner A64 PIO (Programmable I/O) and PinePhone LEDs (Red / Green / Blue).

The PIO Driver is based on the NuttX PIO Driver for Allwinner A10: [`arch/arm/src/a1x/a1x_pio.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_pio.c)

-   `arch/arm64/src/a64/Make.defs`: Add PIO Driver to Makefile

-   `boards/Kconfig`: Add `ARCH_HAVE_LEDS` to PinePhone

-   `boards/arm64/a64/pinephone/src/pinephone.h`: Define PinePhone LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_boardinit.c`: Start Auto LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Start User LEDs

-   `boards/arm64/a64/pinephone/src/Makefile`: Add LED Driver to Makefile

-   `boards/arm64/a64/pinephone/configs/nsh/defconfig`: Add `CONFIG_USERLED` to `nsh` config

-   `arch/arm64/src/a64/a64_pio.c`, `a64_pio.h`: Allwinner A64 PIO Driver

-   `arch/arm64/src/a64/hardware/a64_memorymap.h`: PIO Memory Map

-   `arch/arm64/src/a64/hardware/a64_pio.h`: PIO Definitions

-   `boards/arm64/a64/pinephone/include/board.h`: Define PinePhone LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_autoleds.c`: Driver for Auto LEDs

-   `boards/arm64/a64/pinephone/src/pinephone_userleds.c`: Driver for User LEDs

-   `introduction/supported_platforms.rst`: Add Allwinner A64 as Supported Platform

-   `platforms/arm/a64/boards/pinephone/index.rst`: Add PIO and LEDs to PinePhone
2022-12-06 18:14:39 +08:00
Lucas Saavedra Vaz
9cdbec3769 arch/xtensa/esp32: Modify REG_[GET/SET]_FIELD to use [get/set]reg32 2022-12-06 10:53:06 +08:00
Peter van der Perk
9c27d96b8a s32k3xx:LPSPI Check for TX complete before RX
Co-authored-by: David Sidrane <david.sidrane@nscdg.com>
2022-12-05 22:35:21 +08:00
Peter van der Perk
e7449cf97a S32K3XX EDMA Set Backdoor for DTCM memory map 2022-12-05 22:35:21 +08:00
pengyiqiang
922c4df7ef arch/sim: add fb poll notify support 2022-12-05 17:24:43 +08:00
chao an
4592ce2f07 sim/netdriver: set ipv6 addr to host route
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-05 13:54:07 +08:00
chao an
53a63c517a sim/netdriver: fix build break if enable NET_IPv6 only
In file included from sim/sim_netdriver.c:73:
sim/sim_netdriver.c: In function ‘netdriver_ifup’:
sim/sim_netdriver.c:284:32: error: ‘struct net_driver_s’ has no member named ‘d_ipaddr’; did you mean ‘d_ipv6addr’?
  284 |   sim_netdev_ifup(devidx, dev->d_ipaddr);
      |                                ^~~~~~~~
sim/sim_internal.h:279:67: note: in definition of macro ‘sim_netdev_ifup’
  279 | #  define sim_netdev_ifup(idx,ifaddr)         sim_tapdev_ifup(idx,ifaddr)
      |

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-05 01:42:01 +08:00
chao an
d12ddf56df arm/arm: sync ARM_THUMB support from cortex-a
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-05 01:09:31 +08:00
Xiang Xiao
c6e9edcbb6 net: Rename arp_arpin to arp_input
align with other similar function(e.g. ipv4_input and ipv6_input)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-04 20:39:21 +08:00
chao an
62004a28a6 net/d_buf: remove d_buf reference from l3/l4
l3/l4 stack will decouple the reference of d_buf gradually, Only legacy
devices still retain d_buf support, new net devices will use d_iob

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-04 20:37:14 +08:00
chao an
4b70e4ff77 arm/cortex-r: sync ARM_THUMB support from cortex-a
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-04 20:12:31 +08:00
wangbowen6
4859d40a51 arm_syscall: add SYS_save_context for armv7-a
I noticed that there is not register information in the crash log
when DEBUGASSERT failed, the reason is that the arm_dumpstate()
call up_saveusercontext() to get the context of current task but
armv7-a do not support syscall SYS_save_context.

crash log:
[48/12/ 7 16:14:03] [CPU1] [10] [a7] up_assert: Assertion failed CPU1 at file:mm_heap/mm_free.c line: 115 task: panel_apps
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38443440 0x38081f30 0x38002888 0x3802cb7c 0x38036e34 0x38037978 0x380386f0 0x38037e64
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38036edc 0x380376a0 0x38035a2c 0x380070d0 0x3804eae4 0x3802abd0 0x3802277c 0x3804b998
[48/12/ 7 16:14:03] [CPU1] [10] [a7] backtrace|10: 0x38091be8 0x38099250 0x38096adc 0x3808f134 0x3802d5d8 0x380191a4
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R0: 00000000 R1: 00000000 R2: 00000000  R3: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R4: 00000000 R5: 00000000 R6: 00000000  R7: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: R8: 00000000 SB: 00000000 SL: 00000000  FP: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: IP: 00000000 SP: 00000000 LR: 00000000  PC: 00000000
[48/12/ 7 16:14:03] [CPU1] [10] [a7] arm_registerdump: CPSR: 00000000

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-12-04 01:52:49 +08:00
okayserh
0dafa5f921 Added initial USB support for stm32f746g discovery. 2022-12-03 20:06:47 +08:00
David Sidrane
da7fe760e8 s32k1xx:LPI2C Add DMA support
s32k3xx:LPI2C fix RESET so it compiles
2022-12-03 13:54:34 +08:00
chao an
34d2cde8a8 net/l2/l3/l4: add support of iob offload
1. Add new config CONFIG_NET_LL_GUARDSIZE to isolation of l2 stack,
   which will benefit l3(IP) layer for multi-MAC(l2) implementation,
   especially in some NICs such as celluler net driver.

new configuration options: CONFIG_NET_LL_GUARDSIZE

CONFIG_NET_LL_GUARDSIZE will reserved l2 buffer header size of
network buffer to isolate the L2/L3 (MAC/IP) data on network layer,
which will be beneficial to L3 network layer protocol transparent
transmission and forwarding

------------------------------------------------------------
Layout of frist iob entry:

        iob_data (aligned by CONFIG_IOB_ALIGNMENT)
            |
            |                  io_offset(CONFIG_NET_LL_GUARDSIZE)
            |                                |
            -------------------------------------------------
      iob   |            Reserved            |    io_len    |
            -------------------------------------------------

-------------------------------------------------------------
Layout of different NICs implementation:

        iob_data (aligned by CONFIG_IOB_ALIGNMENT)
            |
            |                 io_offset(CONFIG_NET_LL_GUARDSIZE)
            |                                |
            -------------------------------------------------
 Ethernet   |       Reserved    | ETH_HDRLEN |    io_len    |
            ---------------------------------|---------------
 8021Q      |   Reserved  | ETH_8021Q_HDRLEN |    io_len    |
            ---------------------------------|---------------
 ipforward  |            Reserved            |    io_len    |
            -------------------------------------------------

--------------------------------------------------------------------

2. Support iob offload to l2 driver to avoid unnecessary memory copy

Support send/receive iob vectors directly between the NICs and l3/l4
stack to avoid unnecessary memory copies, especially on hardware that
supports Scatter/gather, which can greatly improve performance.

new interface to support iob offload:

  ------------------------------------------
  |    IOB version     |     original      |
  |----------------------------------------|
  |  devif_iob_poll()  |   devif_poll()    |
  |       ...          |       ...         |
  ------------------------------------------

--------------------------------------------------------------------

1> NIC hardware support Scatter/gather transfer

TX:

                tcp_poll()/udp_poll()/pkt_poll()/...(l3|l4)
                           /              \
                          /                \
devif_poll_[l3|l4]_connections()     devif_iob_send() (nocopy:udp/icmp/...)
           /                                   \      (copy:tcp)
          /                                     \
  devif_iob_poll("NIC"_txpoll)                callback() // "NIC"_txpoll
                                                  |
                            dev->d_iob:           |
                                                ---------------         ---------------
                             io_data       iob1 |  |          |    iob3 |  |          |
                                    \           ---------------         ---------------
                                  ---------------  |       --------------- |
                             iob0 |  |          |  |  iob2 |  |          | |
                                  ---------------  |       --------------- |
                                     \             |          /           /
                                        \          |       /           /
                                   ----------------------------------------------
                    NICs io vector |    |    |    |    |    |    |    |    |    |
                                   ----------------------------------------------

RX:

  [tcp|udp|icmp|...]ipv[4|6]_data_handler()(iob_concat/append to readahead)
                    |
                    |
      [tcp|udp|icmp|...]_ipv[4|6]_in()/...
                    |
                    |
          pkt/ipv[4/6]_input()/...
                    |
                    |
     NICs io vector receive(iov_base to each iobs)

--------------------------------------------------------------------

2> CONFIG_IOB_BUFSIZE is greater than MTU:

TX:

"(CONFIG_IOB_BUFSIZE) > (MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE + CONFIG_NET_LL_GUARDSIZE)"

                tcp_poll()/udp_poll()/pkt_poll()/...(l3|l4)
                           /              \
                          /                \
devif_poll_[l3|l4]_connections()     devif_iob_send() (nocopy:udp/icmp/...)
           /                                   \      (copy:tcp)
          /                                     \
  devif_iob_poll("NIC"_txpoll)                callback() // "NIC"_txpoll
                                                  |
                                             "NIC"_send()
                          (dev->d_iob->io_data[CONFIG_NET_LL_GUARDSIZE - NET_LL_HDRLEN(dev)])

RX:

  [tcp|udp|icmp|...]ipv[4|6]_data_handler()(iob_concat/append to readahead)
                    |
                    |
      [tcp|udp|icmp|...]_ipv[4|6]_in()/...
                    |
                    |
          pkt/ipv[4/6]_input()/...
                    |
                    |
     NICs io vector receive(iov_base to io_data)

--------------------------------------------------------------------

3> Compatible with all old flat buffer NICs

TX:
                tcp_poll()/udp_poll()/pkt_poll()/...(l3|l4)
                           /              \
                          /                \
devif_poll_[l3|l4]_connections()     devif_iob_send() (nocopy:udp/icmp/...)
           /                                   \      (copy:tcp)
          /                                     \
  devif_iob_poll(devif_poll_callback())  devif_poll_callback() /* new interface, gather iobs to flat buffer */
       /                                           \
      /                                             \
 devif_poll("NIC"_txpoll)                     "NIC"_send()(dev->d_buf)

RX:

  [tcp|udp|icmp|...]ipv[4|6]_data_handler()(iob_concat/append to readahead)
                    |
                    |
      [tcp|udp|icmp|...]_ipv[4|6]_in()/...
                    |
                    |
               netdev_input()  /* new interface, Scatter/gather flat/iob buffer */
                    |
                    |
          pkt/ipv[4|6]_input()/...
                    |
                    |
    NICs io vector receive(Orignal flat buffer)

3. Iperf passthrough on NuttX simulator:

  -------------------------------------------------
  |  Protocol      | Server | Client |            |
  |-----------------------------------------------|
  |  TCP           |  813   |   834  |  Mbits/sec |
  |  TCP(Offload)  | 1720   |  1100  |  Mbits/sec |
  |  UDP           |   22   |   757  |  Mbits/sec |
  |  UDP(Offload)  |   25   |  1250  |  Mbits/sec |
  -------------------------------------------------

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-03 11:47:04 +08:00
David Sidrane
ddc178122e s32k3xx:EDMA Add Error handeling 2022-12-03 02:47:42 +08:00
David Sidrane
1d84656f79 s32k3xx:EDMA Add Looping and Cleanup 2022-12-03 02:47:42 +08:00
David Sidrane
22390df92d s32k3xx:EDMA fix DMAMUX1 access violation 2022-12-02 22:56:07 +08:00
qiaohaijiao1
18bca596d4 sim/sim_alsa.c: add mp3 offload playback on sim
use host libmad to simulate read DSP.

Signed-off-by: qiaohaijiao1 <qiaohaijiao1@xiaomi.com>
2022-12-02 22:55:38 +08:00
chao an
c1c17794f9 arm/arm: generating assemble code in ARM states by default
The following changes omit the arm version:

| commit d321080351
| Author: chao an <anchao@xiaomi.com>
| Date:   Fri Dec 2 02:52:18 2022 +0800
|
|     arm/cortex-[a|r]: generating assemble code in ARM states by default
|
|     Signed-off-by: chao an <anchao@xiaomi.com>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-02 13:54:17 +08:00
TimJTi
b6c148e763 Style changes for sam_adc.c and sam_tsd.c 2022-12-02 01:09:25 +01:00
chao an
77aede7c87 arm/thumb: outputs an implicit IT block to avoid build break
Fix build break on thumb2 mode:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S: Assembler messages:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S:146: Error: thumb conditional instruction should be in IT block -- `movle pc,lr'

Reference:
https://developer.arm.com/documentation/100067/0612/armclang-Command-line-Options/-mimplicit-it

In A32 code, the integrated assembler accepts all conditional instructions
without giving an error or warning. In T32 code, the integrated assembler
outputs an implicit IT block when there is a conditional instruction
without an enclosing IT block. The integrated assembler does not give an
error or warning about this.

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 22:14:34 +01:00
chao an
9ab97df0a5 arm/cortex-[a|r]/thumb: force assembler files to be interpreted as Thumb code
The option '-mthumb' is only valid for C source files and it is not passed to the assembler.

If 'thumb' is not considered in some assembly projects, the system will generate
'undefined instructions' when running incompatible instruction:

arm_undefinedinsn: Undefined instruction at 0x380cfc98

This assembly file should be compiled with .thumb but it doesn't:

380cfc90 <hobot_i8_i32_gemm_nn_m4_n8_neon>:
380cfc90: e92d4ff0  push  {r4, r5, r6, r7, r8, r9, sl, fp, lr}
380cfc94: ed2d8b10  vpush {d8-d15}
380cfc98: e59d4064  ldr r4, [sp, #100]  ; 0x64   <-- Undefined instruction
380cfc9c: e59d5068  ldr r5, [sp, #104]  ; 0x68
380cfca0: e59d606c  ldr r6, [sp, #108]  ; 0x6c
380cfca4: e59d7070  ldr r7, [sp, #112]  ; 0x70
380cfca8: e1a08120  lsr r8, r0, #2
380cfcac: e1a091a1  lsr r9, r1, #3
380cfcb0: e1a0a122  lsr sl, r2, #2

After enable thumb:
  .syntax unified
  .thumb
or
  -Wa,-mthumb

.Lhobot_i8_i32_gemm_nn_m4_n8_neon:
38001100: e92d 4ff0   stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
38001104: ed2d 8b10   vpush {d8-d15}
38001108: 9c19        ldr r4, [sp, #100]  ; 0x64
3800110a: 9d1a        ldr r5, [sp, #104]  ; 0x68
3800110c: 9e1b        ldr r6, [sp, #108]  ; 0x6c
3800110e: 9f1c        ldr r7, [sp, #112]  ; 0x70
38001110: ea4f 0890   mov.w r8, r0, lsr #2
38001114: ea4f 09d1   mov.w r9, r1, lsr #3
38001118: ea4f 0a92   mov.w sl, r2, lsr #2

This commit will enable the thumb option of the assembly file by default,
so that when compiling the assembly file, the machine code and the system will be in a consistent state.

----------------------------------------------------------------
https://gcc.gnu.org/onlinedocs/gcc-4.5.2/gcc/ARM-Options.html

GCC Manual:
-mthumb
  Generate code for the Thumb instruction set. The default is to use the 32-bit ARM
  instruction set. This option automatically enables either 16-bit Thumb-1 or mixed 16/32-bit
  Thumb-2 instructions based on the -mcpu=name and -march=name options.

  ** This option is not passed to the assembler. **
  ** If you want to force assembler files to be interpreted as Thumb code,
     either add a `.thumb' directive to the source or pass the -mthumb option
     directly to the assembler by prefixing it with -Wa. **

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 22:14:34 +01:00
chao an
d321080351 arm/cortex-[a|r]: generating assemble code in ARM states by default
Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 22:14:34 +01:00
Peter van der Perk
90472785d3 S32K3XX QSPI No need to check TX FIFO buffer when MPU is correctly configured 2022-12-01 08:00:32 -05:00
Peter van der Perk
ec5030ebe6 S32K3XX RAM fixes MPU Dcache ECC 2022-12-01 08:00:32 -05:00
Masayuki Ishikawa
f7937d11a2 arch: arm64: Fix qemu_pl011_txint() in qemu_serial.c
Summary:
- I noticed that the nsh prompt can not be shown when disabling
  debug features. Actually, the prompt will be shown when a user
  input happens.
- This commit fixes this issue by adding uart_xmitchars() as
  other serial drivers do.

Impact:
- None

Testing:
- Tested with qemu-armv8a:netnsh on QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-12-01 19:38:03 +08:00
Masayuki Ishikawa
3b2685409a arch: risc-v: Fix nsec overflow in riscv_mtimer_current()
Summary:
- I noticed that mtimer stops around 30min after boot.
- Finally, I found that nesc overflows in riscv_mtimer_current().
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with rv-virt:nsh on QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-12-01 19:33:39 +08:00
chao an
12b0fa9ec3 arm/sama5: fix recursive dependency
arch/arm/src/sama5/Kconfig:819:error: recursive dependency detected!
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:819:	choice <choice> contains symbol SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824:	symbol SAMA5_FLEXCOM0_USART is part of choice SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824:	symbol SAMA5_FLEXCOM0_USART is part of choice <choice>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-12-01 09:45:09 +08:00
TimJTi
a634da9a30 Fix SAMA5D2 ADC and TSD problems
SAMA5Dx ADC and TSD fixes

Ensures ADC and TSD work together. TSD now works on SAMA5D2 and should be OK, still, for other SAMA5D familiy members

Fix CI error

checkpatch error

Update arch/arm/src/sama5/sam_tsd.h

Squash commits to arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Update arch/arm/src/sama5/hardware/sam_adc.h

Squash commits to arch/arm/src/sama5/sam_tsd.c

Update arch/arm/src/sama5/sam_tsd.c

Update arch/arm/src/sama5/sam_tsd.c

Update arch/arm/src/sama5/sam_tsd.c

Update sam_tsd.c

Fixes after feedback from PR and additional testing

Update sam_tc.c

checkpatch.sh error was missed when fixing someone else's error...

feedback corrections missed

Co-Authored-By: Xiang Xiao <xiaoxiang781216@gmail.com>
Co-Authored-By: Petro Karashchenko <petro.karashchenko@gmail.com>

squashed everything after 248072e02C
2022-12-01 01:51:12 +08:00
TimJTi
57a21fbe1a Fixes for SAMA5D2 Flexcom USART
squashed everything after 8f8b8f5e05

Update Kconfig

Update Kconfig
2022-11-30 23:14:17 +08:00
Masayuki Ishikawa
1eb3d01956 arch: arm64: Add qemu_virtio.c
Summary:
- This commit adds qemu_virtio.c

Impact:
- None

Testing:
- Tested with qemu-armv8a:netnsh (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-11-29 13:16:44 +08:00
Masayuki Ishikawa
b1ebca68f1 arch: arm64: Remove arm64_netinitialize() from qemu_boot.c
Summary:
- This commit removes arm64_netinitialize() from qemu_boot.c

Impact:
- None

Testing:
- Tested with QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-11-29 13:16:44 +08:00
Masayuki Ishikawa
8053931d31 arch: qemu-rv: Add qemu_rv_virtio.c
Summary:
- This commit adds qemu_rv_virtio.c

Impact:
- None

Testing
- Tested with rv-virt:netnsh (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-11-29 13:16:44 +08:00
ligd
b71f124b7b armv7-r: correct the wrong usage of ARMV7A_XX marco
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-11-28 12:21:32 +01:00
TimJTi
578f7783c6 Corrects PIO errors and omissions for SAMA5D2
Changes and corrections after review

Correct slow clock config
2022-11-28 16:37:44 +08:00
Xiang Xiao
6d30726a1b Remove the unnecessary "return;" at the end of function
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-27 22:23:50 +01:00
chao an
6fa60627eb net/devif/ip: build l2 header on the IP layer
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-27 12:13:45 +08:00
chao an
8850dee746 net/devif: move preprocess of txpoll into common code
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-27 12:11:12 +08:00
Nathan Hartman
03802dad13 NuttX graduated the Incubator; update repository links 2022-11-26 11:58:15 -08:00
zouboan
b45f113943 boards/sparc add initial support of s698pm-dkit board 2022-11-25 08:54:28 -03:00
Lee Lup Yuen
b31054b1e3 arch/arm64: Add support for PINE64 PinePhone
This PR adds support for PINE64 PinePhone and the Allwinner A64 SoC (based on Arm Cortex-A53).

With this PR, PinePhone boots successfully to nsh (via microSD Card) and runs console apps.

-   `arch/arm64/Kconfig`: Added Allwinner A64 SoC

-   `boards/Kconfig`: Added PINE64 PinePhone

-   `arch/arm64/src/a64/Kconfig`: New Kconfig for Allwinner A64 SoC

-   `boards/arm64/a64/pinephone/Kconfig`: New Kconfig for PINE64 PinePhone

-   `src/a64/a64_boot.c`, `a64_boot.h`: Boot functions for Allwinner A64

-   `src/a64/a64_lowputc.S`: Low-level console output

-   `src/a64/a64_serial.c`, `a64_serial.h`: A64 Serial Driver

-   `src/a64/chip.h`: A64 SoC Definitions

-   `include/a64/chip.h`: A64 Memory Map, Generic Interrupt Controller

-   `include/a64/irq.h`: A64 Interrupts

-   `src/a64/Make.defs`: Source files for A64

-   `configs/nsh/defconfig`: Board Configuration for `pinephone:nsh`

-   `src/pinephone_appinit.c`: Init PinePhone

-   `src/pinephone_boardinit.c`: Init PinePhone

-   `src/pinephone_bringup.c`: Start PinePhone Drivers

-   `src/pinephone.h`: PinePhone Declarations

-   `include/board_memorymap.h`: PinePhone Memory Map

-   `scripts/dramboot.ld`: PinePhone Linker Script

-   `scripts/Make.defs`: Source files for PinePhone

-   `src/Makefile`: PinePhone Makefile

-   `platforms/arm/a64/boards/pinephone/index.rst`: Building and booting NuttX on PinePhone

-   `platforms/arm/a64/index.rst`: Overview of Allwinner A64

-   `introduction/supported_platforms.rst`: Added Allwinner A64

-   `introduction/detailed_support.rst`: Added Allwinner A64
2022-11-25 17:19:48 +08:00
Alan Carvalho de Assis
0e57e69b08 Add libc_stubs functions to get hmac_md5()
Co-author: Gustavo Nihei <gustavo.nihei@espressif.com>
Co-author: Lucas Vaz <lucas.vaz@espressif.com>
2022-11-25 10:26:37 +08:00
田昕
28739b8b8a libc/stream:Add mtd backend stream.
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-11-24 12:07:10 +08:00
Ville Juven
52228fd222 stm32f7: Fix compliation of stm32_flash.c (add stm32_waste.c)
/arch/arm/src/libarch.a(stm32_flash.o): in function `up_progmem_write':
/arch/arm/src/chip/stm32_flash.c:419: undefined reference to `stm32_waste'

Seems like the symbol definition + declaration were completely missing
2022-11-23 20:30:26 +08:00
Ville Juven
321b9ea732 stm32f7/stm32_bbsram.c: Fix build error due to changed include path
Use correct path to include mutex.h

Fixes:

chip/stm32_bbsram.c:42:10: fatal error: mutex.h: No such file or directory
   42 | #include <mutex.h>
      |          ^~~~~~~~~
2022-11-23 18:20:29 +08:00
Xiang Xiao
04f887b56d Fix Error: chip/stm32_eth.c:1892:7: error: variable 'i' set but not used
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-23 07:27:48 +01:00
Xiang Xiao
79d02c0e29 arch/sim: Unify the host soruce file naming
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-22 19:37:48 +01:00
Tiago Medicci Serrano
d3ffeb40a7 libc/machine/xtensa: make longjmp safe against context switch
In order to turn longjmp context-switch safe, it's necessary
to disable interrupts before modifying windowbase and windowstart.
Otherwise, after a context switch, windowstart and windowbase
would be different, leading to a wrongly set windowstart bit due to
longjmp writing it based on the windowbase before the context switch.
This corrupts the registers at the next window overflow reaching
that wrongly set bit.

*Background:*
This PR is related to an issue first observed on ESP-IDF
https://github.com/espressif/esp-idf/issues/5229 and it was, then,
checked on NuttX using a test application.

*The test application:*
To check if the problem affects ESP32, ESP32-S2 and ESP32-S3 on
NuttX, it was created an application based on:
https://en.cppreference.com/w/c/program/longjmp

The application creates 16 tasks (`#define NUMBER_OF_TASKS  16`)
that implements the following daemon:

```
static int setjmp_longjmp_daemon(int argc, char *argv[])
{
  for (int i = 0; i < NUMBER_OF_TASKS * 2; i++)
    {
      jmp_buf env;

      volatile int count = 0;
      if (setjmp(env) != UINT16_MAX)
        {
          foo(&env, ++count);
        }
    }

  sem_post(&g_sem);

  return EXIT_SUCCESS;
}
```

The main function also initializes a semaphore to avoid application
exiting before tasks return successfully:

```
  sem_init(&g_sem, 0, -NUMBER_OF_TASKS);
```

Finally, the round-robin interval was lowered to 1ms to raise the
chances of the longjmp being interrupted by a context switch
(`CONFIG_RR_INTERVAL=1).

This setup was able to reproduce the problem prior to this patch
being applied.
2022-11-22 19:34:44 +01:00
chao an
f23ec0f995 Revert "tools/ci/arm/llvm/clang: bump up LLVMEmbeddedToolchainForArm to release-15.0.2"
This reverts commit b4bab51e86.

Issue:
Builtin math symbols are missing on llvm 15.0.2(libm.a):
https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/issues/158

Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-22 07:43:02 -08:00
zhangyuan21
d8051ba979 nuttx/sched: merge up_block_task and up_unblock_task 2022-11-22 22:59:08 +08:00
zhangyuan21
a8fa51e6bf arch: rename arch special function name 2022-11-22 16:27:56 +08:00
chao an
fc65e6969d arm/llvm/clang: add support for LLVMEmbeddedToolchainForArm release-15.0.2
Upstream:
https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/tag/release-15.0.2

Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-22 08:56:20 +01:00
zhangyuan21
5c1b518314 nuttx/sched: move reprioritize process to public function 2022-11-22 15:29:00 +09:00
zhangyuan21
08f7152d9f nuttx/sched: remove nxsched_remove_readytorun from up_block_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
add the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
zhangyuan21
e54b602208 nuttx/sched: remove nxsched_remove_blocked from up_unblock_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
delete the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
chao an
624d69ee05 boards: enter/leave critical section should in pairs
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-22 08:19:24 +09:00
Tiago Medicci Serrano
d492a5b092 esp32s2/i2s: implement I2S receiver module
- Add ioctl method to enable allocating the apb buffer.
- Add RX methods to set data width, sample rate, channels and
for receiving data from the I2S peripheral.
- Update the i2schar defconfig to enable the I2S receiver.
- Add nxlooper defconfig to enable testing the RX interface.
- Add specific bindings on ESP32-S2  bringup to enable nxlooper
to work without the need of any specific codec.
2022-11-21 23:46:47 +08:00
Karel Kočí
f0321d6bae arch/arm/src/samv7: fix missing sam_pendsv
The commit d1a3f5e47f invalidly removed
`sam_pendsv` instead of `sam_busfault`.
2022-11-21 23:45:24 +08:00
Eero Nurkkala
6596f0e99a risc-v/mpfs: fix compile warning
After commit b7d2b38, the system suffers from -Warray-bounds warning with -Wall:

chip/mpfs_opensbi.c: In function 'mpfs_hart_to_scratch':
chip/mpfs_opensbi.c:251:26: warning: array subscript hartid is outside array bounds of 'sbi_scratch_holder_t[0]' {aka 'struct sbi_scratch_holder_s[]'} [-Warray-bounds]
  251 |   return (unsigned long)(&g_scratches[hartid].scratch);

Fix it by reverting back to what is was earlier. g_scratches shouldn't be in the bss
region that would be zeroed out.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-21 14:43:34 +01:00
flyingfish89
f420b4dce7 esp32c3:fix i2c bug of timout
Signed-off-by: flyingfish89 <2914061332@qq.com>
2022-11-21 12:02:21 +01:00
Xiang Xiao
ab31236905 Fix Error: chip/stm32_tim_lowerhalf.c:479:54: error: format specifies type 'unsigned long' but the argument has type 'uint32_t'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00
Xiang Xiao
ea171d6e5d Fix Error: chip/stm32_spi.c:571:23: error: unused function 'spi_getreg8'
and unused function 'spi_putreg8'

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00
Xiang Xiao
6386596731 Fix Error: chip/stm32_qencoder.c:989:46: error: format specifies type 'unsigned long' but the argument has type 'uint32_t' (aka 'unsigned int')
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00
Xiang Xiao
27629b74c9 Fix Error: chip/stm32_serial.c:1542:20: error: unused function 'up_serialmod'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00
Xiang Xiao
4e6568c29a Fix Error: chip/stm32l4_dfumode.c:45:20: error: unused function 'rcc_reset'
and unused function 'apb_reset'

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00
Xiang Xiao
4cc52f277b Fix Error: chip/stm32l4_pwr.c:50:20: error: unused function 'stm32l4_pwr_modifyreg'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00
Xiang Xiao
30a153d2a0 Fix chip/stm32l562xx_rcc.c:78:20: error: unused function 'rcc_reset'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00
Xiang Xiao
59a747ee36 Fix error: chip/stm32l5_pwr.c:50:20: error: unused function 'stm32l5_pwr_modifyreg'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-21 17:39:04 +08:00