Commit Graph

43422 Commits

Author SHA1 Message Date
Yuichi Nakamura
3a0cd56623 rp2040: support I2C_RESET 2021-11-07 03:43:22 -08:00
Yuichi Nakamura
c109262a7f rp2040: add rp2040_gpio_get_function_pin() 2021-11-07 03:43:22 -08:00
raiden00pl
f2405ccc57 boards/b-g431b-esc1: register Qenco index pin 2021-11-07 03:52:48 -06:00
raiden00pl
7b595ab73a arch/arm/stm32/stm32_qencoder: add support for Qenco index pin 2021-11-07 03:52:48 -06:00
raiden00pl
bf23abfbd5 drivers/qencoder: add an interface to configure the encoder index pin position 2021-11-07 03:52:48 -06:00
zhuyanlin
5a4140f020 arch:xtensa: add setjmp xtensa function
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-06 07:39:27 -05:00
zhuyanlin
cfcff5f570 libc:machine:xtensa:add xtensa libc implement
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-06 07:39:27 -05:00
zhuyanlin
580d17cc02 arch:xtensa: make xtensa_abi.h global include and usage
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-06 07:39:27 -05:00
David Sidrane
4b96c28ed4 stm32h7:Support SPI SPI_DELAY_CONTROL 2021-11-06 05:14:05 -05:00
David Sidrane
040a04241e drivers/spi:Define SPI_~CS~_DELAY_CONTROL to support other delays 2021-11-06 05:14:05 -05:00
Eero Nurkkala
f8832f7d86 mpfs: emmcsd: fix uninitialized value
cppcheck reports the following:

arch/risc-v/src/mpfs/mpfs_emmcsd.c:2375:22: error: Uninitialized variable: waitbits [uninitvar]
  while (!(status & (waitbits | MPFS_EMMCSD_SRS12_EINT))

The finding is positive and this patch initializes it to
zero properly.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-11-05 11:47:49 +01:00
YAMAMOTO Takashi
37141bb5e8 Refresh configs after the removal of NET_TCP_SPLIT 2021-11-04 13:32:57 -05:00
YAMAMOTO Takashi
ecd6a3572b net/tcp/Kconfig: Remove NET_TCP_SPLIT
While it's a neat idea, it doesn't work well in reality.

* Many of modern tcp stacks don't obey the "ack every other packet"
  rule these days. (Linux, macOS, ...)

* Even if a traditional TCP implementation is assumed, we can't
  predict/control which packets are acked reliably. For example,
  window updates can easily mess up our strategy.
2021-11-04 13:32:57 -05:00
YAMAMOTO Takashi
28d168e1b8 tcp_send_unbuffered.c: Fix nxstyle errors 2021-11-04 13:32:57 -05:00
YAMAMOTO Takashi
1550a525e9 tcp_send_unbuffered.c: unifdef -UCONFIG_NET_TCP_SPLIT 2021-11-04 13:32:57 -05:00
ligd
022c06766a socket_rpmsg: use ns_bound to send SYNC packet
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-11-04 13:29:51 -05:00
ligd
883d66b906 socket_rpmsg: fix save rp_name error when accept
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-11-04 13:29:51 -05:00
ligd
00ef4fca51 rpmgs_socket: set RPMSG_SOCKET_NAME_SIZE to 16 for handing prefix
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-11-04 13:29:51 -05:00
ligd
59ae421314 socket_rpmsg: support SOCK_SEQPACKET
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-11-04 13:29:51 -05:00
ligd
bb41af3935 rpmsg_socket: move rpmsg_send out of lock
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-11-04 13:29:51 -05:00
ligd
163109c80f openamp: notify the user when the remote address is received
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-11-04 13:29:51 -05:00
David Sidrane
c077361a8a imxrt:usb Fix EP type allocation 2021-11-04 13:23:25 -05:00
David Sidrane
95f7f4b9e6 imxrt:usb DMA cache aligned Buffers for Endpoints 2021-11-04 13:23:25 -05:00
David Sidrane
bd2bc1e351 imxrt:usbdev Clean up cache maintainence 2021-11-04 13:23:25 -05:00
David Sidrane
c3d10ad0aa imxrt:usbdev formatting cleanup 2021-11-04 13:23:25 -05:00
David Sidrane
532635129c imxrt:usdhc add proper support for dcache (wb) 2021-11-04 13:23:25 -05:00
David Sidrane
5022244339 imxrt mpuinit:Set Data and Code Type to Normal
Strongly-Ordered requires aligned access unless
  caching is enabled.

  Normal memory
  Accesses to normal memory region are idempotent...
  - unaligned accesses can be supported
2021-11-04 13:23:25 -05:00
David Sidrane
34c3efcb91 imxrt mpuinit:Remove duplicate entry for ITCM (0x0) 2021-11-04 13:23:25 -05:00
David Sidrane
08d0434bad imxrt:mpu init handle dcache setting in MPU config
With CONFIG_ARMV7M_DCACHE the cache maintenance operation
   are not present. Or if CONFIG_ARMV7M_DCACHE_WRITETHROUGH
   is on then buffering operations are no-ops.

   This change enables MPU_RASR_C and MPU_RASR_B if
   CONFIG_ARMV7M_DCACHE is only set.

   if CONFIG_ARMV7M_DCACHE_WRITETHROUGH is set then only
   MPU_RASR_C is enabled.

   N.B When caching is disalbed unaligned access may cause hard faults
   so add -mno-unaligned-access

   It is always safe to enable Buffering in FLASH to achive unaligned
   access leniency, as it is not written to.
2021-11-04 13:23:25 -05:00
Jukka Laitinen
7e9e8a817d libs/libc/wqueue/work_usrthread.c: Correct time calculation in work_process
This fixes busylooping in work_usrthread, due to incorrect time spec given to sem_timedwait

_SEM_TIMEDWAIT works on absolute time stamps, using CLOCK_REALTIME

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-11-04 13:19:01 -05:00
Jukka Laitinen
c79d2067c7 Move timespec calculations from sched into libc/sched
Allow using these functions also outside sched, where systick
related calculations are performed

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-11-04 13:19:01 -05:00
raiden00pl
2d125d33d3 boards/nucleo-f302r8: disable NSH commands for FOC configs to save FLASH 2021-11-04 13:05:31 -05:00
Alan C. Assis
b248dd0d3a Documentation: Fix openocd command instruction
A user reported me an issue while following our documentation
then looking his command line error I noticed the openocd stlink
interface was wrong: st-link-v2.cfg -> stlink-v2.cfg
2021-11-04 15:09:34 +01:00
ChenWen
440787c0c1 risc-v/esp32c3: Fix Wi-Fi & BLE coexist issue
1. Wi-Fi and BLE use common PHY functions.
  2. Fix Wi-Fi & BLE coexist adapter error.
  3. Update esp-wireless-drivers-3rdparty, provide coexist protection for connection.
2021-11-04 11:02:05 -03:00
ChenWen
65d7f4bfb3 riscv/esp32c3: Support more country codes 2021-11-04 11:02:05 -03:00
ChenWen
4fc2f6e28c riscv/esp32c3: Support debug log configuration for Wi-Fi library 2021-11-04 11:02:05 -03:00
ChenWen
02968cc124 risc-v/esp32c3: Improve Wi-Fi connection success rate 2021-11-04 11:02:05 -03:00
ChenWen
222ec556d5 riscv/esp32c3: Fix some Wi-Fi issues
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
  2. Support Wi-Fi 12/13 channel active scanning by default.
  3. Update Wi-Fi driver code to fix issue of failure to send pkt.
  4. Replace software random with hardware random
  5. Fix Wi-Fi mode start error
2021-11-04 11:02:05 -03:00
chenwen
33031a2813 riscv/esp32c3: Fix the issue of Wi-Fi automatic disconnection 2021-11-04 11:02:05 -03:00
chenwen
afbad5ca9d riscv/esp32c3: Clear station configuration when connection fails or disconnect 2021-11-04 11:02:05 -03:00
Eero Nurkkala
8e43f39141 mpfs: cache: provide L1/L2 cache enablers
E51 may configure the L1 and L2 caches. Once configured,
no reconfiguration is possible after hardware reset is
issued.

L2 is 16-way set associative with write-back policy. The
size 2 MB, from which 1 MB is utilized with the values
provided here. That's a total of 8 ways. The rest of the
L2 is left out for the bootloader usage.

mpfs_enable_cache() first checks the bootloader usage
doesn't overlap with the cache itself, thus providing a
set of functional values.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-11-04 11:00:55 -03:00
Alexander Lunev
60de445ab3 stm32h7 sdmmc: do not enable power saving configuration bit (in SD 4-bit mode) because
the SDIO clock is not enabled when the bus goes to the idle state, that, in turn, breaks
IRQ delivering mechanism over DAT[1]/IRQ SDIO line to the host.
2021-11-03 22:50:14 -05:00
Alexander Lunev
02e2b33c1c bcm43xxx: corrected SDIO_CCCR_HIGHSPEED_SHS bit handling 2021-11-03 01:12:53 -05:00
Xiang Xiao
c52a099197 sim: Add more config to asan/kasan for testing
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-11-02 21:02:43 +01:00
Xiang Xiao
3e967f784e sim: Split SIM_SANITIZE to SIM_ASAN and SIM_UBSAN
align the naming style with MM_ASAN

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-11-02 21:02:43 +01:00
mage1
c82a676630 sim: fix sim runtime err under sanitize check mode.
since gcc sanitize can not stub proper code in nuttx kernel code.
2021-11-02 21:02:43 +01:00
Cocoacrumbs
2d4906ab9b Small clarification in the making-changes.rst documentation. 2021-11-02 20:22:18 +01:00
raiden00pl
1c28126670 boards/b-g431b-esc1: add Hall and Qenco support 2021-11-02 11:54:08 -05:00
Xiang Xiao
df877a8a91 boards/sim: Add new config for KASan
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-11-02 13:32:47 -03:00
chenwei23
39cdd99d77 mm: Support the kernel address sanitizer
Signed-off-by: chenwei23 <chenwei23@xiaomi.com>
2021-11-02 13:32:47 -03:00