Gustavo Henrique Nihei
211f899b62
risc-v/esp32c3: Refactor and reorganize Partition Table related configs
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
793266d39e
espressif: Fix spacing style in Kconfig files
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
4ff754827c
espressif: Fix prompt string of Wi-Fi FS mount point configs
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
a1af605973
espressif: Fix references to Wi-Fi according to Wi-Fi Alliance
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Eero Nurkkala
e57f3f7a3a
mpfs: emmcsd: provide proper internal emmc settings
...
So far the SD-card functionality has been tested with
the driver. Now, also the internal eMMC has been tested
working with this patch. This patch applies IOMUX and
clock settings that have been tested working with the
internal eMMC in the Polarfire Icicle kit.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:41:08 -05:00
Eero Nurkkala
c34b9620db
mpfs: clockconfig: add clock initialiation sequence
...
Add clock initialization sequence especially for systems
containing no bootloader.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
bc72ccdf6a
mpfs: Kconfig/Make: add DDR support flag
...
This adds the proper flag for introducing the DDR
support. Also call the mpfs_ddr_init() at the
proper location.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
3b330089d5
mpfs: ddr: add DDR training
...
This adds DDR training. The training has a small chance of failing,
and then the training is restarted.
DDR training cannot be done meaningfully while the software is
in DDR. If the system is intended to run from eNVM, like a
bootloader, the linker script should be tuned to utilize the envm
region as follows:
envm (rx) : ORIGIN = 0x20220100, LENGTH = 128K - 256
l2lim (rwx) : ORIGIN = 0x08000000, LENGTH = 1024k
256 bytes are reserved for the system; The fixed block may be
installed from the 'hart-software-services' -repository:
https://github.com/polarfire-soc/hart-software-services.git
For example, the 256-byte image: hss-envm-wrapper-bm1-dummySbic.bin
may be prepended on the nuttx bootloader image in the following
manner:
cat hss-envm-wrapper-bm1-dummySbic.bin > nuttx_bootloader.bin
cat nuttx.bin >> nuttx_bootloader.bin
riscv64-unknown-elf-objcopy -I binary -O ihex --change-section-lma
*+0x20220000 nuttx_bootloader.bin flashable_image.hex
This provides an image 'flashable_image.hex' that may be flashed on
the eNVM region via Microsemi Libero tool.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
c5b11f42b6
mpfs_head.S: Support for booting on different harts and from eNVM
...
- Fix the FPU enabling code
- If booting from eNVM, all harts start booting. With CONFIG_MPFS_BOOTLOADER,
one can allow just one hart booting and rest are stuck in wfi.
- Check that mtvec is actually updated before continuing the boot
- Create 5 IRQ stacks, one for each hart
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
37761c293d
mpfs_head.S: Fixes for booting on different harts
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- Jump to mpfs_start with mhartid in a0 as the comment says
- Don't invalidate mmu tlb on e51 (it doesn't have mmu)
- Fix FPU initialization flags on e54 (it fires IRQ5 and crashes)
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
e5843db282
mpfs: Add configuration flags to configure NuttX booting on single hart
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The bootloader hart also configures the needed clocks and peripherals.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
d909b0f635
mpfs: hardware/memorymap: add more base addresses
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Add a number of missing base addresses.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Abdelatif Guettouche
018aa8eb8d
esp32c3_serial.c: Remove the stub implementations of the early serial
...
functions as they are only called when the configuration is enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-20 10:22:10 -03:00
Abdelatif Guettouche
c83c1071cc
esp32c3_bignum.c & esp32c3_sha.c: Fix some trivial nxstyle complaints.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
e424241d09
arch/risc-v/esp32c3: Remove the bignum test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
91cb9dafaf
arch/risc-v/esp32c3: Remove the RSA test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
652d77efd2
arch/risc-v/esp32c3: Remove the SHA test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
5d1c01aea7
arch/risc-v/esp32c3: Remove the AES test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
7549de49b4
arch/*_cpupause:Allow a spin before taking the g_cpu_wait spinlock.
...
If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request. In this case the
DEBUGASSERT will trigger. We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-17 21:10:23 +09:00
Gustavo Henrique Nihei
99ac065d0a
risc-v/esp32c3: Provide SPI Flash parameters to MCUboot build
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Also unify bootloader config creation to reduce duplication.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-15 23:55:10 -07:00
Gustavo Henrique Nihei
cc78541966
risc-v/esp32c3: Add esp-nuttx-bootloader folder to gitignore list
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-15 23:55:10 -07:00
Gustavo Henrique Nihei
ae25ebce4c
risc-v/esp32c3: Fix wrong arch in the path to chip folder
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-15 23:55:10 -07:00
jsun
c58fddb915
Open ble controller adaptation code
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N/A
Signed-off-by: jsun <jsun@bouffalolab.com>
2021-10-08 02:30:27 -07:00
Gustavo Henrique Nihei
47e804b167
risc-v/esp32c3: Make BLE adapter code compliant to nxstyle
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-05 08:45:40 -03:00
Abdelatif Guettouche
d22b4ec539
espxx_rng.c: Add "/" at the beginning of paths for consistency.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-30 13:50:25 -03:00
Abdelatif Guettouche
c811cefa2d
esp32c3_rng.c: Remove unused functions.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-30 13:50:25 -03:00
Sara Souza
33f2d46bff
risc-v/esp32-c3/rttimer: Disable alarm before setting a new value and enabling it
2021-09-28 21:02:57 -03:00
Alin Jerpelea
15a37c5a5a
arch: Omni Hoverboards: update licenses to Apache
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Gregory Nutt has submitted the SGA
Omni Hoverboards has submitted the SGA
David Sidrane has submitted the ICLA
Mateusz Szafoni has submitted the ICLA
Sebastien Lorquet has submitted the ICLA
Paul Alexander Patience has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-28 04:37:38 -07:00
Gustavo Henrique Nihei
20341e6f17
risc-v/esp32c3: Enable support for "make bootloader" target
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This enables the provisioning of the bootloader binaries through the
build system.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-27 18:22:29 -07:00
Gustavo Henrique Nihei
3c63cb522c
risc-v/esp32c3: Enable booting from MCUboot bootloader
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-27 18:22:29 -07:00
Sara Souza
9c2c5d3919
risc-v/esp32-c3: fix pid initiatialization on esp32c3_rt_timer.c
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pid variable was initialized to -EINVAL to prevent rt_timer_deinit
from delete an invalid kthread. But priv->pid was being overwritten in the
rt_timer_init, so in case of failure to create a kthread, it would
call rt_timer_deinit with a non expected initialization value.
2021-09-23 19:01:27 -07:00
Sara Souza
d0e7d7b77f
risc-v/esp32-c3: Remove _s of non static variables from esp32c3_rt_timer.c
2021-09-23 19:01:27 -07:00
Gustavo Henrique Nihei
e651ef0969
arch/risc-v: Remove CODE qualifier for RISC-V-specific files
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-22 08:16:01 -03:00
Gustavo Henrique Nihei
06f4ee850a
arch/risc-v: Remove FAR qualifier for RISC-V-specific files
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-22 08:16:01 -03:00
Gustavo Henrique Nihei
e9c17c9332
risc-v/rv32m1: Fix wrong position for ++ operator on serial driver
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-22 08:16:01 -03:00
Sara Souza
fc12d6888b
risc-v/esp32-c3: Group static variables into a struct and prevent an unitialized thread to be deleted
2021-09-21 15:45:59 +02:00
Eero Nurkkala
812f504c16
mpfs: emmcsd: add Kconfig/Makefile and board files
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Add necessary Kconfig, Make.defs, Makefile and board
file changes.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-09-18 12:18:09 -03:00
Eero Nurkkala
772432e7c3
mpfs: add emmcsd driver
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This adds the emmcsd driver for the Polarfire Icicle kit.
The driver has been tested with several SD-cards, such as:
- Kingston 32 GB SDS2 Canvas Select Plus
- Kingston MicroSD Canvas Select Plus
- Sandisk Extreme PRO 32 GB
- Transcend 8 GB MicroSD
The internal eMMC hasn't been tested comprehensively.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-09-18 12:18:09 -03:00
Xiang Xiao
71c61b11d9
arch/riscv: Rename riscv_puts to up_puts
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since it's a common API defined in include/nuttx/arch.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-18 07:33:44 -03:00
jsun
f4b6bb281c
Update bl602 MTU_SIZE and TX_BUF_SIZE
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N/A
Signed-off-by: jsun <jsun@bouffalolab.com>
2021-09-17 22:11:30 -05:00
jsun
d489392d08
Add bl602 os adapter layer
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N/A
Signed-off-by: jsun <jsun@bouffalolab.com>
2021-09-17 22:11:30 -05:00
Gustavo Henrique Nihei
52cea558af
risc-v/esp32c3: Make the semaphore timeout on I2C configurable
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-16 14:07:26 -03:00
Peter Bee
2a8b076b38
risc-v/esp32c3: fix pwm driver bug
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Wrong offset sign and pwm multichan fix
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2021-09-16 08:38:49 -03:00
Jukka Laitinen
3654db3517
mpfs: Modify IRQ handling to support also HART0 on PF
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Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-09-11 23:33:01 +08:00
Janne Rosberg
8b560e7894
mpfs/i2c: fix bus initialize for i2c1
2021-09-11 23:33:01 +08:00
Janne Rosberg
1e3919e55a
mpfs/corepwm: remove wrong header include
2021-09-11 23:33:01 +08:00
Janne Rosberg
7db3456824
risc-v/mpfs: serial: add termios support and init device clocks
2021-09-11 23:33:01 +08:00
Janne Rosberg
aa057e25f2
mpfs/i2c: adapt to sysreg define changes
2021-09-11 23:33:01 +08:00
Janne Rosberg
dc54ba924e
mpfs/spi: adapt to sysreg define changes
2021-09-11 23:33:01 +08:00
Janne Rosberg
3e6b19dfc5
risc-v/mpfs: add more sysreg defines and fix clock and reset defines
2021-09-11 23:33:01 +08:00
Sara Souza
acf18bd82d
risc-v/esp32-c3: refactor the Wi-Fi board logic.
...
This commit moves the Wi-Fi initialization to
Wi-Fi specific file and to spiflash initialization.
It also reserves one partition for Wi-Fi use and for general use,
and makes it possible to me mounted by several FS.
2021-09-09 20:14:04 +08:00
Sara Souza
11068fad1b
risc-v/esp32-c3: Enable the allocation of multiple MTD SPI Flash partitions
2021-09-09 20:14:04 +08:00
Jukka Laitinen
1b75b5d5aa
Fix compilation of arm protected build
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Correct typos in include/nuttx/arch.h and suppress
"'noreturn' function does return" warning coming from arm_pthread_exit.c
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-09-07 00:31:47 +08:00
Alin Jerpelea
da92258333
arch: k210: remove extra license information
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the Apache license header uses a standard format and the extra information
should be removed.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-31 08:20:18 +09:00
Xiang Xiao
b0c782255c
libxx: Change CXX_LIBSUPCXX to LIBSUPCXX
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align with other Kconfig(e.g. LIBCXXABI, LIBCXX, UCLIBCXX)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-28 17:14:48 -03:00
zhuyanlin
cd18d1f050
arch:riscv: remove arch atomic, use libc atomic when need
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It is more common for implement in libc/machine
Change-Id: I3da6c3db64adb78c05ddb26d3956817ac6ada93e
2021-08-28 13:17:30 -03:00
Abdelatif Guettouche
5ff703d5d0
arch/*_testset: Fix few typos.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-25 00:20:20 +08:00
chao.an
68d6dbf86f
arch/riscv/assert: enhance the assert dump
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enhance the assert dump to show the all tasks info including backtrace and registers
[ 7.617000] [ EMERG] up_assert: Assertion failed at file:rv32im/riscv_exception.c line: 94 task: init
[ 7.617000] [ EMERG] riscv_dumpstate: Call Trace:
[ 7.617000] [ INFO] [BackTrace| 3|0]: 0x4202001e 0x42007cb4 0x42005782 0x42000fe2 0x403801e2 0x403800e2 0x4200bdd0 0x42009894
[ 7.617000] [ INFO] [BackTrace| 3|1]: 0x4200a62e 0x42008e8a 0x4200841e 0x42008320 0x42005ad0 0x42001a56
[ 7.617000] [ EMERG] riscv_registerdump: EPC:4200bdd0
[ 7.617000] [ EMERG] riscv_registerdump: A0:ffffffff A1:00000010 A2:3fc9a95c A3:00000031 A4:00000009 A5:00000002 A6:00000001 A7:00000074
...
...
[ 7.617000] [ EMERG] riscv_showtasks: Tasks status:
[ 7.617000] [ EMERG] riscv_taskdump: Idle Task: PID=0
[ 7.617000] [ EMERG] riscv_taskdump: Stack Used=596 of 976
[ 7.617000] [ INFO] [BackTrace| 0|0]: 0x4200787e 0x3fc94ff0
[ 7.617000] [ EMERG] riscv_registerdump: EPC:4200787e
[ 7.617000] [ EMERG] riscv_registerdump: A0:00000032 A1:3c1008fa A2:3fc94fa8 A3:00000000 A4:00000101 A5:00000032 A6:00000001 A7:00000074
...
[ 7.617000] [ EMERG] riscv_taskdump:
[ 7.617000] [ EMERG] riscv_taskdump: hpwork: PID=1
[ 7.617000] [ EMERG] riscv_taskdump: Stack Used=292 of 2016
[ 7.617000] [ INFO] [BackTrace| 1|0]: 0x420082a6 0x4200328c 0x42001ab4 0x42001a42
[ 7.617000] [ EMERG] riscv_registerdump: EPC:420082a6
[ 7.617000] [ EMERG] riscv_registerdump: A0:00000002 A1:3fc98718 A2:3fc8307c A3:00000002 A4:00000000 A5:00000000 A6:00000000 A7:00000000
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-21 14:58:21 +08:00
chao.an
333191becd
riscv/backtrace: add up_backtrace support
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-21 14:56:34 +08:00
Xiang Xiao
af72376773
fs: Remove magic field from partition_info_s
...
since it is wrong and impossible to return file
system magic number from the block or mtd layer.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-20 09:19:52 -03:00
Antti Vähälummukka
6eb73ced51
arch/risc-v/src/mpfs: Add CorePWM driver
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Add a driver for CorePWM block, which can be instantiated on PolarFire SOC FPGA
This supports 2 CorePWM blocks on the FPGA. One CorePWM block provides 8 PWM output signals
2021-08-20 08:56:30 -03:00
chao.an
e37d8da074
riscv/common: add CURRENT_REGS declare in RV32
...
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-18 04:40:38 -07:00
Xiang Xiao
71269811ca
mtd: Implement BIOC_PARTINFO for all drivers
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-16 10:08:26 -03:00
Virus.V
5a1de89370
riscv/bl602: Fix that AP cannot be start when STA have been started.
2021-08-16 02:06:59 -07:00
Abdelatif Guettouche
5b350f3a0f
arch/*_reprioritizertr.c: Fix typos in comments.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-14 11:19:34 -07:00
Xiang Xiao
d1687418db
mtd: Remove the empty MTDIOC_XIPBASE implmentation
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-11 09:50:51 -03:00
Abdelatif Guettouche
054e284785
*_cpustart.c: Fix typos in function description.
...
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-11 11:06:27 +09:00
Sara Souza
af6c311fd1
risc-v/esp32-c3: Complete the support for RWDT
2021-08-10 11:17:15 -03:00
Xiang Xiao
5d1a444812
Replace __attribute__ ((unused)) with unused_code
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Xiang Xiao
69df58c2e8
Replace __attribute__((no_instrument_function)) with noinstrument_function;
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Xiang Xiao
007adc7736
Replace all __attribute__((section(x)) with locate_data(x)
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Xiang Xiao
b3f9ffbe72
Replace all __attribute__((aligned(x)) with aligned_data(x)
...
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Sara Souza
cdbfacc1fe
risc-v/esp32-c3: Adds systimer support and make rt_timer rely on it
2021-07-27 20:43:34 -07:00
Michal Lenc
9fc806984c
adc: add ioctl command to get the number of configured channels
...
Number of configured ADC channels is currently only defined in board
level section, typically in xxx_adc.c file. This commit introduces
ioctl command ANIOC_GET_NCHANNELS that returns the number of configured
channels which is determined by the driver code. The change can allow the
applications to be more flexible when it comes to multiple ADC devices
with different number of configured channels.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-07-26 19:45:47 -07:00
Sara Souza
0794991a07
risc-v/esp32-c3: Disable wdt in the start function.
2021-07-26 19:44:30 -07:00
Nathan Hartman
b92aeb8209
Fix various typos
...
arch/arm/src/eoss3/eoss3_serial.c:
arch/arm/src/imxrt/hardware/imxrt_flexcan.h:
arch/arm/src/imxrt/imxrt_flexcan.c:
arch/arm/src/imxrt/imxrt_flexpwm.c:
arch/arm/src/imxrt/imxrt_lpi2c.c:
arch/arm/src/kinetis/kinetis_flexcan.c:
arch/arm/src/nrf52/hardware/nrf52_rtc.h:
arch/arm/src/nrf52/nrf52_clockconfig.c:
arch/arm/src/nrf52/nrf52_radio.c:
arch/arm/src/nrf52/nrf52_tim.c:
arch/arm/src/rtl8720c/amebaz_depend.c:
arch/arm/src/s32k1xx/Kconfig:
arch/arm/src/s32k1xx/s32k1xx_flexcan.c:
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c:
arch/arm/src/sama5/hardware/sam_sdmmc.h:
arch/arm/src/sama5/sam_gmac.c:
arch/arm/src/samd5e5/sam_wdt.c:
arch/avr/src/avr32/up_exceptions.S:
arch/avr/src/avr32/up_fullcontextrestore.S:
arch/renesas/src/rx65n/rx65n_dtc.c:
arch/renesas/src/rx65n/rx65n_usbhost.c:
arch/risc-v/src/esp32c3/esp32c3_tickless.c:
boards/arm/stm32h7/stm32h747i-disco/include/board.h:
include/nuttx/lcd/ili9225.h:
libs/libc/stdio/lib_fgetpos.c:
libs/libc/stdio/lib_fseek.c:
libs/libc/stdio/lib_fsetpos.c:
* Fix typos.
2021-07-25 18:36:53 -07:00
jordi
f3af6edf93
Kconfig: add quotes in source to clean warnings from setconfig
...
To avoid the setconfig warning "style: quotes recommended around xxx in
source xxx"
2021-07-23 02:32:19 -07:00
Abdelatif Guettouche
e85b119363
arch/: Clean what was made during context
in distclean.
...
Cleaning during `clean_context` had the issue of remaking everything
when `menuconfig` was issued. That's because `menuconfig` has a
`clean_context` on its way.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-07-21 16:52:36 -03:00
Gustavo Henrique Nihei
c05feda208
risc-v/esp32c3: Implement MTDIOC_ERASESTATE for SPI Flash driver
...
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-17 09:00:41 -07:00
Xiang Xiao
98b5724b59
arch: Fix rtcb can't found error
...
use the same condition check in declaration and reference
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
2021-07-16 12:48:09 -03:00
ChenWen
2abb75fee7
risc-v/esp32c3: Fix some ESP32-C3 Wi-Fi driver issues
2021-07-15 23:20:29 -07:00
Virus.V
063e1d6b74
risc-v/bl602: update wifi firmware and some fixup.
...
1. Added check for repeated connection wifi operations.
2. Invoke the carrier on/off operation in the wrong place.
3. The RTC initialization time is incorrect.
4. Reserve 32K I-Cache space in the linker script.
5. Increase the size of the wifi firmware receiving buffer.
Signed-off-by: Virus.V <virusv@live.com>
2021-07-13 05:12:12 -07:00
Sara Souza
48f2b10ee3
risc-v/esp32-c3: Use systimer 0 to RTOS TICK
2021-07-12 21:03:27 -07:00
Dong Heng
f5eaf82c93
risc-v/esp32c3: Use onexit to free thread private semaphore
2021-07-12 09:38:21 -03:00
Xiang Xiao
76cdd5c329
mm: Remove mm_heap_impl_s struct
...
it's more simple to make mm_heap_s opaque outside of mm
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
2021-07-07 04:25:15 -07:00
Dong Heng
475becac37
risc-v/esp32c3: Add board_ioctl and board_uniqueid
2021-07-05 23:12:17 -05:00
Nathan Hartman
ce20211357
Fix various typos in comments and documentation
...
Fix typos in these files:
* Documentation/components/drivers/character/foc.rst
* Documentation/guides/cpp_cmake.rst
* Kconfig
* arch/arm/src/imxrt/imxrt_lpspi.c
* arch/arm/src/kinetis/kinetis_spi.c
* arch/arm/src/kl/kl_spi.c
* arch/arm/src/lpc31xx/lpc31_spi.c
* arch/arm/src/nrf52/nrf52_radio.h
* arch/arm/src/s32k1xx/s32k1xx_lpspi.c
* arch/arm/src/stm32/Kconfig
* arch/arm/src/stm32/stm32_adc.c
* arch/arm/src/stm32/stm32_foc.c
* arch/arm/src/stm32/stm32_foc.h
* arch/arm/src/stm32/stm32_pwm.c
* arch/arm/src/stm32/stm32_spi.c
* arch/arm/src/stm32f0l0g0/stm32_spi.c
* arch/arm/src/stm32f7/Kconfig
* arch/arm/src/stm32f7/stm32_spi.c
* arch/arm/src/stm32h7/Kconfig
* arch/arm/src/stm32h7/stm32_allocateheap.c
* arch/arm/src/stm32h7/stm32_fmc.c
* arch/arm/src/stm32h7/stm32_fmc.h
* arch/arm/src/stm32h7/stm32_pwm.c
* arch/arm/src/stm32h7/stm32_qspi.c
* arch/arm/src/stm32h7/stm32_spi.c
* arch/arm/src/stm32l4/stm32l4_pwm.c
* arch/arm/src/stm32l4/stm32l4_spi.c
* arch/arm/src/stm32l5/Kconfig
* arch/arm/src/stm32l5/stm32l5_spi.c
* arch/renesas/src/rx65n/rx65n_dtc.c
* arch/renesas/src/rx65n/rx65n_usbdev.c
* arch/risc-v/src/rv32m1/rv32m1_serial.c
* boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
* boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
* boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
* boards/arm/stm32h7/nucleo-h743zi2/README.txt
* boards/risc-v/rv32m1/rv32m1-vega/README.txt
* boards/sim/sim/sim/scripts/Make.defs
* drivers/1wire/1wire.c
* drivers/1wire/1wire_internal.h
* drivers/lcd/Kconfig
* drivers/syslog/ramlog.c
* fs/fat/Kconfig
* libs/libc/debug/Kconfig
* libs/libc/machine/Kconfig
* libs/libc/stdio/lib_libvsprintf.c
* libs/libc/stdlib/lib_div.c
* libs/libc/stdlib/lib_ldiv.c
* libs/libc/stdlib/lib_lldiv.c
* libs/libdsp/lib_observer.c
2021-07-04 11:23:26 -05:00
Xiang Xiao
b1f711f790
mm: Move procfs_register_meminfo into common place
...
to avoid the code duplication and ensure the consistent behaviour
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-03 09:39:32 -07:00
Dong Heng
4f2df0311d
risc-v/esp32c3: Fix some BLE driver issues
...
1. remove SMP functions because ESP32-C3 is singal core
2. disable phy_printf in ble adapter when enable Wi-Fi
3. fix BLE character device macro
2021-07-03 07:28:30 -05:00
Virus.V
5f67d65e9e
risc-v/bl602: add efuse driver
...
Signed-off-by: Virus.V <virusv@live.com>
2021-07-02 13:17:39 -05:00
chenwen
31a6da2343
risc-v/esp32c3: Notifies networking layer whether the carrier is available
2021-06-30 23:09:34 -05:00
Virus.V
84100128b2
risc-v/bl602: update wifi firmware version
...
Signed-off-by: Virus.V <virusv@live.com>
2021-06-30 01:08:10 -05:00
xiewenxiang
5fd3eca9c9
riscv/esp32c3: Support BLE sleep mode
2021-06-28 23:14:30 -05:00
xiewenxiang
145d917587
riscv/esp32c3: Add Wi-Fi and BLE coexist
2021-06-28 23:14:30 -05:00
xiewenxiang
8b96edc3a5
riscv/esp32c3: Add esp32c3 BLE driver
2021-06-28 23:14:30 -05:00
Virus.V
8452c571ec
risc-v/bl602: BLE firmware adapts to the new framework
...
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Virus.V
cd50650583
risc-v/bl602: Support AP and STA as independent network interface device
...
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Abdelatif Guettouche
add18b9592
arch/risc-v/esp32c3: Remove the up_textheap_init function since it's not
...
needed anymore.
Implement the up_extraheaps_init function to initialize all separate
heaps.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
60da4317b9
arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
...
consistency.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
bdbc9ef04f
arch/risc-v/esp32c3_rtc_heap.c: Correct the name of the procfs info
...
variable.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00