Commit Graph

14785 Commits

Author SHA1 Message Date
ligd
059497d1d1 armv7-a/r: NON-primary core should invalidate dacache level1
NON-primary cpu will invalidate cpu0's cache L2, that will caused cpu0's data mismatch, and then system crash

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-27 14:41:39 +08:00
David Sidrane
a1ebd499ea stm32h7:SDMMC fix unaligned access for buffers not on 32 bit boundaries
The IDMA needs to have 32 bit word alignment, in fact it will
   AND off the lower 2 bits of the value stored in IDMABASE0R.
   This bug was masked by CONFIG_ARMV7M_DCACHE causing proper word alignment
   and also FAT_DMAMEMORY being aligned.

   This commit extends the unaligned logic (used for dcache) to take into account
   the need for a buffer copy when the buffer is ot 32 bit word.

    It leverages the fact that when CONFIG_ARMV7M_DCACHE is not defined the up_xxxxx_dcache are nops.
2022-09-27 09:43:29 +08:00
Rajvinder Kaur
2e1c522a79 stm32h7\stm32_fdcan_sock: reserve space for timeval struct in the intermediate storage of tx and rx CAN frames when timestamp is enabled 2022-09-26 20:05:44 -03:00
chao an
aa51629bd2 arm/armv7-r: redefine the linker symbols as armlink style
Fix build break:

Error: L6218E: Undefined symbol _sbss (referred from arm_head.o).
Error: L6218E: Undefined symbol _ebss (referred from arm_head.o).
Error: L6218E: Undefined symbol _eronly (referred from arm_head.o).
Error: L6218E: Undefined symbol _sdata (referred from arm_head.o).
Error: L6218E: Undefined symbol _edata (referred from arm_head.o).

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 19:04:25 +02:00
chao an
a2cd1b0db3 arm/armlink: add support of link time optimization(lto)
Optimization goal(Code size)

Smaller                           GCC(-Os) GCC(-flto -Os) CLANG(-flto -Oz) ARMCLANG(-flto -Oz/-Omin)
lm3s6965-ek/qemu-flat(Cortex-M3)   208662      193893           199525             195464
                                               -7.07%           -4.37%             -6.32%
sabre-6quad/smp(Cortex-A9)         131360      122500            N/A               123988
                                               -6.74%            N/A               -5.61%

Faster performance                GCC(-O3) GCC(-flto -O3) CLANG(-flto -Ofast) ARMCLANG(-flto -Ofast) ARMCLANG(-flto -Omax)
lm3s6965-ek/qemu-flat(Cortex-M3)   257502      296364           369465             346696                  384204
                                              +15.00%          +43.40%            +34.60%                 +49.20%
sabre-6quad/smp(Cortex-A9)         166520      196004             N/A              207908                  224140
                                              +17.70%             N/A             +24.85%                 +34.60%

Reference:
https://developer.arm.com/documentation/101754/0618/armclang-Reference/armclang-Command-line-Options/-O--armclang-

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 18:23:27 +08:00
Xiang Xiao
40ef5bc6db libc: Move queue.h from include to include/nuttx
to avoid the conflict with libuv's queue.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-26 08:04:58 +02:00
wangbowen6
344c8be049 poll: add poll_notify() api and call it in all drivers
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-26 12:06:32 +08:00
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t *
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-24 21:26:56 +02:00
Masayuki Ishikawa
95fe8426ed arch: lc823450: Fix to boot
Summary:
- I noticed that lc823450-xgevk does not boot due to the recent
  changes on g_current_regs
- This PR fixes this issue

Impact:
- None

Testing:
- Tested with lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-09-24 21:59:32 +08:00
chao an
b134995d92 arm/tlsr82: replace incompatible instruction sets to internal implement
1. some arm instructions are not compatible with arch tlsr:

{standard input}: Assembler messages:
{standard input}:53: Error: bad instruction `svc #0'

2. remove unsupport compile option

cc1: error: unrecognized command line option "-mlittle-endian"
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 23:54:25 +08:00
chao an
47b350a4c3 arch/arm: declare vector array default type to read-only
Reference:
https://developer.arm.com/documentation/dui0474/m/image-structure-and-generation/section-placement-with-the-linker/section-placement-with-the-first-and-last-attributes

CAUTION:
FIRST and LAST must not violate the basic attribute sorting order. For example, FIRST RW is placed after any read-only code or read-only data.

arm-none-eabi-readelf -aS arm_vectors.o
1. Without const:
  Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 3] .vectors          PROGBITS        00000000 000034 00011c 00  WA  0   0  4

2. const symbol:
  [ 3] .vectors          PROGBITS        00000000 000034 00011c 00   A  0   0  4

Regression by:

| commit 229b57d6cb
|
|     arch/armv[6|7|8]-m: Move _vectors to arm_internal.h to avoid the duplication
|
|     and change the type of _vectors from uint32_t to const void *
|
|     Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 22:28:51 +08:00
chao an
c07d076bf5 arch/arm: redefine the linker symbols as armlink style
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 22:28:07 +08:00
chao an
bb63e1b23d arm/cortex-r: correct include path of chip.h
In file included from ./armv7-r/arm_l2cc_pl310.c:41:
./armv7-r/l2cc_pl310.h:38:10: fatal error: chip/chip.h: No such file or directory
   38 | #include "chip/chip.h"
      |          ^~~~~~~~~~~~~

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 13:54:03 +08:00
simbit18
4d7c15af5c arch/arm: fix conditional compilation term (#else)
Code fixing for the conditional compilation term (#else)
2022-09-23 01:36:08 +08:00
simbit18
d35307dacd stm32wl5/stm32wl5_rcc.h
fix conditional compilation term (#else)
2022-09-22 17:17:18 +02:00
chao an
59499c0bb2 arch/arm: fallback to common toolchain if armeb(endian big) is unavailable
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-22 22:19:05 +08:00
Michal Lenc
9ebd7e525c imxrt: add support for ADC triggering by an external signal
Config option IMXRT_ADCx_ETC can now be used to select an external HW
trigger to be used instead of continous trigger. Continous trigger is
used if IMXRT_ADCx_ETC = -1 (default option). Otherwise the source signal
is routed through XBAR and used as a trigger.

Hardware triggering is currently limited to maximum of 8 channels.
HW trigger is automatically disabled if there are more than 8 channels.

The external triggering was tested with PWM signal as a source.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-09-22 22:13:56 +08:00
simbit18
5a085176fe stm32u5/stm32_rcc.h
fix conditional compilation term (#else)
2022-09-22 21:27:09 +08:00
Xiang Xiao
3c1c29f2c4 arch: move non arm g_current_regs defintion to common place
to avoid the code duplicaiton

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-21 22:23:11 +02:00
Xiang Xiao
229b57d6cb arch/armv[6|7|8]-m: Move _vectors to arm_internal.h to avoid the duplication
and change the type of _vectors from uint32_t to const void *

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-21 22:23:11 +02:00
Amir Melzer
6274e19257 fix conditional compilation term (#else) 2022-09-21 15:57:05 -03:00
chao an
fb4c593e89 armv7-r/tms570: fix build break
1.
make[1]: *** No rule to make target 'tms570_spi.c', needed by '.depend'.  Stop.

2.
In file included from armv7-r/arm_gicv2.c:36:
armv7-r/gic.h: In function 'arm_gic_nlines':
armv7-r/mpcore.h:63:29: error: 'CHIP_MPCORE_VBASE' undeclared (first use in this function)
   63 | #define MPCORE_ICD_VBASE   (CHIP_MPCORE_VBASE+MPCORE_ICD_OFFSET)
      |                             ^~~~~~~~~~~~~~~~~

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-22 02:22:18 +08:00
Nathan Hartman
ac20a5c0d6 Remove executable permissions from source files 2022-09-22 01:59:48 +08:00
chao an
de1ad746d8 arm/armv7-r: remove incorrect include header "addrenv.h"
since armv7-r does not support kernel mode

./armv7-r/arm_syscall.c:36:10: fatal error: addrenv.h: No such file or directory
   36 | #include "addrenv.h"
      |          ^~~~~~~~~~~

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-22 01:35:03 +08:00
Masayuki Ishikawa
ae378872c2 arch: armv7-a: Remove the code for CONFIG_ARCH_PGPOOL_MAPPING=n
Summary:
- Currently, CONFIG_ARCH_PGPOOL_MAPPING=y is necessary for
  CONFIG_BUILD_KERNEL=y.
- This commit removes the code for CONFIG_ARCH_PGPOOL_MAPPING=n

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-09-21 19:57:27 +08:00
ligd
6903f02d41 armv7-r: add VBAR cp15 opearation
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-21 18:07:03 +08:00
ligd
3477c347e8 armv7a/r: add isb to cp15_invalidate_icache()
Incase invalidate_icache hasn't done

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-21 18:07:03 +08:00
ligd
6d92810d5a armv7a/r: refact cp15_cache functions
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-21 18:07:03 +08:00
ligd
c866b6be9a armv7a/r: add common operation CP15_SET/GET()
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-21 18:07:03 +08:00
licheng
25d5cd11a1 mmu: mmu enable should after enable SMP
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-21 09:39:41 +08:00
Michal Lenc
11cf3de776 imxrt: disable PWM synchronization when XBAR connection fails
This commit supplements commit 7d877fbb. External sync mode is now
disabled if XBAR connection fails and config options are used directly
in sync_src variable and passed to XBAR macro only when needed. The first
option could caused an undefined behaviour when sync_src was equal to -1
(external sync not used)

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-09-21 04:53:57 +08:00
klmchp
711681a90d add SAMA5D2 support for sam_xdma driver 2022-09-21 00:14:41 +08:00
Xiang Xiao
079a6fa6cc arch/armv7[a|r]: Implement up_affinity_irq
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-20 16:20:17 +09:00
Xiang Xiao
17ac85eb0a arch/armv7[a|r]: Support non SGI in up_trigger_irq
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-20 16:20:17 +09:00
Xiang Xiao
ef43283c67 arch/arm: Unify arm_cpu_sgi to up_trigger_irq
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-20 16:20:17 +09:00
Xiang Xiao
e44ff7d49f arm/rtl8720c: Remove up_trigger_irq since it is implemented in arm_trigger_irq.c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-20 16:20:17 +09:00
Xiang Xiao
8a265e274d Kconfig: Remove EXPERIMENTAL for features which is been around a long time
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-19 11:39:22 -03:00
wangbowen6
282c4104b9 tlsr82/serial: clear uart tx index when uart_reset called.
Otherwise, after the rx error occur, the tx output will be
out of sequence, for example:
normal log:
[   30.163000] 12345678abcdefgh
[   30.666000] 12345678abcdefgh
[   31.169000] 12345678abcdefgh
[   31.672000] 12345678abcdefgh
[   32.175000] 12345678abcdefgh
[   32.678000] 12345678abcdefgh
[   33.181000] 12345678abcdefgh

error log:
he 7 .20]0003 127456c8abgdefch
gde [6.707002] 16345b78afcde
fcde
fghe10010] 5234a678ebcd
 77 713 00]41238567dabchefgd
che 7 .21]0003 127456c8abgdefch
gde [8.709002] 16345b78afcde
fcde

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-19 17:46:42 +08:00
Lingao Meng
3461990ef4 arch: arm: tlsr: Use flase_read ins of memcpy
Since tlsr arch support A/B bank, the hardware support
relative addr to load or store, but for flash read,
must use absolute addr. also combine with flash_<*>_method.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2022-09-19 12:19:48 +08:00
chao an
3a5ae5681d arch/arm/makefile: linking libraries with GCC should use option -l
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-19 11:02:27 +08:00
raiden00pl
69ecafd352 arch/arm: initial support for NRF5340 2022-09-18 21:49:32 +08:00
chao an
f23a736c80 nxstyle: correct the file path
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-18 01:35:21 +08:00
chao an
0bafb014a1 arch/arm/compiler: correct global symbol name
Fix Compile error from Armclang compiler(AC6):
Error: L6218E: Undefined symbol arm_vectoraddrexcption (referred from arm_vectoraddrexcptn.o).

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-17 22:07:21 +08:00
chao an
e156866a73 arch/arm: declare vector array default type to read-only
Reference:
https://developer.arm.com/documentation/dui0474/m/image-structure-and-generation/section-placement-with-the-linker/section-placement-with-the-first-and-last-attributes

CAUTION:
FIRST and LAST must not violate the basic attribute sorting order. For example, FIRST RW is placed after any read-only code or read-only data.

arm-none-eabi-readelf -aS arm_vectors.o
1. Without const:
  Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 3] .vectors          PROGBITS        00000000 000034 00011c 00   A  0   0  4

2. const symbol:
  [ 3] .vectors          PROGBITS        00000000 000034 00011c 00  WA  0   0  4

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-17 21:40:15 +08:00
ligd
e2df52390a SMP: fix crash when switch to new task which is still running
Situation:

Assume we have 2 cpus, and busy run task0.

CPU0                                CPU1
task0 -> task1                      task2 -> task0
1. remove task0 form runninglist
2. take task1 as new tcb
3. add task0 to blocklist
4. clear spinlock
                                    4.1 remove task2 form runninglist
                                    4.2 take task0 as new tcb
                                    4.3 add task2 to blocklist
                                    4.4 use svc ISR swith to task0
                                    4.5 crash
5. use svc ISR swith to task1

Fix:
Move clear spinlock to the end of svc ISR

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-17 17:37:47 +09:00
Petro Karashchenko
4fc76ea661 arch/arm/samv7: fix random corruption of data after SDIO RX DMA transaction
use time based timeout calculation instead of cycle based

minor styling fixes

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-09-17 12:29:58 +08:00
田昕
521f870965 phy62xx:support MTDIOC_ERASESTATE
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-09-16 21:11:06 +08:00
Xiang Xiao
a7b3217c37 boards/arch: Remove FAR from 32bit/64bit arch
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-16 10:22:12 +02:00
chao an
7dbaa4f4c4 arch/arm: add support for armclang compiler(AC6)
Reference:
https://developer.arm.com/Tools%20and%20Software/Arm%20Compiler%20for%20Embedded

Signed-off-by: chao an <anchao@xiaomi.com>
Signed-off-by: sheyunhu <sheyunhu@xiaomi.com>
2022-09-16 14:47:27 +08:00
chao an
54aa91f02b arch/arm: unify compile flags to common/Toolchain.defs
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-16 14:47:27 +08:00
chao an
0f0a94186f arch/arm/toolchain: migrate the toolchain define to arch/arm/Kconfig
migrate the toolchain define to arch/arm/Kconfig to simplify new toolchain registration

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-16 14:47:27 +08:00
zhangyuan21
f10759e377 armv7-a/r: modify regs index to improve exception performance 2022-09-16 15:24:03 +09:00
Andres Sanchez
64687e438a boards/stm32h7: add support for mcuboot
Add support for MCUBoot.
Two new configurations are added:
- mcuboot-loader: mcuboot-loader app used as a bootloader.
main_mcuboot_loader as entrypoint
- mcuboot-app: used as mcuboot agent app. Needs to be
signed manually through "imgtool sign --pad  --align 4 -v 0 -s
auto -H 0x200 --pad-header -S 0xc0000 nuttx.hex nuttx_sign.bin"

Signed-off-by: Andres Sanchez <tito97_sp@hotmail.com>
2022-09-16 02:12:17 +08:00
Michal Lenc
7d877fbbc3 imxrt: add support for PWM synchronization
This commit allows the PWM modules to be synchronized by an external
signal (other PWM module for example). The sync source can be selected
from configuration.

PWM module can also now generate a trigger when its timer reaches the duty
cycle. This trigger is used for the synchronization of other modules. It
can also be used for triggering ADC for example in the future.

Thanks to Rastislav Pavlanin and  Jan Spurek from NXP support for
suggestion which helped to solve the inter-module PWM synchronization
task.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-09-15 08:10:26 +09:00
ligd
bedd5d382d armv7-a: icache also need SMP cache coherency configuration
This can fixes the random crash happened sometime during boot.

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-13 17:59:41 +08:00
zhangyuan21
3b889d820f armv7-a/r: use SRS and RFE for exception handler 2022-09-11 10:50:37 +09:00
ligd
3a023f4d1a arm: fix backtrace busyloop
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-10 12:48:11 +08:00
ligd
b3ebe66ff5 arch: dump backtrace should after set rtcb regs
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-10 12:48:11 +08:00
ligd
a3f9bd3786 backtrace: fix busy loop backtrace
Situation:
1. user call assert
2. crash in assert
3. crash happend, do backtrace
4. backtrace interrupt stack successful
5. busy loop backtrace user stack with CURRENT_REGS

Fix:
use rtcb->regs instead

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-10 12:48:11 +08:00
ligd
37d37dcae5 armv7-a/r: use generic timer to realize arm_timer
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-09 21:52:35 +02:00
ligd
4c19130d1d cache: fix up_clean_dcache() slowly
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-09 21:51:35 +02:00
GD32-MCU
85c8144afa add chip GD32F450 of GD32MCU
Modify the file according to the checks

update the board config files, and modify the gd32f4xx_progmem.c

Add chip GD32F450 of GD32MCU

delete the micro FAR, modify code style

Add chip GD32F450 of GD32MCU
2022-09-09 15:29:35 +08:00
curuvar
e8f4d74ad0 RP2040 Code Cleanup 2022-09-09 12:43:40 +08:00
curuvar
0322a61510 Add watchdog driver support to RP2040 2022-09-08 21:41:13 +08:00
curuvar
05b19e02d9 Eliminate un-needed wait in rp2040 SMART filesystem 2022-09-08 09:00:52 +08:00
curuvar
d3b226aea1 Fix race condition in RaspberryPi Pico W WiFi 2022-09-08 09:00:33 +08:00
Xiang Xiao
e17b678a16 compiler.h: Rename inline_function to always_inline_function
reserve inline_function macro for inline keyword

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-07 10:24:04 +02:00
Sebastien Lorquet
179d64d999 stm32h7: SPI is no more experimental 2022-09-06 19:34:40 -04:00
Sebastien Lorquet
3e16b6c9f1 update conditionals to select stm32h7 spi peripherals 2022-09-06 19:34:40 -04:00
curuvar
9ad75fd95d Added SMART flash filesystem to RP2040 2022-09-05 10:38:56 -03:00
Michal Lenc
23b27419e2 imxrt/encoder: add support for index position capture
This commit enhances imxrt encoder driver with index capture support.
The index is captured when the index interrupt occurs and can be passed
to application layer with QEIOC_GETINDEX ioctl call.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-09-04 11:08:45 +08:00
Huang Qi
32a21a1b67 UBSan: Allow custom the sanitizer in Kconfig
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-09-02 19:07:09 +08:00
Rajvinder Kaur
27fbca771f stm32h7\stm32_fdcan_sock: fix the FDCAN_LOOPBACK config macros 2022-09-02 10:42:08 +08:00
wangbowen6
b15d38246c up_nputs: fix AddressSanitizer: global-buffer-overflow problem
==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048
READ of size 1 at 0x64d9e3c0 thread T0
    #0 0x59ac4e15 in up_nputs sim/up_nputs.c:54
    #1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220
    #2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101
    #3 0x59a67f10 in syslog_write syslog/syslog_write.c:153
    #4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60
    #5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104
    #6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140
    #7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952
    #8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379
    #9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223
    #10 0x598a601a in vsyslog syslog/lib_syslog.c:68
    #11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45
    #12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569
    #13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602
    #14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591
    #15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65
    #16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645
    #17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d)
    #18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3)
    #19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-01 11:51:48 +08:00
zhangyuan21
c82798c66a arch/arm: change context switch to macro 2022-08-31 10:57:38 -04:00
raiden00pl
d7e2704dff arch/stm32/stm32_adc.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
b01ea50e44 arch/stm32/stm32_foc.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
c563d8a993 arch/stm32/stm32_pwm.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
9a85a0959a stm32/Kconfig: remove the unnecessary option 2022-08-27 20:40:06 +08:00
yangxuan8282
2d32ebe952 arch/arm/src/stm32f7/stm32_otghost.c: fix syslog formats 2022-08-26 20:46:50 +08:00
Gustavo Henrique Nihei
5ed2ee85c9 arch: Improve documentation for up_fpucmp function
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Masayuki Ishikawa
50177dbae1 arch: common: Fix arm_allocateheap.c for BUILD_KERNEL
Summary:
- I noticed that the kernel heap area overlaps the PGPOOL
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-25 13:38:47 +08:00
Huang Qi
e4e3208180 Replace all strncpy with strlcpy for safety
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-25 13:38:36 +08:00
Nathan Hartman
1d622b6f79 arch/tiva: Fix typo and minor code formatting 2022-08-24 21:29:18 +02:00
Xiang Xiao
d22e1e1998 compiler.h: Add nosanitize_address macro
and replace all __attribute__((no_sanitize_address)) with it

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
c44a7cbf88 arch: Add ARCH_COVERAGE_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
f1355680ca mm/kasan: Add MM_KASAN_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
yangxuan8282
8a8c268e6b arch/arm/src/stm32f7/Kconfig: add STM32F7_SYSCFG 2022-08-22 17:31:49 +08:00
yangxuan8282
78f44e7769 arch/arm/src/stm32f7/stm32_otg.h: fix stm32_otghost_initialize definition 2022-08-22 17:31:38 +08:00
Huang Qi
a06ec54cd0 debug: Introduce portion of UBSan
without UBSan
```
 text    data     bss     dec     hex filename
  85612     208  142258  228078   37aee nuttx
```

with UBSan:
```
   text    data     bss     dec     hex filename
 194290   98164  208634  501088   7a560 nuttx
```

```c
int main(int argc, FAR char *argv[])
{
  uint32_t ptr[32];
  printf("Hello, World!! %lu\n", ptr[64]);
  return 0;
}
```
Try to run this sample:
```
nsh> hello
ubsan_prologue: ================================================================================
ubsan_prologue: UBSAN: array-index-out-of-bounds in hello_main.c:39:37
__ubsan_handle_out_of_bounds: index 64 is out of range for type 'uint32_t [32]'
ubsan_epilogue: ================================================================================
Hello, World!! 1070182368
nsh>
```

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-22 13:57:29 +08:00
Masanari Iida
bd584332a4 rp2040: Add missing comma in rp2040_i2c_slave.c
This patch fixes missing comma, found by cppcheck.

rp2040_i2c_slave.c:259:0: error: failed to expand 'modbits_reg32',
 Wrong number of parameters for macro 'modbits_reg32'.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2022-08-20 16:37:32 +08:00
yangxuan8282
df6e3d1349 arch/arm/src/stm32f7/stm32_otghost.c: fix undeclared ret 2022-08-19 21:02:02 +08:00
Cis van Mierlo
2c42b93962 S32K1xx: Fixed PM bug for clockconfig 2022-08-19 06:01:30 -07:00
Daniel P. Carvalho
7518beee2e STM32L4 ADC: Change the way that hardware trigger configuration word for regular and injected channels are done. 2022-08-18 11:26:25 -03:00
Michał Łyszczek
4e967c67b4 stm32wl5: fix unbuffered mode and other possible bugs
This patch fixes unbuffered mode so it actually works.

Also, patch contains fixes for possible bugs that could result in
deadlock or system hang in certain situations.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-08-18 11:46:38 +08:00
Michał Łyszczek
cc08ae67cb stm32wl5_pwr: add support to boot second CPU (cortex-m0)
Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-08-18 11:46:38 +08:00
curuvar
74f1bfbfd7 Added support for Raspberry Pi Pico W 2022-08-17 19:03:19 -03:00
raiden00pl
6d1646625a arch/arm/src/stm32f7: port FOC driver from arch/stm32 2022-08-15 13:39:08 +02:00
Xiang Xiao
2b37909c9e libc: Move crc8.h, crc16.h and crc32.h from include to include/nuttx
to avoid the conflict with the 3rd party library

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-13 13:28:24 +03:00
Masayuki Ishikawa
690c178e4b arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (4/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 0628019c2c
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Wed Jul 13 11:01:49 2022 -0700

      imxrt:Enet ensure proper dcache for Writeback mode

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
fb8562763a arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (3/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 522a949ed5
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Wed Jul 13 11:00:11 2022 -0700

      imxrt:enet Better interrupt state handeling

- NOTE: I also fixed typo and compile error in the above commit

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
6dfd01885d arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (2/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 81f03a9151
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Tue Mar 15 14:27:51 2022 -0700

     imxrt:ETH Add Support for ETH2

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
4e4ebba306 arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (1/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 12a515ebb6
  Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
  Date:   Thu Feb 4 11:27:09 2021 +0900

      arch: imxrt: Introduce CONFIG_NET_GUARDSIZE to imxrt_enet.c

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2 (defconfig will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Petro Karashchenko
27fe5a50c6 arch/arm/stm32f7: fix cache invalidation issue in Ethernet RX
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 03:40:25 -04:00
Petro Karashchenko
4cd7e33b8d arch/arm/samv7: fix compilation warnings
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 10:00:39 +08:00
Petro Karashchenko
49d26e1b50 arch/arm/samv7: get TX DMA running for HSMCI interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 10:00:39 +08:00
David Sidrane
32c4bdb7a6 s32k1xx:LPI2C Add DMA support 2022-08-10 11:22:38 +08:00
raiden00pl
08b8234e9e arch/arm/src/stm32f7: port ADC driver from arch/stm32
This change adds support for the following features:
  - injected channels (default: 0)
  - ADC resolution (default: 12bit)
  - ADC low-level operations
  - ADC external triggers
  - custom ADC interrupts
  - ADC sample time configuration
  - configurable ADC SCAN mode (default on if DMA)
  - configurable ADC DMA mode (default: one shot mode)
  - reset the ADC block only if all ADC instances are closed
2022-08-10 02:03:51 +08:00
David Sidrane
4ee917c14c stm32f7:Serial Fix breakage from #6779 2022-08-09 20:18:23 +03:00
Jiuzhu Dong
fe17f747a7 fs/directory: move private directory information to filesystem
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Jiuzhu Dong
90db4daca9 fs/directory: update readdir interface for all filesystem
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
David Sidrane
2e7b594bf4 s32k1xx:Add s32k146 DMAMUX 2022-08-09 16:29:21 +03:00
David Sidrane
3813320c31 s32k1xx_edma:Add Looping and cleanup
s32k1xx:EDMA Use aligned_data macros

s32k1xx:EDMA CONFIG_ARCH_CHIP_S32K14x->CONFIG_ARCH_CHIP_S32K14X

s32k1xx:EDMA remove FAR keyword

s32k1xx:EDMA Fix C&P error from Kinetis

s32k1xx:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather

s32k1xx:EDMA Fix access violation

s32k1xx:dmamux fixed missing closing paren
2022-08-09 16:29:21 +03:00
raiden00pl
a05db5299e arch/arm/src/stm32f7: port PWM driver from arch/stm32
This change adds support for the following features:
  1. PWM complementary outputs
  2. interface for low-level PWM operations
  3. support for all PWM channel modes
  4. support for internal PWM channels (TIM1/TIM8)
  5. support for PWM channel polarity and IDLE state
  6. support for TRGO and BREAK
2022-08-09 12:37:49 +08:00
raiden00pl
fd02855c63 arch/stm32f7: rename PWM complementary output pins from CHxN to CHxNOUT (always output) 2022-08-09 12:37:49 +08:00
David Sidrane
050ce3e0d3 kinetis:spi remove ttype & do cache ops 2022-08-09 10:46:31 +08:00
David Sidrane
22580584d2 kinetis:[lp]serial remove ttype & do cache ops 2022-08-09 10:46:31 +08:00
David Sidrane
7a7a01153b Kinetis:edma Cleanup
Kientis:edma Cleanup

    Kinetis:EDMA Interrupt on last TCD

    Kintis:edma remove dcache operations on passed data

       Data can be chained in TCD and both read and write
       can be in the chain. So the dmach ttype is not
       relevent for all; the TCDs. Therefor we only perform
       dcache operations on internal strutures, The caller
       must perform dcache operations on their data.

kinetis:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather
2022-08-09 10:46:31 +08:00
Nathan Hartman
dd718e78f7 Fix typos 2022-08-07 23:33:19 +08:00
p-eaglelaw
631ae0032e fix warning 2022-08-07 13:03:39 +08:00
p-eaglelaw
702e2f3680 remove unused lib,fix according review comments 2022-08-07 01:57:02 +08:00
David Sidrane
55aaba53fc imxrt:SPI add DMA support 2022-08-06 15:32:07 +08:00
David Sidrane
fa58381e58 imxrt:serial add TX & RX DMA support
imxrt:serial ioctl should call to proper setup
2022-08-06 15:32:07 +08:00
David Sidrane
85ec2e1446 imxrt:Add LPI2C DMA 2022-08-06 15:32:07 +08:00
David Sidrane
f34acdb936 imxrt:lpi2c add parens for macros expansions 2022-08-06 15:32:07 +08:00
Peter van der Perk
22d41f6b9c LPC17xx_40xx PWM multichannel support
USB no softconnect
SocketCAN kconfig fixes
2022-08-06 15:31:38 +08:00
David Sidrane
6ab76bfc7c imrt105x:ENET Match Data sheet Naming 2022-08-06 15:31:23 +08:00
David Sidrane
b9a6b01e6c imrt102x:ENET Match Data sheet Naming 2022-08-06 15:31:23 +08:00
David Sidrane
0628019c2c imxrt:Enet ensure proper dcache for Writeback mode
Use aligned_data
   added proper handeling for Writeback
2022-08-06 15:31:23 +08:00
David Sidrane
522a949ed5 imxrt:enet Better interrupt state handeling 2022-08-06 15:31:23 +08:00
David Sidrane
1d88f8df37 imxrt:pinmux ENET2 correct ALT for GPIO_ENET2_REF_CLK2 2022-08-06 15:31:23 +08:00
David Sidrane
bced1a3cb4 imxrt:Fix Ethernet Clocking 2022-08-06 15:31:23 +08:00
David Sidrane
6a2c1fb1de imxrt:Kconfig add IMXRT_PHY_POLLING 2022-08-06 15:31:23 +08:00
David Sidrane
81f03a9151 imxrt:ETH Add Support for ETH2 2022-08-06 15:31:23 +08:00
David Sidrane
49d304257c imxrt:All boards ARCH_PHY_INTERRUPT is a board property 2022-08-06 15:31:23 +08:00
David Sidrane
3af910f8b6 imxrt:Ethernet Add LAN8742A support 2022-08-06 15:31:23 +08:00
Petro Karashchenko
b3cd9090d1 drivers/net: make sure that net driver d_buf is 16-bit aligned
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-05 22:21:37 +08:00
raiden00pl
93584f8668 arch/stm32f0l0g0: add SPI3 support (STM32G0B0 chips) 2022-08-05 13:57:56 +08:00
David Sidrane
33efeeeafd imxrt:EDMA add loop support
imxrt:edma imxrt_dmach_{xfrsetup|getcount} DMACH_HANDLE *->DMACH_HANDLE

imxrt:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather
2022-08-05 09:44:36 +08:00
David Sidrane
1421bc58db imxrt:Correct register usage in up_rtc_settime 2022-08-05 09:43:36 +08:00
David Sidrane
5e902861d9 imxrt:usdhc fix error when CONFIG_ARMV7M_DCACHE is off 2022-08-05 09:43:36 +08:00
David Sidrane
b9c6284750 imxrt:lowputc add extern "C" 2022-08-05 09:43:36 +08:00
Nathan Hartman
20bdd44e7b Remove executable permission from source and build files. 2022-08-04 12:48:18 -03:00
Xiang Xiao
8582a12388 drivers: Reorganize the power related code layout
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-04 10:28:28 +03:00
Masayuki Ishikawa
8e7752c7da arch: common: Fix up_check_tcbstack() for CONFIG_ARCH_ADDRENV=y
Summary:
- I noticed that ps shows incorrect stack usage when running
  getprime in the background.
- With CONFIG_ARCH_ADDRENV=y, a user task including pthread
  allocates its stack in the user space that needs to be
  accessed with a correct address environment.
- This commit fixes this issue.

Impact:
- CONFIG_ARCH_ADDRENV=y only

Testing:
- Tested with sabre-6quad:knsh on qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-04 11:13:16 +08:00
raiden00pl
981ad9fc1e arch/stm32xx/Kconfig: simplify PWM options and unify them among stm32 chips 2022-08-03 23:43:19 +08:00
raiden00pl
935f110438 arch/stm32f7/stm32_tim.c: include the missing RCC header 2022-08-03 23:42:52 +08:00
raiden00pl
47dbad0a8b arch/stm32/stm32_foc.c: fix some ADC and PWM ifdefs 2022-08-03 23:42:37 +08:00
Peter van der Perk
a6da6dcec6 LPC17_40 CAN driver SocketCAN support 2022-08-03 17:58:57 +08:00
chao.an
d501e01eef arm/backtrace: use sp unwind if FRAME_POINTER is enabled on thumb mode
GCC toolchain Bug 92172 - ARM Thumb2 frame pointers inconsistent with clang

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-03 17:58:36 +08:00