Commit Graph

18118 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
b33ccd01cf xtensa/esp32: Make the semaphore timeout on I2C configurable
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-16 14:07:26 -03:00
zhuyanlin
7947e50f06 xtensa:backtrace: flush to stack when in interrupt
The registers may be in window during interrupt.
Flush window stack to stack first.
And fix warning in build.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:53:35 -05:00
Peter Bee
2a8b076b38 risc-v/esp32c3: fix pwm driver bug
Wrong offset sign and pwm multichan fix

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2021-09-16 08:38:49 -03:00
zhuyanlin
cdb441cc3f arch:xtensa:dumpstate: use sched_dumpstack
Use sched_dumpstack instead. The backtrace infomation like

xtensa_user_panic: User Exception: EXCCAUSE=0009 task: hello
xtensa_registerdump:    PC: 202b32b8    PS: 00060030
xtensa_registerdump:    A0: a02acb87    A1: 20998d10    A2: ffffaaaa    A3: 12345678
xtensa_registerdump:    A4: a02ba26c    A5: 209949c0    A6: 20990994    A7: 00000258
xtensa_registerdump:    A8: a02b32af    A9: 20998cb0   A10: 0000000f   A11: 209949a0
xtensa_registerdump:   A12: a02be95c   A13: 20994980   A14: 00000003   A15: 209949d0
xtensa_registerdump:   SAR: 00000000 CAUSE: 00000009 VADDR: ffffaaaa
xtensa_registerdump:  LBEG: 00000000  LEND: 00000000  LCNT: 00000000
xtensa_registerdump:  TMP0: 202b1512  TMP1: 20998af0
sched_dumpstack: [BackTrace| 3|0]:  0x202acbae 0x202b232e 0x202b1912 0x202b19f5 0x202b24f1 0x202b152f    0x40023 0x202b32b0
sched_dumpstack: [BackTrace| 3|1]:  0x202acb87 0x202a86a4

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
zhuyanlin
6e0f84dc88 arch:xtensa: add up_backtrace support
Up_backtrace can be backtrace from task or interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
zhuyanlin
3acdbef60d xtensa:arch: force up_getsp to inline
Up_getsp may be not inline in gcc, thus get the sp
is up_getsp function's sp, not the caller function.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
zhuyanlin
583dce0b98 arch:xtensa: remove WSBITS/WBBITS to core.h
Remove WSBITS/WBBITS macro to core.h as may be used by
arch common code.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
Cis van Mierlo
b316c679c1 S32K1xx: added PM support 2021-09-15 12:20:23 -03:00
SPRESENSE
74df4b70b3 drivers: video: Rearchitect video driver
Rearchitect video driver:
- Define two video I/F(struct imgsensor_ops_s and struct imgdata_ops_s),
  and support them.
- CISIF driver supports new video I/F struct imgdata_ops_s.
- ISX012 driver supports new video I/F struct imgsensor_ops_s.
- Move ISX012 driver to general driver directory.
2021-09-15 07:06:35 +02:00
Juha Niskanen
4487b352c0 arch/arm/src/stm32l4: fix baud rate setting for LPUART
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-09-14 08:57:25 -07:00
Harri Luhtala
7e3c813346 arch/arm/src/stm32l4: LPUART1 support
Signed-off-by: Harri Luhtala <harri.luhtala@haltian.com>
2021-09-14 08:57:25 -07:00
Abdelatif Guettouche
198c30eaa6 stm32*7/stm32_serial.c: Don't fake an interrupt when interrupts are not
suppressed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-14 22:50:43 +08:00
chao.an
ba9b829372 arch/arm: correct the function name from arm_getsp() to up_getsp()
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-09-14 22:48:47 +08:00
Cis van Mierlo
91c945a2e8 s32k1xx: added way to get the reset cause in proc fs 2021-09-14 08:35:41 +02:00
Sara Souza
83a9c2b24b xtensa/irq.h: Fixes the routine that clears the processor interrupt 2021-09-13 17:01:49 -03:00
Alin Jerpelea
bb54ed4227 author: OffCode Ltd : update licenses to Apache
OffCode Ltd has submitted the SGA

as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-13 22:43:36 +08:00
zhuyanlin
8e6fbe700e xtensa:dcache_clean: use DCACHE_LINZESIZE instead of DCACHE_SIZE
Clean_dcache use DCACHE_LINZESIZE instead of DCACHE_SIZE in addr loop

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-13 14:38:57 +08:00
Xiang Xiao
850367d5bb arch/arm: Add ARCH_CORTEXM55 Kconfig for cortex-m55
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-12 09:09:42 -03:00
Jukka Laitinen
3654db3517 mpfs: Modify IRQ handling to support also HART0 on PF
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-09-11 23:33:01 +08:00
Janne Rosberg
8b560e7894 mpfs/i2c: fix bus initialize for i2c1 2021-09-11 23:33:01 +08:00
Janne Rosberg
1e3919e55a mpfs/corepwm: remove wrong header include 2021-09-11 23:33:01 +08:00
Janne Rosberg
7db3456824 risc-v/mpfs: serial: add termios support and init device clocks 2021-09-11 23:33:01 +08:00
Janne Rosberg
aa057e25f2 mpfs/i2c: adapt to sysreg define changes 2021-09-11 23:33:01 +08:00
Janne Rosberg
dc54ba924e mpfs/spi: adapt to sysreg define changes 2021-09-11 23:33:01 +08:00
Janne Rosberg
3e6b19dfc5 risc-v/mpfs: add more sysreg defines and fix clock and reset defines 2021-09-11 23:33:01 +08:00
Abdelatif Guettouche
31aa616bf2 stm32_serial.c: Don't fake a TX interrupt when interrupts are not
suppressed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-10 15:15:44 -07:00
David Sidrane
41e1696b27 stm32f4:USB otgdev Ensure proper EP state
Repeated automated sercon, serdis on VBUS proved to fail
   for CDCACM DATA IN (device Serial TX). The root cause was
   that the EP was left active after disconnect. This resulted
   in the first serial write falling to kick-off the EP IN request.
   That should restart the EP ISR.
2021-09-09 14:27:41 -04:00
David Sidrane
e488f0047d stm32h7:USB otgdev Ensure proper EP state
Repeated automated sercon, serdis on VBUS proved to fail
   for CDCACM DATA IN (device Serial TX). The root cause was
   that the EP was left active after disconnect. This resulted
   in the first serial write falling to kick-off the EP IN request.
   That should restart the EP ISR.
2021-09-09 14:27:41 -04:00
David Sidrane
21f049b43a stm32f7:USB otgdev Ensure proper EP state
Repeated automated sercon, serdis on VBUS proved to fail
   for CDCACM DATA IN (device Serial TX). The root cause was
   that the EP was left active after disconnect. This resulted
   in the first serial write falling to kick-off the EP IN request.
   That should restart the EP ISR.
2021-09-09 14:27:41 -04:00
Sara Souza
acf18bd82d risc-v/esp32-c3: refactor the Wi-Fi board logic.
This commit moves the Wi-Fi initialization to
Wi-Fi specific file and to spiflash initialization.

It also reserves one partition for Wi-Fi use and for general use,
and makes it possible to me mounted by several FS.
2021-09-09 20:14:04 +08:00
Sara Souza
11068fad1b risc-v/esp32-c3: Enable the allocation of multiple MTD SPI Flash partitions 2021-09-09 20:14:04 +08:00
Harri Luhtala
d4e59b7e8d arch/arm/src/stm32l4: add control for Vddio2 independent I/Os supply valid
Signed-off-by: Harri Luhtala <harri.luhtala@haltian.com>
2021-09-09 08:26:08 -03:00
Abdelatif Guettouche
4ef859924b esp32_serial.c: Release the spinlock before calling uart_xmitchars, this
functions will call esp32_txint again which leads to deadlock since
esp32_txint has already locked the spinlock.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-09 19:35:17 +09:00
Abdelatif Guettouche
b5bb1fb8a3 esp32_serial.c: Replace critical section by a device specific spin lock.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-09 19:35:17 +09:00
Abdelatif Guettouche
f47d28c108 esp32_serial.c: Don't fake an interrupt when interrupts are not
suppressed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-08 09:27:08 -03:00
zhuyanlin
26b4bb3075 xtensa:cache: fix typo error
use addr instead of add
2021-09-08 11:19:02 +02:00
YAMAMOTO Takashi
4f7226ac4a arch/avr: Remove -nostartfiles -nodefaultlibs from LDFLAGS
These options are not ld options.
The recent versions of ld complain on them.

https://sourceware.org/pipermail/binutils/2021-June/116826.html
2021-09-08 09:40:48 +08:00
YAMAMOTO Takashi
58bdcbab9b Revert "Make: use gcc as LD"
This reverts commit 45672c269d.

Because:

* It's very confusing to have cc as LD.
* I don't see what "-nostartfiles -nodefaultlibs" in LDFLAGS are
  supposed to do when we use LD directly. It would be simpler to
  remove them from our LDFLAGS.
2021-09-08 09:40:48 +08:00
Jari van Ewijk
5f63fa391f Fix error in s32k118_pinmux.h 2021-09-07 17:34:19 -07:00
zhuyanlin
7b5c39a9d3 arch:xtensa: add xtensa_cache code support
Add xtensa_cache code support
2021-09-07 13:33:31 +08:00
zhuyanlin
d6fe0f18f5 arch:xtensa: add XTENSA_CACHE config support
Add support for XTENSA_HAVE_ICACHE & XTENSA_HAVE_DACHE
2021-09-07 13:33:31 +08:00
YAMAMOTO Takashi
5ad1cba338 Revert "arch: Replace ar and nm with gcc-ar and gcc-nm"
This reverts commit b05737d78f.

Because it broke clang-based builds.
2021-09-07 10:54:15 +08:00
Fotis Panagiotopoulos
eb48a0dbe0 Fix in STM32_UART8 Kconfig. 2021-09-07 10:52:44 +08:00
Jukka Laitinen
1b75b5d5aa Fix compilation of arm protected build
Correct typos in include/nuttx/arch.h and suppress
"'noreturn' function does return" warning coming from arm_pthread_exit.c

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-09-07 00:31:47 +08:00
Juha Niskanen
b70ae9ae82 arch/arm/src/stm32l4/stm32l4_flash.c: fix FLASH_CONFIG_I to use dual-bank access
This is currently only used on STM32L4+ devices. Page erase in
flash_erase() function supports only dual-bank mode so it makes little
sense to configure this for unsupported single-bank mode.

Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-09-04 14:31:16 +08:00
Sara Souza
26397c6695 xtensa/esp32: Wi-Fi board logic refactoring.
This commit removes the initialization of the Wi-Fi partition
from the Wi-Fi board logic and moves it to the SPI Flash board code.

It creates 2 different partition (one for Wi-Fi and one for general
use).

It also allows these partitions to be mounted over several FSs.
2021-09-04 14:30:02 +08:00
Juha Niskanen
508215581f arch/arm/src/stm32l4: fix STM32L4+ option bytes memory address
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-09-03 09:55:54 -03:00
liucheng5
fdb9576d7a feature: driver: Add a Linux SPI into simulator.
When SIM_SPI is valid, a specified Linux SPI device ‘spidevN.P’(N is bus number and P is CS number) is attached to nuttx simulator, shown as 'spi0' under /dev. One may type spi command (need SPITOOL valid) in NSH to control the Linux SPI and exchange data, other devices such sensors can use it to debug in simulator on a Ubuntu PC. Note that a USB<>SPI module (e.g. CH341A/B) should be plugged in to achieve Linux SPI ports.

Change-Id: I275b2c2bbf6d14bcdf514c89efb9a2264d69e9a3
Signed-off-by: liucheng5 <liucheng5@xiaomi.com>
2021-09-03 18:15:25 +08:00
Alin Jerpelea
a20d4ac4ec author: Aleksandr Vyhovanec: update licenses to Apache
Aleksandr Vyhovanec has submitted the ICLA
as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-03 17:38:33 +08:00
Xiang Xiao
b05737d78f arch: Replace ar and nm with gcc-ar and gcc-nm
to make enable LTO easily

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-02 10:02:14 -03:00