Squashed commit of the following:
drivers/lcd: Finishes off basic FT80X. Still missing some niceties.
drivers/lcd: Rethink FT80X display list interface.
drivers/lcd: More FT800x display list logic. Still not complete.
drivers/lcd: Add some basic FT80x initialization logic.
drivers/lcd: Add ft80x display list IOCTL framework. Still missing low level display list operations.
drivers/lcd: FT80x driver cannot be a standard LCD driver but must, instead, be a custom character driver.
drivers/lcd: Add FT800 co-processor commands and display list helpers.
drivers/lcd: Add SPI interface and framework for the initialization and the basic LCD driver.
drivers/lcd: Add beginnings of some FT80x implementation.
drivers/lcd: Add definitions for the FTDI FT801 part
include/nuttx/lcd/ft800.h: Add initial FT800 interface definition.
drivers/lcd: Add ft800 header file.
lc823450 smp test
* sched/clock: Replace critical section APIs with spin lock APIs in clock_gettime.c
This change will improve performance for SMP systems but nothing
changes for non-SMP systems. (Pls see include/nuttx/irq.h)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* sched/sched: Remove unnecessary DEBUGASSERT in sched_removereadytorun.c
In SMP mode, rtrtcb is not always at the g_readytorun.head.
This change removes DEBUGASSERT() to avoid this condition.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Fix signal handing for smp
* sched/signal: Remove SMP related logic in sig_dispatch.c
This change prevents from a deadlock in up_schedulesigaction.c
where inter-CPU signal handling is actually implemented.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/armv7-m: Fix signal handling for SMP
In previous implementation, signal handling for SMP was incorrect.
Thus, for example, if an inter-CPU signal happened an incorret tcb
was signaled and caused ASSERT().
This change fixes the issues and works for both inter-CPU signal
handling and signal handling on the same CPU.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Added support for LIS3DH accelerometer sensor.
* Added support for LIS3DH accelerometer sensor.
* Fix line length
* Fix more line lengthts
Approved-by: Gregory Nutt <gnutt@nuttx.org>
SAMDL DMA fixes and experimental SPI support
* SAMDL: Fix DMA controller support
* SAMDL: Added experimental DMA support to SPI driver. spi_exchange() uses a pair of DMA channels for TX and RX
Approved-by: Gregory Nutt <gnutt@nuttx.org>
disable LPC17 FDR when not used (second fix)
if a boot loader sets the fractional divider (FDR) the baud rate in
nuttx will be wrong (multiplied by this fraction).
This also has to be added to lpc17_lowputc.c
Unfortunately the constant used for shifting the bits was wrong in the header file, so it took some time to realize this...
Approved-by: Gregory Nutt <gnutt@nuttx.org>
configs/flipnclick-pic32mz: Add an nxlines configuration for use in testing the custom HiletGo Click board.
arch/mips/src/pic32mz: Correct some SPI-related typos. configs/flipnclick-pic32mz: Finishes integration of HiletGo OLED. drivers/lcd: Finish support for HiletGo OLED.
drivers/lcd: Add configuration support for HiletGo OLED. configs/flipnclick-pic32mz: Add board support for HiletGo OLED.
arch/mips/src/pic32mz: Fix some typos in debug instrumentation in pic32mz-gpio.c; fix some types releated to UART5 configuration in pic32mz-serial.c.
configs/flipnclick-pic32mz/nsh: Switch serial console to UART3. There is some problem with the UART4 RX pin documentation or configuration.
disable LPC17 FDR when not used
* disable LPC17 FDR when not used
if a boot loader set the fractional divider (FDR) the baud rate in
nuttx will be wrong (multiplied by this fraction).
So if it is not used, it should be disabled.
LPC176x docs say:
"
DIVADDVAL Baud-rate generation pre-scaler divisor value.
If this field is 0, fractional baud-rate generator will
not impact the UARTn baudrate.
MULVAL Baud-rate pre-scaler multiplier value.
This field must be greater or equal 1 for UARTn to operate properly,
regardless of whether the fractional baud-rate generator is used or not.
"
So DIVADDVAL is set to 0 and MULVAL is set to 1.
* symbols found and added
Approved-by: Gregory Nutt <gnutt@nuttx.org>
