Gregory Nutt
cf73c9e1d1
EPS32: Add GPIO ROM interface definitions
2016-10-27 10:43:58 -06:00
Gregory Nutt
123c520db4
Correct time initialization for the case where time is initialized from settings in the .config file. The correct range for month (tm_mon) internally is 0-11, not 1-12 as it is in the .config file.
2016-10-27 08:36:24 -06:00
Gregory Nutt
0967864c92
Correct clock initialization. The correct range for the month is 0-11 but is entered as 1-12 in the .config file
2016-10-27 08:32:23 -06:00
Gregory Nutt
57ad019fba
Revert "Correct a problem in clock_gettime(CLOCK_REALTIME, &time); which is ahead by 1 month of the specified CONFIG_START_MONTH"
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I don't believe this change is correct in general. Nomralling clock_isleapyear() is called with tm_mon which is in the range of 0-11. That change would be bad for that range. It would make sense for a range of 1-12, but that is not how tm_mon is defined.
This reverts commit 1796a25e53
2016-10-27 08:20:16 -06:00
Marc Rechté
1796a25e53
Correct a problem in clock_gettime(CLOCK_REALTIME, &time); which is ahead by 1 month of the specified CONFIG_START_MONTH
2016-10-27 07:10:36 -06:00
Vytautas Lukenskas
d9c2789253
LPC32xx serial: Fix a typo in ioctl TIOCSRS485 ioctl.
2016-10-27 07:00:32 -06:00
Gregory Nutt
76788040d5
ESP32: Add esp32_config.h
2016-10-26 15:45:03 -06:00
Gregory Nutt
2752e46e08
Merged in david_s5/nuttx-7/david_s5/stm32f76xx77xx_pinmaph-missed-one-1477516213180 (pull request #158 )
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stm32f76xx77xx_pinmap.h Missed one
2016-10-26 21:12:47 +00:00
David Sidrane
314dd62dd5
stm32f76xx77xx_pinmap.h Missed one
2016-10-26 21:10:59 +00:00
Gregory Nutt
f1479e0cd2
Merged in david_s5/nuttx-6/david_s5/stm32_i2cc-dejavu-1477515604820 (pull request #157 )
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stm32_i2c.c Dejavu
2016-10-26 21:07:09 +00:00
David Sidrane
0bab23fb1b
stm32_i2c.c Dejavu
2016-10-26 21:00:50 +00:00
Alan Carvalho de Assis
4d29b898a6
Add RGB LED support on STM32F103 Minimum board
2016-10-26 13:27:58 -06:00
Gregory Nutt
ca7ca0eb57
ESP32: More compilation issues
2016-10-26 12:59:31 -06:00
Gregory Nutt
0a96f3a8c8
ESP32: Fix some compilation issues
2016-10-26 12:50:10 -06:00
Gregory Nutt
6a20560ba2
Trivia fix to typo in comment
2016-10-26 12:29:36 -06:00
Gregory Nutt
650757bbf0
ESP32: Add GPIO support
2016-10-26 12:11:24 -06:00
Gregory Nutt
946045075e
ESP32: Remove some long lines in header file
2016-10-26 08:23:09 -06:00
Gregory Nutt
3e13ed2400
Within the OS, when a thread obtains a semaphore count it must call sem_addholder() if CONFIG_PRIORITY_INHERITANCE is enabled. If a count is available, then sem_wait() calls sem_addholder(), otherwise it waited for the semaphore and called sem_addholder() when it eventually received the count.
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This caused a problem when the thread calling sem_wait() was very low priority. When it received the count, there may be higher priority threads "hogging" the CPU that prevent the lower priority task from running and, as a result, the sem_addholder() may be delayed indefinitely.
The fix was to have sem_post() call sem_addholder() just before restarting the thread waiting for the semaphore count.
This problem was noted by Benix Vincent who also suggested the solution.
2016-10-26 07:23:15 -06:00
Gregory Nutt
6acc831e77
Remove duplicate select from Kconfig
2016-10-26 07:00:24 -06:00
Gregory Nutt
2c09279343
ESP32: Add beginning of GPIO register definition file
2016-10-26 06:27:02 -06:00
Gregory Nutt
e464160730
Merged in slorquet/nuttx/stm32l4_pinouts (pull request #156 )
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CHxN channels are always outputs
2016-10-26 12:24:11 +00:00
Sebastien Lorquet
f24701f5c7
Merge branch 'master' into stm32l4_pinouts
2016-10-26 13:31:54 +02:00
Sebastien Lorquet
68dae715b0
CHxN channels are always outputs
2016-10-26 13:21:57 +02:00
Gregory Nutt
b8462d3e04
ESP32: Need to take priority into account when allocating CPU interrupts
2016-10-25 16:27:58 -06:00
Gregory Nutt
fef7b414c5
Add logic to attach peripheral interrupt sources to CPU interrupts
2016-10-25 15:19:29 -06:00
Marc Rechte
483f012600
Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress.
2016-10-25 14:14:10 -06:00
Gregory Nutt
6756b44dc3
ESP32: Add framework to assign a a peripheral to a CPU interrupt
2016-10-25 13:16:05 -06:00
Alan Carvalho de Assis
2d7b1ccdda
STM32F1 Mimumum: Fix Timers 2 to 7 clock frequencies
2016-10-25 12:52:56 -06:00
Gregory Nutt
d5fceadacd
Xtensa: Fix some compilation issues
2016-10-25 12:34:23 -06:00
Gregory Nutt
2a59205ffa
ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding.
2016-10-25 12:02:53 -06:00
Gregory Nutt
c457e26f2a
ESP32: Add UART register definition file
2016-10-25 08:35:07 -06:00
Gregory Nutt
04c6319e32
Merged in slorquet/nuttx/stm32l4_uarts (pull request #155 )
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Enable and renames for 32l4 UARTs 4 and 5
2016-10-25 13:09:17 +00:00
Gregory Nutt
a4e5db6ffb
Merged in slorquet/nuttx/32l4_i2c (pull request #154 )
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Fix i2c devices rcc registers
2016-10-25 13:08:43 +00:00
Sebastien Lorquet
27920eeae9
Enable and renames for 32l4 UARTs 4 and 5
2016-10-25 10:55:25 +02:00
Sebastien Lorquet
9be23d0c76
Fix i2c devices rcc registers
2016-10-25 10:53:24 +02:00
Max Kriegleder
1d50259358
STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54 ). The changes almost exclusively affect the ISR.
2016-10-24 16:32:10 -06:00
Gregory Nutt
1dabbd8489
Costmetic changes
2016-10-24 16:18:30 -06:00
Gregory Nutt
de6db52b52
Oops... Last commit had some garbage in the file
2016-10-24 15:36:11 -06:00
Gregory Nutt
3d4ce55ebd
Oops.. a couple of hunks failed in the last patch. Hope I got them fixed correctly.
2016-10-24 15:25:40 -06:00
Max Nekludov
146d7e7921
drivers/net/tun.c: Fix bug in TUN interface driver
2016-10-24 15:17:01 -06:00
Gregory Nutt
7b7e352d6e
ESP32: Add some peripheral configuration
2016-10-24 14:09:47 -06:00
Gregory Nutt
802cd12796
Fix typo in last commit
2016-10-24 07:31:18 -06:00
Gregory Nutt
818b0171d7
ESP32: Clock configuration is not yet implemented. ESP32 will be running a XTAL frequency.
2016-10-24 07:30:11 -06:00
Gregory Nutt
4cf60022ca
Xtensa: Correct some compile issues
2016-10-23 16:25:55 -06:00
Gregory Nutt
2514ddec8b
Xtensa: Add NMI handler
2016-10-23 16:24:09 -06:00
Gregory Nutt
261eec110b
Xtensa: Mismatched #endif
2016-10-23 14:19:08 -06:00
Gregory Nutt
9a9488ae92
ESP32: Fix heap initialization
2016-10-23 14:20:03 -06:00
Gregory Nutt
a41c98952c
Xtensa: Fix some compilation issues
2016-10-23 13:33:48 -06:00
Gregory Nutt
1166d44441
Minor improvement to the up_irq_save() implementation
2016-10-23 13:37:40 -06:00
Gregory Nutt
6bbe55602c
Xtensa: Add tie.h
2016-10-23 13:25:41 -06:00
