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104 Commits

Author SHA1 Message Date
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t * 
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-24 21:26:56 +02:00
chao an
a3a4e89efc libs/libc/arm: use builtin routines instead of aliases of __aeabi_mem* 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-09-24 00:10:36 +08:00
wangbowen6
4e1097280a telink: add custom setjmp implementation for tlsr82. 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-09-08 09:15:25 +08:00
chao.an
62977ec4e8 arch/sim: add windows host simulate support 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-08-23 22:04:42 +08:00
chao.an
ca24efff80 libs/libc: correct config name 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-07-27 20:18:05 +08:00
Nathan Hartman
849f760b77 Fix various typos 2022-07-08 02:15:54 +08:00
zhuyanlin
3455002ffd libc:xtensa:arch_memmove: fix warning 
warning: 'SIM_CHECKS_ALIGNMENT' macro redefined
[-Wmacro-redefined] #define SIM_CHECKS_ALIGNMENT 1

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-06-07 11:09:57 +03:00
Xiang Xiao
1a3e57fe86 libc: Remove weak_function from __aeabi_atexit 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-06-02 10:54:23 +03:00
Ville Juven
622677d4a1 libc: Implement exit, atexit, on_exit and cxa_exit on the user side 
For CONFIG_BUILD_KERNEL using the sched/task/task_exithook implementation
will just not work. It calls user code with kernel privileges which is
a bit of a security issue.
 2022-05-25 15:28:43 +08:00
Xiang Xiao
51cf7ba05a Remove FAR from arm/risc-v/xtensa/sim/x86 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
f7f8a21486 libs: Move aeabi_atexit from libxx/ to libc/machine/arm/ 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-13 00:13:03 +03:00
Masayuki Ishikawa
5c3d6bba6d libs: risc-v: Add R_RISCV_JAL support to arch_elf.c 
Summary:
- This commit adds R_RISCV_JAL support to arch_elf.c
- The code only checks the immediate value but does not relocate it
  because it is done by the compiler.

Impact:
- None

Testing:
- Tested with rv-virt:knsh64 (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-05-12 10:36:03 +08:00
zhuyanlin
38f8032e31 libc:xtensa: move syscall to swint call 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-11 10:48:53 +02:00
wangbowen6
dcb440a4d9 libc/arch_atomic: add FAR to pointers. 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-04-29 15:06:11 +08:00
wangbowen6
ea164f28b8 libc/arch_atomic: add gcc legacy __sync buitins support. 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-04-29 15:06:11 +08:00
wangbowen6
cbab540169 arm/arch_setjmp.S: armv6m support setjmp, longjmp 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-04-27 23:21:03 +08:00
Ville Juven
9288ed85e7 RISC-V: Add/fix implementation for arch_elf.c 
The jump instruction relocation had an assert that tests for jumps with
an offset of 0. This makes it so that a while(1); statement causes an
assert because the jump instruction points to the same address, which
is perfectly legal.

Addend was not handled correctly in several reloc types.

Add ADD32/64 + SUB32/64 relocations, for some reason the compiler
I use likes to add them.
 2022-03-23 17:56:54 +08:00
zhuyanlin
5665b7a585 arch:lib_atomic: remove and fix gcc warning declaration-mismatch 
Remove GCC ignored warning and fix

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-18 13:35:42 +08:00
Huang Qi
69cfe8d626 arch/arm: Support setjmp/longjmp for all socs 
After check the official specification of ARM ISA
and Thumb ISA, the arch_setjmp_thumb.S are written
by arm unified assembly language,
so it easy to make it works for ARM and thumb ISA.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-09 17:13:21 +02:00
Huang Qi
c6e636a871 arch/risc-v: Save/Load float register in setjmp 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-09 10:15:54 +02:00
Huang Qi
cfff115f21 arm: Move setjmp to common place 
Since some Cortex A core supports thumb mode also,
thus they can share same implementation.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-08 21:00:29 +08:00
Masayuki Ishikawa
de95a8550f arch, board: Add thumb support to i.MX6 
Summary:
- This commit adds thumb support to i.MX6
- Also, applies the same coding style to arch_elf.c

Impact:
- i.MX6 only

Testing:
- Tested with sabre-6quad:smp (QEMU, Dev board)
- Tested with sabre-6quad:netnsh (QEMU)
- Tested with sabre-6quad:netknsh (QEMU, not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-02-25 10:51:12 +08:00
Masayuki Ishikawa
11731125ef libs: armv7-a: Add thumb support to arch_elf.c 
Summary:
- This commit adds thumb support to arch_elf.c

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (QEMU, not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-02-25 10:51:12 +08:00
zhuyanlin
1aedf30f38 libc:machine:xtensa: fix warning 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-24 22:13:46 +08:00
Xiang Xiao
928d52f315 libc/machine: Implement ARM aeabi_xxx API called by clang 
specified here:
https://developer.arm.com/documentation/ihi0043/latest

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-21 09:29:18 +01:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-20 20:10:14 +01:00
Peter Kalbus
6abdf73535 sim: Initial support on MacOS M1 and Linux AARCH64 based hosts. 2022-02-17 09:35:09 +08:00
Oki Minabe
c1ea37742b fix arm FPSCR typos in comments. 2022-02-17 01:08:11 +08:00
Xiang Xiao
5f67662c63 libc/sim: Rename arch_setjmp[64].S to arch_setjmp_x86[_64].S 
to follow other arch/x86 arch/x86_64 convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-16 12:23:16 +08:00
YAMAMOTO Takashi
021b1a6bfb libs/libc/machine/sim/arch_elf64.c: Implement R_X86_64_PC64 
This relocation type is often found in eh_frame with -mcmodel=large
 2022-01-31 11:38:59 +08:00
zouboan
74aeb5d0c5 port nuttx to sparc-v8 commit 
includes following parts:
add support of sparc in arch/Kconfig
add support of sparc in boards/Kconfig
add sparc dir in arch, add sparc dir in boards
add support of sparc in libs/libc/machine
modify all the coding style problem about saprc
 2022-01-17 09:09:29 -03:00
chao.an
8c35d31808 Kconfig: Remove CONFIG_ prefix from config definition 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-07 13:16:18 +08:00
Huang Qi
c2e8c92b25 arch/risc-v: Refine Toolchain.defs 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-12-28 00:30:10 -06:00
Petro Karashchenko
3ccb657dc2 nuttx: remove space befone newline in logs 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-27 21:01:19 -06:00
Petro Karashchenko
67d8a82393 Kconfig: fix non-string default values uniformity 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-20 00:10:57 +01:00
Petro Karashchenko
51a2db6ffc Kconfig: improve uniformity 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-14 07:32:48 -06:00
anjiahao
80d32edbe1 libc/str:add strlcat to libc 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2021-11-26 15:24:35 -03:00
Xiang Xiao
bec1b0bc92 Revert "libc: Implement fesetround & fegetround for arm" 
Since the toolchain provide the implementation now.
This reverts commit fe992a5b6c.
 2021-11-10 14:35:53 -03:00
zhuyanlin
5a4140f020 arch:xtensa: add setjmp xtensa function 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-06 07:39:27 -05:00
zhuyanlin
cfcff5f570 libc:machine:xtensa:add xtensa libc implement 
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-11-06 07:39:27 -05:00
Jiuzhu Dong
ee29175811 libc/machine: add config LIBC_ARCH_MEMCHR 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-11-01 12:44:02 +01:00
Alin Jerpelea
4e5a9b168a libs: libc: armv8-m: revert to original license 
Revert to the BSD Arm lincese

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-09-02 21:56:05 +08:00
zhuyanlin
e01e5f5008 libc:machine: add atomic_load/store/exchange API 
Add atomic_load/store/exchange API

Change-Id: I6196b077d1e76cd1e0506ee66e2885e541525eb1
 2021-08-30 11:10:11 +08:00
zhuyanlin
3da0bb7829 libc:machine: add common atomic operation. 
Add common atomic operation.

Change-Id: I9f6b891f1406d54871a3f50c217a1029b434d2e8
 2021-08-28 13:17:30 -03:00
jordi
f3af6edf93 Kconfig: add quotes in source to clean warnings from setconfig 
To avoid the setconfig warning "style: quotes recommended around xxx in
source xxx"
 2021-07-23 02:32:19 -07:00
Nathan Hartman
ce20211357 Fix various typos in comments and documentation 
Fix typos in these files:
    * Documentation/components/drivers/character/foc.rst
    * Documentation/guides/cpp_cmake.rst
    * Kconfig
    * arch/arm/src/imxrt/imxrt_lpspi.c
    * arch/arm/src/kinetis/kinetis_spi.c
    * arch/arm/src/kl/kl_spi.c
    * arch/arm/src/lpc31xx/lpc31_spi.c
    * arch/arm/src/nrf52/nrf52_radio.h
    * arch/arm/src/s32k1xx/s32k1xx_lpspi.c
    * arch/arm/src/stm32/Kconfig
    * arch/arm/src/stm32/stm32_adc.c
    * arch/arm/src/stm32/stm32_foc.c
    * arch/arm/src/stm32/stm32_foc.h
    * arch/arm/src/stm32/stm32_pwm.c
    * arch/arm/src/stm32/stm32_spi.c
    * arch/arm/src/stm32f0l0g0/stm32_spi.c
    * arch/arm/src/stm32f7/Kconfig
    * arch/arm/src/stm32f7/stm32_spi.c
    * arch/arm/src/stm32h7/Kconfig
    * arch/arm/src/stm32h7/stm32_allocateheap.c
    * arch/arm/src/stm32h7/stm32_fmc.c
    * arch/arm/src/stm32h7/stm32_fmc.h
    * arch/arm/src/stm32h7/stm32_pwm.c
    * arch/arm/src/stm32h7/stm32_qspi.c
    * arch/arm/src/stm32h7/stm32_spi.c
    * arch/arm/src/stm32l4/stm32l4_pwm.c
    * arch/arm/src/stm32l4/stm32l4_spi.c
    * arch/arm/src/stm32l5/Kconfig
    * arch/arm/src/stm32l5/stm32l5_spi.c
    * arch/renesas/src/rx65n/rx65n_dtc.c
    * arch/renesas/src/rx65n/rx65n_usbdev.c
    * arch/risc-v/src/rv32m1/rv32m1_serial.c
    * boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
    * boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32h7/nucleo-h743zi2/README.txt
    * boards/risc-v/rv32m1/rv32m1-vega/README.txt
    * boards/sim/sim/sim/scripts/Make.defs
    * drivers/1wire/1wire.c
    * drivers/1wire/1wire_internal.h
    * drivers/lcd/Kconfig
    * drivers/syslog/ramlog.c
    * fs/fat/Kconfig
    * libs/libc/debug/Kconfig
    * libs/libc/machine/Kconfig
    * libs/libc/stdio/lib_libvsprintf.c
    * libs/libc/stdlib/lib_div.c
    * libs/libc/stdlib/lib_ldiv.c
    * libs/libc/stdlib/lib_lldiv.c
    * libs/libdsp/lib_observer.c
 2021-07-04 11:23:26 -05:00
McKay Ransom
863834057b Renesas/RX: add RX setjmp, ARCH_RENESAS_RX, and RX65N ioctl 2021-06-30 23:01:57 -05:00
Huang Qi
fe992a5b6c libc: Implement fesetround & fegetround for arm 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2021-06-24 08:47:34 -03:00
Xiang Xiao
39fc9325cf arch/arm: Replace "b lr" or "mov pc, lr" with "bx lr" 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-05 05:50:14 -07:00
Xiang Xiao
dd1d980c3a arch/sim: Move setjmp/longjmp to libc/machine/sim 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-05 09:00:42 -03:00