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20 Commits

Author SHA1 Message Date
Gregory Nutt
eba03c2590 Math library: Leverage optimized ARM functions from BSD license ARM file. 2017-01-19 09:37:33 -06:00
Gregory Nutt
0ca999e119 Make some spacing comply better with coding standard 2015-10-06 16:23:32 -06:00
Gregory Nutt
6b7a0cb3b8 Revert commit b80e8be652dfa52e97daa65aa3e550cf31cb2409 2015-04-12 06:26:50 -06:00
Gregory Nutt
9ece96b6d3 Remove all traces of CONFIG_ARMV7M_STACKCHECK 2015-04-11 10:01:44 -06:00
Gregory Nutt
9bcdf974a0 Add new common lazy FPU state saving option for ARMv7-M. Not yet verified 2015-03-06 08:26:43 -06:00
Gregory Nutt
639fe6c297 Armv7-M: Remove Px4-only setting of stack to 0xff. This is incompatible with standard NuttX stack montitoring logic 2015-01-22 10:09:10 -06:00
Gregory Nutt
831167f806 Add support for run time stack checking for the STM32. From David Sidrane 2014-12-26 08:30:42 -06:00
Gregory Nutt
e11679acf8 Rename CONFIG_NUTTX_KERNEL to CONFIG_BUILD_PROTECTED; Partially integrate new CONFIG_BUILD_KERNEL 2014-08-29 14:47:22 -06:00
Gregory Nutt
2ec0ab3b5e 3rd time is a charm. Max is right, the initial priority setting should be NVIC_SYSH_PRIORITY_MIN 2014-07-24 16:51:07 -06:00
Gregory Nutt
1366ce0a02 Oops, should have been NVIC_SYSH_PRIORITY_DEFAULT 2014-07-24 16:42:15 -06:00
Gregory Nutt
5e19807250 Correct the initial value of the BASEPRI register. This was apparently never being initialized. From Max 2014-07-24 15:37:13 -06:00
Gregory Nutt
3855ce04e8 Beginning of high priority nested interrupt support for the ARMv7-M family 2013-12-21 11:03:38 -06:00
patacongo
d455b94545 Fix more compile errors and warnings introduced in recent commits 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5744 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-15 01:32:47 +00:00
patacongo
dd6cc9caee Fix a compile error introduced in last commit 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5743 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-15 00:27:26 +00:00
patacongo
e9040a2f9d Switch to user-mode before starting a new task 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5742 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-14 22:44:06 +00:00
patacongo
a2ecc7083f More Cortex-M0/NUC120 fixes 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5670 42af7a65-404d-4744-a932-0658087f49c3
 2013-02-25 18:36:25 +00:00
patacongo
bc69dc2c5a Rename _TCB to struct tcb_s 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5610 42af7a65-404d-4744-a932-0658087f49c3
 2013-02-04 18:46:28 +00:00
patacongo
30d1159097 More logic to use BASEPRI to control interrupts -- still doesn't work 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5547 42af7a65-404d-4744-a932-0658087f49c3
 2013-01-22 14:37:17 +00:00
patacongo
6e2a5140fb Incoporate new ARMv7-M exception handling logic contributed by Mike Smith 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4413 42af7a65-404d-4744-a932-0658087f49c3
 2012-02-22 18:14:18 +00:00
patacongo
f93b962f28 Name change: Change Cortex-M3 naming to ARMv7-M naming so support Cortex-M4 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3846 42af7a65-404d-4744-a932-0658087f49c3
 2011-08-05 21:57:49 +00:00