This Knob will cycle through the values from
low to high. To avoid damaging the crystal.
We want to use the lowest setting that gets
the OSC running. See app note AN2867
This Knob will cycle through the correct*
values from low to high. To avoid damaging
the crystal. We want to use the lowest setting
that gets the OSC running. See app note AN2867
*It will take into account the rev of the silicon
and use the correct code points to achive the drive
strength. See Eratta ES0392 Rev 7 2.2.14 LSE oscillator
driving capability selection bits are swapped.
With TrustZone support in armv8-m the bit-fields in EXC_RETURN have been
extended. Bit 6 ('S') now specifies whether the interrupted program was
running in the Non-Secure (S=0) or Secure (S=1) security state.
Furthermore, Bit 0 ('ES' - Exception Secure) specifies the
security state athe exception is taken to (0: Non-Secure, 1: Secure).
When NuttX is run together with TrustedFirmware-M as the application in
the non-secure world both the S and the ES bits have to be set to '0'.
For armv8-m those are also the correct values if TrustZone is not
implemented on the respective MCU or if it is disabled.
Signed-off-by: Michael Jung <mijung@gmx.net>
This seems to fix esp32_readdata_encrypted() with spiram "buffer".
Note: I'm not sure if this is the right fix or not.
I couldn't find any documentation about Cache_Flush.
Summary:
- This commit applies armv7-m signal handling logic
Impact:
- armv6-m signal handling
Testing:
- Tested with ostest with the following configs
- raspberrypi-pico:nsh, raspberrypi-pico:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
IRQs cannot be individually disabled on the eZ80, so using
`up_disable_irq()` had no effect. This left the IRQ handler being
constantly triggered without the lower half handler running.
The macro for EMAC stats was incompatible with Clang. The simplified
form gives identical results under ZDS-II.
The MII clock speed must be set before trying to read MII registers.
It's now done before resetting the PHY using the Mode Control Register.
MII initialization waited on the auto-neogotiate restart bit being set
but PHY hardware is frequently fast enough to have cleared the bit
before the first read of it. It now instead just waits on auto-negotiate
completing. The MII poll loop now uses `up_mdelay` because it was far
too fast at 50MHz using a busy loop, giving time for a link to be
established.
Bad packets are now processed enough to release their buffers back to
the EMAC hardware.
A few typos, unused variables, and other miscellaneous issues were also
fixed.
Summary:
- This commit adds 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
- Now NuttX spinlock uses WFE/SEV to reduce power consumption
- Also, modify a comment on rp2040
Impact:
- rp2040 only
Testing:
- Tested with raspberrypi-pico:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
You can find them used in the ROM version of memcpy.
While it might be controversial if it's a good idea to use the ROM version
of these functions, it's nicer to support more instructions here anyway.
Summary:
- In the previous implementation, the build system stops if
PICO_SDK_PATH is not set.
- However, this behavior is not good for CI. Because the path
is only used to generate a flash image.
- This commit fixes this issue
Impact:
- rp2040 only
Testing:
- Tested with and without PICO_SDK_PATH
The GPIO example was also extended to include testing an interrupt pin.
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
This commits adds support for the ESP32-C3 IO Mux and GPIO Matrix. It
also includes necessary board logic to run the GPIO example with 2
outputs.
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This change reflects that the geometry isn't related to the largest
allocatable unit on the platform.
Calls to read and write block devices are also affected and have
been updated.
Check if all messages were transferred, if not, return -ENXIO.
This is particularly useful when the slave returns an unexpected NAK,
the application code should catch the error to avoid failing silently.
Summary:
- This commit fixes a compile warning if CONFIG_ARCH_INTERRUPTSTACK is set
Impact:
- None
Testing:
- Built with esp32-devkitc:smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Recently I noticed that ESP32-DevKitC-32D suddenly stops
during receiving ping packets from PC after 10-20mins
- Actually, sometimes memory leak happened when some device
sent a big broadcast packet periodically on the network
- This commit fixes this issue by calling esp_wifi_free_eb()
in the case that the packet exceeds WLAN_BUF_SIZE.
- Also, this commit applies the same logic in the case that
the Wi-Fi interface is down
Impact:
- None
Testing:
- Tested with esp32-devkitc:wapi
Suggested-by: YAMAMOTO Takashi <yamamoto@midokura.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit introduces driver-specific spinlock in cxd56_serial.c
to improve performance
Impact:
- SMP only
Testing:
- Tested with spresense:wifi and spresense:wifi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit changes spinlock APIs (spin_lock_irqsave/spin_unlock_irqrestore)
- In the previous implementation, the global spinlock (i.e. g_irq_spin) was used.
- This commit allows to use caller specific spinlock but also supports to use
g_irq_spin for backword compatibility (In this case, NULL must be specified)
Impact:
- None
Testing:
- Tested with the following configurations
- spresnse:wifi, spresense:wifi_smp
- esp32-devkitc:smp (QEMU), sabre6-quad:smp (QEMU)
- maxi-bit:smp (QEMU), sim:smp
- stm32f4discovery:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit fixes style warnings under max32660
- Also fix compile errors in max32660_gpio.c with CONFIG_DEBUG_GPIO_INFO=y
Impact:
- None
Testing:
- Built with max32660-evsys:nsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- In the previous imxrt_enet.c, imxrt_enet.c assumed that
CONFIG_NET_ETH_PKTSIZE includes the ethernet CRC (4bytes)
- However, most of the driver implementation explicitly
add CONFIG_NET_GUARDSIZE for the CRC to the internal buffer
- This commit conforms to such rules
Imapct:
- No impact
Testing:
- Tested with iperf with imxrt1060-evk
- NOTE: need to add the following configs
+CONFIG_EXAMPLES_IPERF=y
+CONFIG_EXAMPLES_IPERFTEST_DEVNAME="eth0"
+CONFIG_IOB_NBUFFERS=128
+CONFIG_NET_ETH_PKTSIZE=1514
+CONFIG_NET_GUARDSIZE=4
+CONFIG_RR_INTERVAL=200
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Port C was not working because the GPIO pin count was
wrong. The 48 pin packages has 34 GPIO (Not counting PH0 & PH1)
It is GPIOA GPIO B (sans PB11) and GPIOC PC13-PC15
The calls via RTC API weren't fast enough for the edge case
of minimum counter value, resulting in the timer never
expiring as the counter had already passed the compare value.
This now uses direct register access functions and also
gets the latest counter value in edge case.
This function is already declared in include/nuttx/init.h include this
file instead.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Don't declare riscv_addregion if CONFIG_MM_REGIONS is < 1, so we won't
have to provide a dummy stub for every chip.
Also rename the function from up_addregion to riscv_addregion since it's
not exported outside the arch directory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
The MCAN driver private structure has been renamed to struct sam_mcan_s,
but some functions reference sam_can_s. There are missing defines
of return variable in some functions.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Summary:
- This commit fixes a compile error in imx_enet.c
with CONFIG_DEBUG_ASSERTIONS=y
Impact:
- None
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit fixes imx_enet.c if CONFIG_IMX_ENET_NTXBUFFERS=1
- Also adds some ninfo() debug messages
Impact:
- imx_enet.c only
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Since imx_enet.c is based on imxrt_enet.c and still under debugging,
the differences should be minimum to keep tracking the changes
Impact:
- None
Testing:
- Tested with sabre-6quad:netnsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
The static memory is now divided at almost the middle to not override
the ROM data. The old 0x28000 will take all of what's left for heap
region1.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Summary:
- This commit fixes compile errors in esp32_spiflash.c and
esp32_wifi_adapter.c with CONFIG_SMP=y
Impact:
- SMP only
Testing:
- Tested with esp32-devkitc:wapi
- NOTE: the following configs need to be added.
+CONFIG_SMP=y
+CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
+CONFIG_SMP_NCPUS=2
+CONFIG_SPINLOCK_IRQ=y
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
The stm32f412 was not a clean port. This is one step to fix
it. The shortcuts taken has caused more wasted hours finding
bad pin mappings then doing the job correctlry to begin with.
stm32:Kconfig Add CAN2 on STM32F412
SMP was broken because the ROM memory wasn't set correctly. Some
regions were shared with the ROM code.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Requiring the size to be a multiple of 3 is a very strange restriction.
It doesn't even work with the default value of SPI_SLAVE_BUFSIZE.
I guess it was a typo.
The original assertion was wrong because:
* cpuint numbers for edge interrupts are not dense
(while ESP32_CPUINT_NEDGEPERIPHS is 4, EPS32_CPUINT_EDGESET is not 0xf.)
* This function is used for level interrupts too
This bug made certain values of DRIVE setting
to be wrongly applied (which can be dangerous
under certain situations since for example H0D1
was mapped to H0H1).
1. when sending a message in a group fails, exit immediately
2. when catch I2C error interrupt, close interrupt
3. clear clock configuration when deinit I2C
4. free I2C interrupt when deinit I2C
add support to attach the devices via HCI TTY to Bluetooth Host
Reference:
drivers/wireless/bluetooth/bt_uart_shim.c
Signed-off-by: chao.an <anchao@xiaomi.com>
