Gregory Nutt
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9fcbd8879a
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SAMA5 GMAC and GMII support is code complete and ready for test
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2013-09-27 13:12:04 -06:00 |
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Gregory Nutt
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f519f94926
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Networking: Fix backward conditional in test to see if address is in ARP table. From Max Holtzberg
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2013-09-27 08:27:35 -06:00 |
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Gregory Nutt
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fbd09bd75f
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Beginng of support for GMII/RGMII PHYs
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2013-09-26 15:55:21 -06:00 |
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Gregory Nutt
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48f1227fbf
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SAMA5 GMAC: Initial driver check-in is just the EMAC driver forced to compile with the GMAC register definitions
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2013-09-26 10:35:52 -06:00 |
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Gregory Nutt
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9dd0680f0e
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SAMA5: Completes GMAC register definition header file
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2013-09-26 09:13:14 -06:00 |
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Gregory Nutt
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5f4682c874
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SAMA5 EMAC: Need to pace RX and TX because and RX can result in a TX; Process TX interrupt events before TX interrupt events for the same reason
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2013-09-25 14:22:35 -06:00 |
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Gregory Nutt
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d53a0189f7
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SAMA5 EMAC: Add some need D-Cache Flush/Invalidate operations. Add support for CONFIG_NET_DUMPPACKET
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2013-09-25 11:51:49 -06:00 |
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Gregory Nutt
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ea4c8bbf68
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Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
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2013-09-25 11:50:31 -06:00 |
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Gregory Nutt
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52b0a16cd3
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Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
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2013-09-25 11:50:05 -06:00 |
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Gregory Nutt
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694080ba47
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Fix badly applied patch to ENCX24J600
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2013-09-25 08:26:56 -06:00 |
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Gregory Nutt
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d979859754
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SAMA5 UDPHS: Dont' reject read request submissions while stalled. That causes an infinite loop. When stalling, cancel all pending write requests, but cancel only a reqd request if it is in progress. It will be immediately requeued
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2013-09-24 15:06:17 -06:00 |
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Gregory Nutt
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5783fec78b
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Comment out assertion that apparently fires inappropriately
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2013-09-24 15:01:25 -06:00 |
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Gregory Nutt
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245f5ad32d
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Slightly improved debug output
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2013-09-24 13:47:03 -06:00 |
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Gregory Nutt
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f0ca9c2a8d
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Stack monitor fixes
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2013-09-24 12:14:52 -06:00 |
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Gregory Nutt
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a8461747b9
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Standardize stack checking interface
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2013-09-24 11:45:13 -06:00 |
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Gregory Nutt
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7c767c4ebe
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SAMA5 UDPHS: Minor clean-up of STALL logic
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2013-09-23 18:10:41 -06:00 |
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Gregory Nutt
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a070e748fd
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SAMA5 HSMCI: Disable TX DMA. it is not reliable
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2013-09-23 13:54:32 -06:00 |
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Gregory Nutt
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d167a09c74
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SAMA5 HSMCI DMA clean-up. There are still some issues
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2013-09-23 11:25:39 -06:00 |
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Gregory Nutt
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306a8743e0
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Cosmetic changes to comments and coding style fixes
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2013-09-22 14:48:22 -06:00 |
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Gregory Nutt
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b2e3a95565
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Un-neccesary, cosmetic changes to label names and comments
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2013-09-22 08:54:06 -06:00 |
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Gregory Nutt
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a768f32532
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SAMA5 OHCI: Back out a change, the real root cause was a bug in the cache logic so the hack is no longer necessary
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2013-09-22 07:53:51 -06:00 |
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Gregory Nutt
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d1ac44242f
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ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations
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2013-09-21 15:47:00 -06:00 |
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Gregory Nutt
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da37aa6413
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SAMA5 OHCI: Fix some strange Dcache problems that I still don't understand; end address on cache operations is end+1, not end
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2013-09-21 12:21:10 -06:00 |
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Gregory Nutt
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c9050ae5fd
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ARMv7-A: Clarify end address paramet in cache operations: It is the end+1 address, not the end address
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2013-09-21 12:16:34 -06:00 |
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Gregory Nutt
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f3d56e8695
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SAMA5 OHCI: Fix some problems with D-Cache coherency and physical addressing related to interrupt endpoints
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2013-09-20 15:22:09 -06:00 |
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Gregory Nutt
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f72ad05d0f
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SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why?
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2013-09-19 16:10:46 -06:00 |
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Gregory Nutt
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07cca4b318
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SAMA5 EHCI: Fix bits being clobbered in PORTSC on hand-off to OHCI. OHCI: Fix some more trace configuration issues. Both: Don't muck with SFR port selection bits once they have been initialized
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2013-09-19 10:52:33 -06:00 |
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Gregory Nutt
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f7436ee22f
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More USB host trace conditional compilation problems
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2013-09-19 09:08:55 -06:00 |
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Gregory Nutt
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48ed2b88d3
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Fix inconsistency in USB host tracing definitions
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2013-09-19 08:46:33 -06:00 |
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Gregory Nutt
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ef9032b4d6
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SAMA5: Add support for the FPU OS test
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2013-09-18 10:35:03 -06:00 |
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Gregory Nutt
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71354eb2c3
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LPC17xx SPI: Remove an unused static prototype that caused a compile time warning
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2013-09-17 17:14:08 -06:00 |
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Gregory Nutt
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425c26d27a
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SAMA5 EMAC: Changes from early debug sessions. Still a way to go
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2013-09-17 15:52:19 -06:00 |
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Gregory Nutt
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2c63995099
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SAMA5 EMAC: Resolve issues with DUAL PHY support needed for both EMAC and GMAC peripherals. EMAC driver is now code complete and builds without complaint
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2013-09-17 10:55:13 -06:00 |
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Gregory Nutt
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82cd614b66
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Add prefex ETH0 to all PHY configurations to support multiple NICs
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2013-09-17 10:45:07 -06:00 |
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Gregory Nutt
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a634dc0f33
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SAMA4 EMAC: Remove some editor garbage that ended up in the last commit
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2013-09-16 18:04:38 -06:00 |
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Gregory Nutt
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ec499a3aa8
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SAMA5 EMAC: Add basic PHY logic
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2013-09-16 18:00:21 -06:00 |
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Gregory Nutt
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2a10afb311
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SAMA5 EMAC: Packet transmission logic
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2013-09-16 14:58:11 -06:00 |
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Gregory Nutt
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97a0e3b74b
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SAMA4 EMAC: Add basic interrupt handling logic
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2013-09-16 13:57:57 -06:00 |
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Gregory Nutt
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f267cea5b6
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SAMA5 EMAC: Incremental progress. Still not code complete
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2013-09-16 11:36:12 -06:00 |
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Gregory Nutt
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47d4b41bad
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Freescale Kinetis KL25Z PIT and TPM module register definitions
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2013-09-15 17:00:50 -06:00 |
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Gregory Nutt
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ec03861315
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SAMA4 EMAC buffer allocation logic
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2013-09-15 14:26:25 -06:00 |
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Gregory Nutt
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45e4425687
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SAMA5 Ethernet: Add support for PHY interrupts
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2013-09-15 12:24:42 -06:00 |
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Gregory Nutt
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7c13790901
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SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC
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2013-09-14 08:19:36 -06:00 |
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Gregory Nutt
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7b6a1a57eb
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SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver
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2013-09-13 15:04:46 -06:00 |
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Gregory Nutt
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64825db9c2
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STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae
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2013-09-13 12:45:33 -06:00 |
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Gregory Nutt
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e31f62e1b5
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STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier
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2013-09-13 11:45:32 -06:00 |
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Gregory Nutt
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1b17b8fbea
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Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier
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2013-09-13 11:20:10 -06:00 |
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Gregory Nutt
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363df90d81
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SAMA5 EMAC and GMAC: More additions to register definition files
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2013-09-13 03:35:56 -06:00 |
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Gregory Nutt
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91a065e9fc
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SAMA5: Beginning of EMAC and GMAC register definition header files
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2013-09-12 15:45:12 -06:00 |
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Gregory Nutt
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9f937bc0e4
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SAMA5D3x-EK README update
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2013-09-12 14:17:56 -06:00 |
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