Fix stm32_stdclockconfig for stm32u585xx to the extend that the
B-U585I-IOT02A board's clock tree can be configured. This board uses
the MSIS as PLL1's input clock and the LSE to autotrim the MSIS.
It might be useful to store things in memory per CPU. The tricky part
is that all CPUs run the same code and see the same memory, so some
kind of centralized access is required.
For now, the structure contains the hart id.
Access to the structure elements is provided via sscratch, which is
unique for every hart!
- Add config "ARCH_USE_S_MODE" which controls whether the kernel
runs in M-mode or S-mode
- Add more MSTATUS and most of the SSTATUS register definitions
- Add more MIP flags for interrupt delegation
- Add handling of interrupts from S-mode
- Add handling of FPU from S-mode
- Add new context handling functions that are not dependent on the trap
handlers / ecall
NOTE: S-mode requires a companion SW (SBI) which is not yet implemented,
thus S-mode is not usable as is, yet.
glibc 2.34 changed the dynamic linker behavior during the startup
process, which makes the previous "__init_array_start" replacement trick
non-effective.
Now the dynamic linker parses the constructors/destructors information
from the DYNAMIC segment of the program.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
When process a is switched to process b, the address environment is
swapped with a call to group_addrenv(). The stack upon entry will be
a's, and upon exit b's. This will fail, so a neutral stack is required,
either a kernel stack or an IRQ stack.
Infrastructure for an IRQ stack is already in place, so give a hint
that an interrupt stack should be provided if address environments
are enabled.
This is required to avoid the interface header (syscall.h) depending on
the xtensa_swi.h header from the implementation
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
## Summary
`bl602_spi_cmddata()` implements SPI Cmd/Data `SPI_CMDDATA()` for only 3 LCD drivers: ST7735, ST7789 and GC9A01.
This patch removes the check for LCD drivers, so that SPI Cmd/Data will work for all LCD drivers.
More details: https://github.com/apache/incubator-nuttx/pull/5898
## Impact
This change impacts LCD drivers that call `SPI_CMDDATA()`.
Previously `SPI_CMDDATA()` would fail with `ENODEV` for LCD drivers other than ST7735, ST7789 and GC9A01.
After patching, `SPI_CMDDATA()` will work correctly with all LCD drivers.
## Testing
We tested with LVGL and ST7789 on PineCone BL602:
- [Testing with LVGL](https://github.com/lupyuen/st7789-nuttx#run-lvgl-demo)
As for regular SPI Devices that don't require SPI Cmd/Data, we tested `CONFIG_SPI_CMDDATA=y` with Semtech SX1262 SPI Transceiver on PineCone BL602:
- [Testing Cmd/Data](https://github.com/lupyuen/incubator-nuttx/releases/tag/release-2022-03-30)
The SPSR is used to store the current value of the CPSR when an exception
is taken so that it can be restored after handling the exception.
Each exception handling mode can access its own SPSR.
User mode and System mode do not have an SPSR because they are not
exception handling modes.
Signed-off-by: chao.an <anchao@xiaomi.com>
## Summary
To control the Data/Command Pin on ST7789 SPI Display, the SPI Driver flips the MISO Pin as though it was a GPIO.
To implement this on BL602, we reconfigure MISO from SPI Pin to GPIO Pin on the fly inside `bl602_spi_cmddata()`.
When the SPI Port is deselected (after the SPI operation), we revert MISO back from GPIO Pin to SPI Pin. We implement this inside `bl602_spi_select()`.
[More Details Here](https://github.com/lupyuen/st7789-nuttx#spi-cmddata)
## Impact
This change impacts 3 LCD drivers that call `SPI_CMDDATA()`: ST7735, ST7789, GC9A01.
Previously the BL602 SPI Driver would fail with "SPI cmddata not supported" when the above drivers are used.
After the change, the above drivers will set the LCD Data/Command Pin correctly.
## Testing
We tested this implementation of SPI Cmd/Data with NuttX ST7789 Driver and a Logic Analyser on PineCone BL602:
- [Testing with Logic Analyser](https://github.com/lupyuen/st7789-nuttx#spi-cmddata)
We also tested LVGL with ST7789 on PineCone BL602:
- [Testing with LVGL](https://github.com/lupyuen/st7789-nuttx#run-lvgl-demo)
As for regular SPI Devices that don't require SPI Cmd/Data, we tested `CONFIG_SPI_CMDDATA=y` with Semtech SX1262 SPI Transceiver on PineCone BL602:
- [Testing Cmd/Data](https://github.com/lupyuen/incubator-nuttx/releases/tag/release-2022-03-29)
As xtensa timer is common in all xtensa chips,
Use oneshot ops, implement a common xtensa oneshot timer.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
