GAEHWILER Reto
b9fba3edae
stm32h7 fix adc port to handle overrun and the DR's fifo, adapt adc driver
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* port didn't know about data-register fifo
* port didn't handle overrun condition
* driver could get stuck if interrupts were skipped due to saturation
2021-06-16 04:58:06 -07:00
Virus.V
69fce77718
risc-v/bl602: update firmware to fix undefined up_irq_* symbols when linking
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-15 23:25:16 -05:00
Dong Heng
60fb1adaca
riscv: Add inline IRQ process functions
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Remove functions from RISC-V chips.
2021-06-15 23:25:16 -05:00
Xiang Xiao
2e49e1bc5c
mtd: Add MTDIOC_FLUSH IOCTL like MTDIOC_XIPBASE
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since the old design reuse BIOC_FLUSH for
MTD device which make some confusion
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-15 13:26:45 -03:00
Sara Souza
2a7b97c0cd
risc-v/esp32-c3: Adds I2C polled support
2021-06-15 10:51:18 -05:00
Daniel P. Carvalho
4b351fc447
Adds PWM example to nucleo-g431kb board.
2021-06-14 18:45:04 -03:00
Liu Han
8eaaf6d462
risc-v/esp32c3: Support ESP32-C3 RSA accelerator
2021-06-14 15:03:11 -03:00
Yuichi Nakamura
9b8e81ebc1
arm/rp2040: Fix warnings when UART console is not used
2021-06-14 09:05:19 -03:00
Yuichi Nakamura
b860e3c4ad
arm/rp2040:USB device controller support
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Summary:
- Add Raspberry Pi Pico (RP2040) USB device controller support.
- Confirmed that CDC/ACM, MSC and these composite device are working.
- The current implementation have an unresolved issue and some workaround
for USB MSC SCSI driver is required.
See the comment in the patch "usbmsc: Add USBMSC_NOT_STALL_BULKEP for RP2040 workaround".
Impact:
- RP2040 only
Testing:
- Tested with Windows 10 and Ubuntu-18.04/20.04 as the USB host.
- Tested configurations:
- raspberrypi-pico:usbnsh
- raspberrypi-pico:usbmsc
- raspberrypi-pico:composite
2021-06-14 09:05:19 -03:00
Sara Souza
7300bc8f1c
xtensa/esp32: Adds I2C polled support.
2021-06-13 05:04:51 -05:00
Masayuki Ishikawa
bafac8b560
arch: k210: Fix stack coloring for the idle thread stack
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Summary:
- I noticed that stack coloring for the idle thread stacks does
not work due to the recent changes
- This commit fixes this issue
Impact:
- k210 only
Testing:
- Tested with both maix-bit (dev board) and QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-12 05:54:08 -05:00
Eero Nurkkala
1bce864ef7
mpfs: add i2c driver
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This adds mpfs i2c driver.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 21:03:42 -05:00
Daniel P. Carvalho
361703a881
Added basic support for nucleo-g431kb board.
2021-06-11 20:51:56 -05:00
Eero Nurkkala
fad34e04c4
mpfs: add spi driver
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This adds the SPI driver for the MPFS Icicle board.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 09:10:03 -05:00
Abdelatif Guettouche
96bcf7678b
risc-v/esp32c3_wifi_adapter.c: Remove a config that's only used in
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Xtensa chips.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-11 10:49:52 -03:00
Jiuzhu Dong
2fd25d7ea7
arch/armv7-a: Colorize the idle thread stack for other cpu(SMP)
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Keep previous modification.
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-06-11 01:26:50 -05:00
raiden00pl
d76f8ea04a
arch/arm/src/stm32/stm32_foc.c: add workaround for an issue found in STM32G4 family
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From G4 erratas: "ADC channel 0 converted instead of the required ADC channel"
2021-06-10 13:58:33 -03:00
raiden00pl
7c47f32a19
arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h: rename OPAMP pins to match the manual
2021-06-10 13:58:33 -03:00
raiden00pl
76824ba2a9
stm32g4xxxx_memorymap.h: remove invalid OPAMP1-6 definitions
2021-06-10 13:58:33 -03:00
raiden00pl
af0f2b4f37
stm32g4: add OPAMP defs
2021-06-10 13:58:33 -03:00
Alexander Vasiljev
9d0da9818c
arch/arm/src/stm32h7: qspi use indirect write instead indirect read without data.
2021-06-10 10:46:34 -05:00
Virus.V
7c20199a61
riscv/bl602:replace syslog to debugging log macros
2021-06-10 08:59:16 -05:00
Fotis Panagiotopoulos
2ef90786c8
setjmp.h: Added missing include.
2021-06-10 08:58:52 -05:00
Xiang Xiao
c0fdddc5d7
arch: Remove all go_nx_start from chip specifc source
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since the idle stack color is done in the common code now
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87
arch: Colorize the idle thread stack in an unified way
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
2021-06-10 06:50:41 -07:00
Chen Wen
dbf9c87a42
risc-v/esp32c3: Support ESP32-C3 RTC driver
2021-06-10 09:33:04 -03:00
Alexander Vasiljev
45672c269d
Make: use gcc as LD
2021-06-10 03:43:18 -07:00
Peter van der Perk
3b94669b7f
FlexCAN Fix TX abort process
2021-06-09 13:34:13 -05:00
Xiang Xiao
6576306bca
arch: Rename xxx_getsp to up_getsp
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All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-09 10:20:02 -07:00
Juha Niskanen
939e547ca8
arch/arm/src/stm32l4: fix some printf format errors and warnings
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Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-06-09 11:52:33 -05:00
Xiang Xiao
5b2a17b892
Include assert.h in necessary place
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-08 13:06:08 -07:00
David Sidrane
131e2490c9
stm32f7:bbsram add assert header
2021-06-08 13:19:22 -05:00
David Sidrane
a1de902708
stm32h7:bbsram add assert header
2021-06-08 13:19:22 -05:00
unixjet
68f19a6290
risc-v/rv32m1: Basic port to rv32m1 ri5cy
2021-06-05 17:25:57 -03:00
Gustavo Henrique Nihei
0b3c2c7603
spi: Refactor SPI Slave interface prefix to sync with I2C Slave
2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
27782aca19
risc-v/esp32c3: Include missing debug.h header
2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
77dfb39260
risc-v/esp32c3: Uniformize references to CPU interrupt ID
2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
f53306f9af
risc-v/esp32c3: Ensure internal linkage of interrupt map
2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
a2bcffde73
risc-v/esp32c3: Remove unused macros
2021-06-04 23:26:13 +01:00
Abdelatif Guettouche
2d55f2659e
riscv/esp32c3: Add module text allocator.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
778e3ed4ad
arch/risc-v/rv32im/riscv_assert.c: Provide dummy definitions of dump
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functions when ARCH_STACKDUMP is not enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 12:20:18 -05:00
Abdelatif Guettouche
94ded7a695
arch/riscv/rv32im/riscv_assert.c: Fix preprocessor condition.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 12:20:18 -05:00
Janne Rosberg
7b882c3588
risc-v/mpfs: fix ext irq 1-12
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Handle irq numbers 1-12 correctly
2021-06-04 10:14:58 -05:00
Jani Paalijarvi
ebdc7a06b1
risc-v/mpfs: add MSTimer register offsets and bitmasks
2021-06-04 10:14:58 -05:00
Janne Rosberg
f7cbed0256
risc-v/mpfs: enable up_systemreset()
2021-06-04 10:14:58 -05:00
Janne Rosberg
ec11643394
risc-v/mpfs: add sysreg register defines
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This adds minimal set of sysreg defines for MPFS
2021-06-04 10:14:58 -05:00
Masayuki Ishikawa
386946ee54
arch: cxd56xx: Fix address mapping in cxd56_modtext.c
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Summary:
- I noticed that DEBUGASSERTION() happens when executing
an ELF application
- This commit fixes this issue by re-mapping the address
to SYSBUS in up_module_text_free()
Impact:
- None
Testing:
- Tested with spresense (both DEBUG_ASSERTIONS=n and y)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-04 01:40:37 -05:00
Masayuki Ishikawa
f0b689a063
arch: arm: Add select ARCH_HAVE_MODULE_TEXT to ARCH_CHIP_CXD56XX
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Summary:
- I noticed that make savedefconfig shows warnings regarding
'unmet direct dependencies (ARCH_HAVE_MODULE_TEXT)'
- This commit fixes this issue
Impact:
- None
Testing:
- Tested with spresense:wifi
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-04 01:40:37 -05:00
Jaroslav Beran
d13be4ea57
samv7/spi: Allow 16-bit word size in spi_send
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Signed-off-by: Jaroslav Beran <jara.beran@gmail.com>
2021-06-03 21:33:52 -05:00
Xiang Xiao
2e54df0f35
Don't include assert.h from public header file
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-03 08:36:03 -07:00