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3938 Commits

Author SHA1 Message Date
Gregory Nutt
b2bfebff23 SAMV7: Add configuration logic and clock setup for USB device 2015-03-21 07:28:59 -06:00
Gregory Nutt
7ebb54abaa SAMA5: Fix a typo in the Kconfig file 2015-03-21 06:22:04 -06:00
Gregory Nutt
a5831081ce SAMV7: Add USBHS register defintiion header file 2015-03-20 14:08:33 -06:00
Gregory Nutt
d64e8e6732 Include chip/sam_spi.h in sam_spi.h 2015-03-20 11:09:36 -06:00
Gregory Nutt
7242a6194c SAMA5D3: Fix typos in timer/counter header file. From Bob Doiron 2015-03-20 09:19:10 -06:00
Gregory Nutt
d877b1bd50 STM32 RTC lower-half: Fix some errors that cause compilation failures. From shilo.xyz 2015-03-19 12:56:47 -06:00
Gregory Nutt
08fcf035dd SAMV5 EMAC: A few more fixes. Neccessary but not sufficient 2015-03-19 08:54:50 -06:00
Gregory Nutt
256da4837e SAMV7 Ethernet: Fix an order problem that left RX and TX disabled 2015-03-18 18:07:07 -06:00
Gregory Nutt
dd50e03666 SAMV7: Add a sneak internal interface that will allow us to set the MAC address before NSH even starts 2015-03-18 17:23:40 -06:00
Gregory Nutt
6763128345 SAMV7: Updates to Ethernet driver based on comparison with Atmel sample code. Add configuration for other PHY GPIOs. Still no Ethernet interrupts 2015-03-18 15:55:00 -06:00
Gregory Nutt
714af6ebb8 SAMV7 Ethernet: Support getting IP address from the XULT AT24 EEPROM 2015-03-17 14:29:41 -06:00
Gregory Nutt
26923b39de SAMV7 EMAC: Fix range of MCK dividers 2015-03-17 11:19:46 -06:00
Gregory Nutt
42c33033a8 SAMV7: Use D-Cache clean/flush/invalidate by range in EMAC and XDMAC drivers 2015-03-17 09:28:27 -06:00
Gregory Nutt
fdbbab013b Break ARMv7E-M cache operations into separate files; Finish the unimplemented cache operations 2015-03-17 08:48:41 -06:00
Gregory Nutt
32aadd9cc2 SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling 2015-03-16 13:51:37 -06:00
Gregory Nutt
0abe4e701b SAMV7: Add Ethernet MAC register definition header file 2015-03-16 11:46:20 -06:00
Gregory Nutt
28ead380ea This commit enables HSMCI functionality in the SAMV71-XULT. TX DMA is, unfortunately, currently disabled. 2015-03-15 12:17:39 -06:00
Gregory Nutt
5fcdb09791 SAMA5: Fix a bug in SAMA5 HSMCI. The bitfield mask and shift values were reversed resulting in a trashed value for the number of blocks in the BLOCKR register. This was sufficient to prevent DMA writes from working. 2015-03-15 09:35:48 -06:00
Gregory Nutt
9e2587ffe9 SAMV7 XDMA: Fix a problem with invalidating the cache on RX DMA 2015-03-14 15:25:32 -06:00
Gregory Nutt
dd342bb4a7 EFM32: Add I2C driver. From Pierre-noel Bouteville 2015-03-14 14:47:53 -06:00
Gregory Nutt
3b0615ece8 SAMV7: More SDRAM logic. It does still does not work 2015-03-14 13:27:00 -06:00
Gregory Nutt
cc497202ed SAMV71-XULT: Add support for SDRAM (unverified) 2015-03-14 11:00:46 -06:00
Gregory Nutt
cbdaa0dc77 Include correct chip file 2015-03-14 09:15:11 -06:00
Gregory Nutt
867bd20f5c SAMV7: Add SDRAMC register definition header file 2015-03-14 09:13:51 -06:00
Gregory Nutt
9c5205142f SAMV7 HSMCI: Change system bus interfaces seems to eliminate DMA failures. 2015-03-13 14:35:36 -06:00
Gregory Nutt
0b64c51a13 Minor updates from initial debugging. 2015-03-13 13:46:27 -06:00
Gregory Nutt
db786ea654 SAMV7 HSMCI: Reading response registers at the wrong time can cause loss of response data. 2015-03-13 12:46:33 -06:00
Gregory Nutt
ad216583b7 SAMV7: Fix some cloning errors. SAMA5->SAM7 2015-03-13 10:38:10 -06:00
Gregory Nutt
74548a5ed4 Fix a typo in a Cortex-M7 address 2015-03-13 10:37:21 -06:00
Gregory Nutt
ce0021e753 STM32 serial: Make input hardware flow-control work with RX DMA. From Jussi Kivilinna 2015-03-13 07:18:21 -06:00
Gregory Nutt
6cb5b48300 STM32: Fix RX DMA setup for UART5. From Jussi Kivilinna. 2015-03-13 07:06:46 -06:00
Gregory Nutt
4580af6d0b SAMV7: Quick'n'dirty port of the SAMA5 HSMCI driver to the SAMV7 2015-03-12 18:03:41 -06:00
Gregory Nutt
743fd5ac50 SAMV71: Quick'n'dirty port of the SAMA5 SSC driver to the SAM7. The IP is compatible but there are still some DMA- and Cache-related issues that need to be worked out. 2015-03-12 16:00:38 -06:00
Gregory Nutt
da3233a527 SAMV71-XULT: Enable I2C and the I2C tool in the NSH configuration 2015-03-12 12:27:06 -06:00
Gregory Nutt
109b9910f6 SAMV7: Add TWI/I2C driver (untested) 2015-03-12 10:58:11 -06:00
Gregory Nutt
00a841c417 SAMV7: Add SPI header files and driver 2015-03-12 09:12:37 -06:00
Gregory Nutt
0b8248b33c stm32: usbdev: Fix stale initialization invalidating later NULL check. From Juha Niskanen 2015-03-12 08:08:50 -06:00
Gregory Nutt
9997fa77ad ARMv7-M MPU. Bad syntax will cause failure to write the correct value to the MPU_RASR register. From Juha Niskanen 2015-03-12 08:00:53 -06:00
Gregory Nutt
99f4e31b69 stm32_i2c: Add missing NULL check. From Juha Niskanen 2015-03-12 07:53:41 -06:00
Gregory Nutt
70e7dcba71 Bringing PPPD yet closer to the NuttX coding style 2015-03-11 18:47:04 -06:00
Gregory Nutt
90bc4b81ee SAMV7-XULT: Integrate button support and apps/examples/buttons into the NSH configuration 2015-03-11 14:41:58 -06:00
Gregory Nutt
3d60cc7768 SAMV7: Correct low-level console output 2015-03-11 14:39:32 -06:00
Gregory Nutt
ca8165dd10 SAMV71-XULT: Enable 64-bit floating point support 2015-03-11 12:30:14 -06:00
Gregory Nutt
da844f1a88 SAMV71-XULT: Switch to the ARM GNU tools for Embbeded tools that actually support Cortex-M7 2015-03-11 12:16:27 -06:00
Gregory Nutt
508d96b571 SAMV7-XULT: Enable I- and D-caches, correct polaty of LEDs 2015-03-11 11:23:19 -06:00
Gregory Nutt
65e34be9b4 Update COPYING file with special license requirements for PPPD 2015-03-11 09:14:15 -06:00
Gregory Nutt
834072815b SAMV71-XULT: Some bugfixes from early bring-up work 2015-03-10 16:11:28 -06:00
Gregory Nutt
fe1aaf76fc Tiva TimerLib: Fix a typo in peripheral waiting logic: gptm, not gpio. From Bradley Noyes 2015-03-10 12:16:40 -06:00
Gregory Nutt
426888efb5 SAMV7: Add logic to enable/disable TCMs 2015-03-10 11:32:05 -06:00
Gregory Nutt
36e88e504a SAMV7: Update floating point and TCM configuration options. Update TODO list. Update comments. Refresh a configuration 2015-03-10 07:50:32 -06:00
Gregory Nutt
26dec2c333 Cosmetic changes to conditional compilation 2015-03-09 18:14:31 -06:00
Gregory Nutt
4e306087af Remove some traiilng whitespace 2015-03-09 15:42:35 -06:00
Gregory Nutt
e39077775d Cortex-M7: Add cache operations 2015-03-09 15:42:07 -06:00
Gregory Nutt
d3033efa9c Cortex-M7: Add cache operations 2015-03-09 15:41:48 -06:00
Gregory Nutt
66d48615c6 SAMV7: Leverage XDMAC driver from the SAMA5D4. 2015-03-09 10:11:12 -06:00
Gregory Nutt
cfca6b08c5 SAMV71-XULT: Add support for on-board LEDs. Includes partial support for on-board buttons. Some corrections fo to egg-stk37000 and sam4e-ek discovered during leveraging. Add board READEM.txt file 2015-03-09 08:23:09 -06:00
Gregory Nutt
5515f26de4 SAMV7: Add GPIO interrupt support 2015-03-08 19:32:05 -06:00
Gregory Nutt
6fdbbe6c4b SAMV71: Add GPIO library support 2015-03-08 19:12:30 -06:00
Gregory Nutt
9cb9e8102c SAMV7: Add PIO register definition header file 2015-03-08 17:34:26 -06:00
Gregory Nutt
73bd97e537 SAMV71: Add pin mapping definitions 2015-03-08 13:24:32 -06:00
Gregory Nutt
55c5d04c84 SAMV71: Fix a few typos; Use factional value in BAUD calculation 2015-03-08 12:27:55 -06:00
Gregory Nutt
2cb3c03678 SAMV7: Add serial driver 2015-03-08 10:15:42 -06:00
Gregory Nutt
6c608a05c7 SAMV71: Add UART register definition header file 2015-03-08 08:42:22 -06:00
Gregory Nutt
fe629e76b3 EFM32 updates from Pierre-noel Bouteville 2015-03-08 07:12:47 -06:00
Gregory Nutt
967e8bbc7b SAMV71-XULT: Add heap allocation logic 2015-03-07 11:46:54 -06:00
Gregory Nutt
adbc25a05c SAMV7: Add interrupt-related logic 2015-03-07 11:16:44 -06:00
Gregory Nutt
b3403dee6a SAMV7: Add basic clock and timer ISR configuration logic 2015-03-07 10:32:47 -06:00
Gregory Nutt
839dd9baef SAMV71: Add EEFC register definition header file 2015-03-06 16:39:18 -06:00
Gregory Nutt
8cb93302e9 SAMV71: Add Supply Controller register definition header file 2015-03-06 15:27:51 -06:00
Gregory Nutt
3440c94861 SAMV71: Add PMC register definition header files 2015-03-06 14:58:13 -06:00
Gregory Nutt
36d161fc2b SAMV71: More updates on the way to a clean build. Still more to do to complete that journey 2015-03-06 12:13:09 -06:00
Gregory Nutt
4cde63eead Cortex-M7/SAMV71-XULT: Various fixes for building Cortex-M7 with SAMV71. 2015-03-06 10:53:57 -06:00
Gregory Nutt
d18ed4569c Add a bare bones framework that will do nothing more than support configuration for the Atmel SAMV71 Xplained Ultra board. Very much a work in progress. 2015-03-06 08:56:44 -06:00
Gregory Nutt
6cd282ccc2 Add new common lazy FPU state saving option for ARMv7-M. Not yet verified 2015-03-06 08:26:43 -06:00
Gregory Nutt
2d666e897b SAM3/4: Leverage some start-up logic from STM32 2015-03-05 17:45:13 -06:00
Gregory Nutt
eaecd27998 SAMV7: Add SAMV71 peripheral IDs and interrupt vector definitions 2015-03-05 16:34:22 -06:00
Gregory Nutt
4bbb561193 Fix typo in file name 2015-03-05 15:48:48 -06:00
Gregory Nutt
6c8366ef5f SAMV71: Add memory map header file 2015-03-05 15:47:29 -06:00
Gregory Nutt
58c7e16960 SAMV7 Kconfig: Add peripheral selections 2015-03-05 13:51:39 -06:00
Gregory Nutt
f573dab044 Make ARM build system Cortex-M7 ready 2015-03-05 11:25:27 -06:00
Gregory Nutt
eedd5e0bbb Add basic build directories and configuration logic for the SAMV7 family 2015-03-05 10:00:24 -06:00
Gregory Nutt
b5bfb6762d Fix some BBRAM return values (from David Sidrane). Also some MTD-related cosmetic changes 2015-03-05 08:08:11 -06:00
Gregory Nutt
404fef74d9 Fix two uses of DEBUG_COLORATION vs STACK_COLORATION (from David Sidrane). Also some corrected comments 2015-03-05 06:41:14 -06:00
Gregory Nutt
76007d28f5 Add support for dumping board-specific information on assertion. From David Sidrane 2015-03-04 07:00:29 -06:00
Gregory Nutt
38f250cde3 Add missing SPI callback functions to the STM32 SPI driver. From Freddie Chopin 2015-03-04 06:52:46 -06:00
Gregory Nutt
cb5cb96bc9 Fix issues when AES support was added for the STM32L1. From Juha Niskanen 2015-03-04 06:38:03 -06:00
Gregory Nutt
2fc99df452 Add support for new STM32L1 chip variant. From Juha Niskanen 2015-03-04 06:33:44 -06:00
Gregory Nutt
c880446962 STM32 BBSRAM driver updated by David Sidrane 2015-03-03 16:05:24 -06:00
Gregory Nutt
032155078b Adds architecture support for the STM32F372 and F373 (no board support yet). Only tested on STM32F373CC, but should work on the rest. Contributed by Marten Svanfeldt. 2015-03-02 10:33:42 -06:00
Gregory Nutt
beaf976626 arch/: board function prototypes are now in include/nuttx/board.h. Remove from architecture header file; Add inclusion of nuttx/board.h to all files referencing board functions 2015-02-27 17:19:38 -06:00
Gregory Nutt
94a3028c9e Tiva ADC: Drive updates from Calvin Maguranis 2015-02-25 13:38:22 -06:00
Gregory Nutt
234cc5b7bf SAM4CM free-running time: Change overflow type from uint16 to uint32. From Max Neklyudov. 2015-02-25 08:12:31 -06:00
Gregory Nutt
4435103316 Eliminate some warnings 2015-02-25 08:05:35 -06:00
sauttefk
15618613ab Fix SSI TX and RX legacy mapping of TM4C1294NC 2015-02-24 03:31:12 +01:00
Gregory Nutt
54c16a78ca STM32: Fix for compilation introduced by last backup RAM change. Not sure it it is correct, be now things do compile 2015-02-21 17:51:03 -06:00
Gregory Nutt
f0349fa24e Adds the ability to use the STM32F2 and STM32F4 Battery Backedup SRAM in the file system. With an option to Save Panic context to one of the files. From David Sidrane. 2015-02-21 15:15:51 -06:00
Gregory Nutt
1106469a7c Changes to support fully write protecting the backup domain. N.B. stm32_pwr_enablebkp did not account for the delay from enable to the domain being writable. The KISS solution is a up_udelay. A more complex solution would be a negated write test with restore. From David Sidrane. 2015-02-21 14:53:33 -06:00
Gregory Nutt
0260620fdc Tiva GPIO clean-up by Calvin Maguranis 2015-02-20 13:40:25 -06:00
Gregory Nutt
f79306d9e6 Tiva: Move GPIIO prototypes out of arch/arm/include/tiva/irq.h to arch/arm/tiva/tiva_gpio.h where they belong 2015-02-20 13:31:43 -06:00
Gregory Nutt
cded7ea682 Fix some time value changes; mostly changing greater than 1000000000 to greater than or equal to 1000000000. From Juha Niskanen 2015-02-20 07:07:36 -06:00
Gregory Nutt
63ab39b274 VFS: The inode unlink method should not be support if operations on the root pseudo-filesystem are disabled. 2015-02-18 09:34:58 -06:00
Gregory Nutt
e2336a07bb The RTC ioctl() method is now a configuration option 2015-02-18 08:23:10 -06:00
Gregory Nutt
f94e601981 Add an IOCTL method to the RTC interface 2015-02-18 08:05:31 -06:00
Gregory Nutt
e07d2abcbd Tiva ADC: Should not have its own ADC debug. Should use the common Analog debug 2015-02-17 14:54:56 -06:00
Gregory Nutt
c81412f822 Tiva: Updated files to allow for ADC triggering by the timer. I’ve cleaned up some parts of the ADC code, too, and fleshed out the PWM triggering ioctl. From Calvin Maguranis 2015-02-17 13:50:30 -06:00
Gregory Nutt
af31df7396 Tiva SPI: Cosmetic improvements 2015-02-17 12:45:47 -06:00
Gregory Nutt
3424796c71 EFM32 USB Device: Is not basically functional with this change. From Pierre-noel Bouteville. 2015-02-16 15:45:49 -06:00
Gregory Nutt
e2bde7037f Fix a compilation error. From Macs Neklyudov 2015-02-16 14:30:15 -06:00
Gregory Nutt
51bff04402 Missed a Kconfig definition in the last commit 2015-02-16 10:41:12 -06:00
Gregory Nutt
47e9b4a272 STM32 RTC: Extend the RTC interface to support reading subseconds. From Jussi Kivilinna 2015-02-16 07:18:09 -06:00
Gregory Nutt
f477c9b275 Add support for RTC driver to the STM32F4-Discovery board 2015-02-15 10:11:01 -06:00
Gregory Nutt
a919e70121 Remove an unused variable 2015-02-15 08:51:39 -06:00
Gregory Nutt
5cb233f712 RTC: A little more clean-up of the RTC driver 2015-02-15 08:19:23 -06:00
Gregory Nutt
f4e7e14e00 STM32 RTC: Implement the rdtime() method of the RTC lower half interface 2015-02-13 13:56:22 -06:00
Gregory Nutt
9e80f7d8d2 STM32 RTC driver lower half: Implement the settime method of the RTC interface 2015-02-13 13:36:15 -06:00
Gregory Nutt
faa16d06ac Break out a new internal interface, stm32_rtc_setdatetime(). This eliminates some un-necessary time conversions. From Freddie Chopin. 
Add a skeleton implementation of the RTC lower half interface at arch/arm/src/stm32/stm32_rtc_lowerhalf.c.  This is just the framework for the RTC lower half.  None of the interface methods have yet been implemetned.
 2015-02-13 12:56:58 -06:00
Gregory Nutt
5fb51bf962 Forgot to add a file in the last commit 2015-02-13 10:05:10 -06:00
Gregory Nutt
3724a5e98e RTC: Remove all backdoor interfaces from rtc.h 2015-02-13 08:41:34 -06:00
Gregory Nutt
7c61b61adf Merge commit 'd000b0ac237cb6b17e3d355b55250c3ca7e9f2d6' 2015-02-11 18:07:03 -06:00
sauttefk
dc402d8d3e Add TI EK-TM4C1294XL launchpad support 2015-02-12 00:30:38 +01:00
Gregory Nutt
bdb4893ced Kinetis: Add architectural support for the K26Z128VLH4. From Derek B. Noonburg 2015-02-11 07:15:45 -06:00
Gregory Nutt
5bb723c2e1 LP17 Ethernet Driver: Fix some compile problems when IPv6 is enabled 2015-02-10 15:23:11 -06:00
Gregory Nutt
3859ee90f8 LPC17xx: Add IPv6 support to the LPC17 Ethernet driver. Untested... I no longer have a proper environment for LPC17 debug. 2015-02-10 14:04:08 -06:00
Gregory Nutt
601d99183b SAM4 Ethernet Driver: No supports operation using the high priority work queue so that packet processing can occur outside of interrupt level processing. 
SAM4E-EK: The nsh configuration now configures the Ethernet driver for execution on the HP work thread.
 2015-02-10 11:10:55 -06:00
Gregory Nutt
761d4bdbba Fix some warning 2015-02-09 18:24:31 -06:00
Gregory Nutt
4b74554fd2 Clone the SAMA5D4 IPv6 support to the SAM4E EMAC and SAMAd3 EMAC and GMAC drivers. 2015-02-09 17:16:55 -06:00
Gregory Nutt
4f9998b4a8 Big, very risky change: Remove all occurrences of up_maskack_irq() that disable and enable interrupts with up_ack_irq() that only acknowledges the interrupts. This is only used in interrupt decoding logic. Also remove the logic that unconditionally re-enables interrupts with the interrupt exits. This interferes with the drivers ability to control the interrupt state. This is a necessary, sweeping, global change and unfortunately impossible to test. 2015-02-09 16:12:11 -06:00
Gregory Nutt
25067a58e8 SAMA5D Ethernet: Add support for CONFIG_NET_NOTINTS so that the driver can operate from the work queue thread instead of doing everything from the interrupt level. 2015-02-09 15:26:05 -06:00
Gregory Nutt
ac2a1f0bb1 ARMv7-A interrupt handler: Should not automatically re-enable interrupts on interrupt return. That interferes with the driver's ability to manage interrupts. 2015-02-09 15:24:31 -06:00
Gregory Nutt
94d3c68013 Oops... Conditioned on IPv4 wheren IPv6 was intended 2015-02-09 14:16:32 -06:00
Gregory Nutt
3384274087 Fix IPv4-dependend debug output 2015-02-09 13:18:31 -06:00
Gregory Nutt
66e456161f SAMA5D4 EMAC: Add support for Multicast address matching and IPv6 2015-02-09 10:50:38 -06:00
Gregory Nutt
ef2d314235 Add logic so that STM32 Ethernet drivier can avoid interrupt level processing and, instead, execute on the work thread. 2015-02-09 08:33:29 -06:00
Gregory Nutt
3465cb6138 SYSLOG: Add an option to use the syslog'ing device as the system consolution. This option enables a low-level, write-only console device at /dev/console (similar to the low-level UART console device). From Pierre-noel Bouteville. 2015-02-08 06:53:24 -06:00
Gregory Nutt
93ed9dc8d3 STM32 SPI: Clean-up asymmetric configuration of SPI6 2015-02-07 18:59:06 -06:00
Gregory Nutt
6f335dc6c6 STM32 SPI: The source clock for SPI 4,5, and 6 should be PCLK2, not PCLK1 (for F411, F427, and F429). Per David Sidrane. 2015-02-07 13:59:45 -06:00
Gregory Nutt
8f4bbdd057 Updated Tiva ADC files 2015-02-06 16:56:12 -06:00
Gregory Nutt
2502835fe8 Tiva ADC: Add Kconfig options for ADC. From Calvin Maguranis 2015-02-05 19:05:13 -06:00
Gregory Nutt
0d316326c2 Tiva ADC: Partial build support. Still missing Kconfg changes 2015-02-05 18:01:18 -06:00
Gregory Nutt
9ad18d827e Tiva ADC: Adds a Tiva ADC driver. From Calvin Maguranis 2015-02-05 17:36:23 -06:00
Gregory Nutt
a122910566 Tiva ADC: Register definitiona header file from Calvin Maguranis 2015-02-05 16:29:17 -06:00
Gregory Nutt
971c5c98fe Adds support for TM4C123G timers; integrates with the TM4C123G Launchpad. From Calvin Maguranis 2015-02-05 13:51:32 -06:00
Gregory Nutt
c7f71c99a5 Networking: Changes need to build ICMPv6 'router' configuration on STM32 with network debug enabled 2015-02-05 11:47:56 -06:00
Gregory Nutt
cc63543b80 STM32: Add an IPv6 configuration for the STM32F4-Discovery board (witht he STM32-DISCO_BB base board). Verify that the STM32 Ethernet driver works with IPv6. 2015-02-05 11:21:04 -06:00
Gregory Nutt
a9c71630e1 Add IPv6 support to network driver skeleton and to SAMA5D4 Ethernet driver (which, unfortunately is still missing address filtering logi) 2015-02-05 10:49:32 -06:00
Gregory Nutt
6568d94902 ICMPv6: Add logic to behave like a router (if so configured): NuttX will not send the router advertisement message in response to any router solicitation messages. 2015-02-05 09:43:29 -06:00
Gregory Nutt
24d800398e Networking: Break out Ethernet definitions into a separate file; add IPv6 multicast addresses as common globals, Ethernet drivers need to filter link-local, all nodes Ethernet address 2015-02-04 14:51:20 -06:00
Gregory Nutt
72645e184d Minor update to Kconfig file selections 2015-02-04 08:21:32 -06:00
Gregory Nutt
778d326c51 Re-arrange condition logic from the last change to avoid having STM32-specific conditional logic outside of the STM32 sandbox. 2015-02-04 07:24:19 -06:00
Gregory Nutt
1c05245963 STM32: Add driver for STM32L162XX AES peripheral. Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com> 2015-02-04 06:49:05 -06:00
Gregory Nutt
c63c55ac3f EFM: Remove a misbehaving assertion. From Pierre-noel Bouteville 
Also remove spaces before and after paretheses to conform to coding standard.
 2015-02-03 13:34:37 -06:00
Gregory Nutt
59d5149de6 Remove and extra endif from the Kconfig 2015-02-03 12:46:40 -06:00
Gregory Nutt
1d534ff896 Convert the 64-bit usec limit to a 32-bit tick limit 2015-02-03 07:18:17 -06:00
Gregory Nutt
cabaf7399a SAM4CM: Add support for tickless operation 2015-02-03 07:00:54 -06:00
Gregory Nutt
a6f1dfa5b0 Remove execute privileges from some header files 2015-02-01 06:24:18 -06:00
Gregory Nutt
31adb7b4c1 EFM32 Add support of BURTC and add possibility of debug message of RMU: Pierre-noel Bouteville 2015-02-01 06:19:53 -06:00
Gregory Nutt
01c57668c9 Fix a missing quotation mark in configuration description 2015-01-30 12:28:04 -06:00
Gregory Nutt
b6d51ef26d EFM32: Logic to unconditionally enable LE clocking. Even you don't use core clock LE as source for LFA or LFB, to read are write any register not clocked by HFPERCLK or HFCORECLK, HFCORECLKLE should be enabled. From Pierre-noel Bouteville. 2015-01-30 07:44:49 -06:00
Gregory Nutt
0c47dbe92d ARM assembly language memcpy.S was not returning a value in R0 it is required to do. From David Sidrane 2015-01-29 06:36:53 -06:00
Gregory Nutt
80cfc0bdd3 Tiva Ethernet: Move place where interrupts are disabled. It is probably not possible, but the logic looks like it could leave interrupts disabled 2015-01-27 14:59:31 -06:00
Gregory Nutt
4146fdbe8f Recent changes to stm32_rtcc.c do not compile with STM32L15XX configurations. From Jussi Kivilinna. 2015-01-27 09:20:42 -06:00
Gregory Nutt
c74aaafc72 Disabling any of EXTI 5-9 interrupts was disabling interrupts for all EXTI 5-9. Same issue with EXTI 10-15. From Jussi Kivilinna. 2015-01-27 09:15:43 -06:00
Gregory Nutt
c16abdcd47 Get USART 2 & 3 working on lpc4357-evb. These changes are required to get USART 2 and 3 working on the Embest development board. From Toby Duckworth 2015-01-26 07:33:22 -06:00
Gregory Nutt
7e46e94546 Remove CONFIG_DEBUG_STACK. Adding CONFIG_STACK_COLORATION makes this configuration option pointless 2015-01-24 06:49:51 -06:00
Gregory Nutt
05c5c8c337 Add CONFIG_STACK_COLORATION that does the same thing as CONFIG_DEBUG_STACK but without enabling debug. From David Sidrane 2015-01-24 06:03:39 -06:00
Gregory Nutt
2f3fb08869 Add support for the EFM32 reset management unit (RMU). From Pierre-noel Bouteville 2015-01-23 15:25:10 -06:00
Gregory Nutt
7106469191 Armv7-M: Remove Px4-only setting of stack to 0xff. This is incompatible with standard NuttX stack montitoring logic 2015-01-22 10:09:10 -06:00
Gregory Nutt
1dd722f836 STM32 Ethernet: Port IPv6 address filtering from the Tiva TM4C driver 2015-01-21 15:04:39 -06:00
Gregory Nutt
32d2a4c548 All Ethernet drivers (again): Missed one place where arp_out() is called and neighber_out() needs to be called 2015-01-21 11:36:33 -06:00
Gregory Nutt
1ad73c52b1 Networking: Modify all Ethernet drivers: Do neighbor look-up on all outgoing IPv6 packs in order to properly set the destination link layer address. 2015-01-20 15:52:25 -06:00
Gregory Nutt
a53ae59284 Networking: Add missing raw/packet socket support to all Ethernet drivers 2015-01-20 15:14:29 -06:00
Gregory Nutt
92f440c20c Ethernet drivers: Use IFF_IS_IPv4 macro. Cannot rely on the EtherType being set correctly. 2015-01-20 06:26:14 -06:00
Gregory Nutt
8c74fb427e TM4C Ethernet: Fix the ICMPv6 multicast address 2015-01-19 14:56:43 -06:00
Gregory Nutt
28aadce3e8 Tiva Ethernet: Add support for receiving IPv6 multicast frames 2015-01-19 12:43:13 -06:00
Gregory Nutt
e2aad9c05a nuttx/arch/arm/src/stm32/stm32_serial.c: fix declaration and definition of up_receive() and up_dma_receive() to match fields of uart_ops_s from nuttx/include/nuttx/serial/serial.h 2015-01-19 06:42:27 -06:00
Gregory Nutt
bbafb8f2fe Tiva Ethernet: When calling into the stack from the worker thread, it is necessary to have the stack locked 2015-01-18 16:58:11 -06:00
Gregory Nutt
a386319013 Tiva Ethernet: Don't try to print IPv4 address if IPv4 is not enabled 2015-01-18 11:38:40 -06:00
Gregory Nutt
65ae9c990c Tiva Ethernet: Back out previous change... it is WRONG 2015-01-17 11:55:20 -06:00
Gregory Nutt
b7c0bfebd5 Tive Ethernet: Fix some race conditions in the driver that become apparent when debug is enabled 2015-01-17 10:59:45 -06:00
Gregory Nutt
26499b440b Tiva Ethernet: Costmetic changes to comments and debug strings 2015-01-17 10:27:57 -06:00
Gregory Nutt
7b41d66962 Tiva Ethernet: Remove assertion. Just log and error and continue 2015-01-17 10:01:55 -06:00
Gregory Nutt
1be7285567 TM4C Ethernet: Add some assertions 2015-01-16 15:25:18 -06:00
Gregory Nutt
278c485229 Networking: All Ethernet drivers: Call ipv6_input if IPv6 is enabled and an IPv6 packet is received 2015-01-15 09:31:23 -06:00
Gregory Nutt
89538ac4a2 - Rename devif_input() ipv4_input() 
- Copy net/devif/devif_input.c to ipv6_input.c.  Remove all IPv4-specific logic.
- Rename net/devif/devif_input.c to ipv4_input.c.  Remove all IPv6-specific logic
- Split IPv4 header structure out as net_ipv4hdr_s from net_iphdr_s
 2015-01-15 08:03:56 -06:00
Gregory Nutt
2f4aa0bde7 Networking: Condition certain ARP logic on CONFIG_NET_ARP in all Ethernet drivers 2015-01-15 07:07:39 -06:00
Gregory Nutt
ace8f3bee6 Update README 2015-01-14 09:10:26 -06:00
Gregory Nutt
a40979407f Tiva Timer: Revert the previous change. Thre is a better way to handler timerout interrupts. 
Removed setting of the initial timer interval load value (or, rather, it is always set to zero for a free-running timer).  Also, do not unconditional enable the timer out interrupt.  The timerout interrupt is not not enabled until tiva_timer32_setinterval() is called.
 2015-01-14 07:33:59 -06:00
Gregory Nutt
6d3e291da1 Tiva Timer: Remove a big chunk of unnecessary logic 2015-01-13 17:08:37 -06:00
Gregory Nutt
1d2a4f3b4c Tiva Timer: Timer test must attach a timer handler or the timer is stopped at the first interrupt 2015-01-13 15:55:54 -06:00
Gregory Nutt
3efd127e64 Timer Timer: Timer driver now initializes without complaints. Need a test driver of some kind to make more testing progress. 2015-01-13 11:49:00 -06:00
Gregory Nutt
9c3dce06e1 DK-TM3C129X Timer: Add timer initialization logic to the board bring-up 2015-01-13 11:10:35 -06:00
Gregory Nutt
47b04339d2 Tiva Timer: Rename tiva_timerlow.c to tiva_timerlow32.c since it only supports 32-bit periodic timers 2015-01-13 10:10:02 -06:00
Gregory Nutt
1ae213c0b6 Tiva Timer: Completes implementation of the timer driver lower half 2015-01-13 10:06:40 -06:00
Gregory Nutt
72cd8e57a9 Tiva Timer: Allow timeout interrupts even if the reload value is zero. That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000 2015-01-13 08:29:25 -06:00
Gregory Nutt
b1697c7ff4 Tiva Timer: Add conditional compilation to enable/disable each timer feature. Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL 2015-01-13 07:49:20 -06:00
Gregory Nutt
f3438d0d68 Tiva Timer: Rename tiva_timer.c to tiva_timerlib.c 2015-01-12 15:55:41 -06:00
Gregory Nutt
bbfc5cf747 Tiva Timer: First cut at timer driver lower half (still incomplete) 2015-01-12 15:52:48 -06:00
Gregory Nutt
c93b205eea Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well 2015-01-12 10:14:48 -06:00
Gregory Nutt
b9dcced1aa Tiva interrupts: Fix chip-specific interrupt un-definitions 2015-01-12 10:00:42 -06:00
Gregory Nutt
487f9a3be9 Tiva Timers: Add interfaces to read the current timer value 2015-01-12 10:00:41 -06:00
Gregory Nutt
31a94816b2 USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts 2015-01-11 08:05:09 -06:00
Gregory Nutt
2444605b95 Tiva Timer: Fix a typo 2015-01-10 12:42:39 -06:00
Gregory Nutt
d09a9e2741 Tiva Timer: Implements configuration of the 32-bit RTC timer 2015-01-10 12:41:15 -06:00
Gregory Nutt
2c6cf27405 Tiva Timer: Add support for RTC match interrupts 2015-01-10 12:22:37 -06:00
Gregory Nutt
1ea2f5da1c Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns 2015-01-10 10:07:56 -06:00
Gregory Nutt
9cead4170b Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled 2015-01-10 08:34:39 -06:00
Gregory Nutt
fa4a54c5ad Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes 2015-01-09 16:49:00 -06:00
Gregory Nutt
3544eb2fdf Tiva Timer: Add logic to acknowledge Tiva Timer interrupts 2015-01-09 15:01:49 -06:00
Gregory Nutt
64530008ba Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module 2015-01-09 14:10:31 -06:00
Gregory Nutt
9531dd1a80 Tiva Timer: Add more interrupt management logic 2015-01-09 13:29:03 -06:00
Gregory Nutt
59555646c5 Tiva Timer: Add functions to set match registers; Add logic to select count direction 2015-01-09 12:05:26 -06:00
Gregory Nutt
c092ecb131 Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers. 2015-01-09 11:07:52 -06:00
Gregory Nutt
db556691f3 Tiva Timers: Add framework to support tmer interrupts 2015-01-09 10:21:59 -06:00
Gregory Nutt
f787440a04 STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE 2015-01-08 17:47:34 -06:00
Gregory Nutt
45e09d9df7 Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations 2015-01-08 13:44:10 -06:00
Gregory Nutt
4357af2493 Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode. 2015-01-08 11:08:54 -06:00
Gregory Nutt
6715926fab Tiva Timer: Add register level debug support 2015-01-08 10:14:38 -06:00
Gregory Nutt
737108e066 Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit 2015-01-08 09:47:38 -06:00
Gregory Nutt
4224fd0edc Tiva Timer: SYNC regiser is only available on GPTM0 2015-01-08 08:07:31 -06:00
Gregory Nutt
ff02574863 Tiva Timer: Update timer register bit definitions for the LM4F 2015-01-08 08:03:47 -06:00
Gregory Nutt
54bf159bdb Tiva Timer: Extend timer register definitions to handle other chips 2015-01-08 07:56:00 -06:00
Gregory Nutt
1842525cc2 MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy. 
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.

This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.

From David Sidrane
 2015-01-08 06:23:42 -06:00
Gregory Nutt
1f10c56dd0 Tiva Timer: Missed one register bit field definition 2015-01-07 12:03:08 -06:00
Gregory Nutt
6a4935f12b TM4C129X Timer: Completes timer register definition header file 2015-01-07 11:43:56 -06:00
Gregory Nutt
a1065a919a TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete 2015-01-07 10:07:47 -06:00
Gregory Nutt
7be7ace918 TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions 2015-01-07 08:57:48 -06:00
Gregory Nutt
7277d66529 Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms 2015-01-06 10:49:47 -06:00
Gregory Nutt
6f8125bf61 Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL) 2015-01-06 10:48:08 -06:00
Gregory Nutt
207835bd0d Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt 2015-01-05 15:12:45 -06:00
Gregory Nutt
317b7efc7f Tiva: Fixes to support building Tiva TM4C129X I2C driver 2015-01-05 13:15:40 -06:00
Gregory Nutt
b6fbf41925 Tiva: Update I2C register definitions to include support for the TM4C129X 2015-01-05 13:08:07 -06:00
Gregory Nutt
5752f301de Tiva Ethernet: Add support for PHY interrupts 2015-01-03 13:16:26 -06:00
Gregory Nutt
bb76c88f19 Tiva Ethernet: Configure external PHY interrupt pin 2015-01-03 10:59:12 -06:00
Gregory Nutt
84c809afe4 Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK 2015-01-03 09:28:54 -06:00
Gregory Nutt
1f013b220d Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers 2015-01-03 06:52:19 -06:00
Gregory Nutt
24f8fd53ab Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion 2015-01-02 14:05:42 -06:00
Gregory Nutt
52aeabb4b2 Cosmetic changes 2015-01-02 13:59:47 -06:00
Gregory Nutt
44cefe90a9 Tiva: Fix typos in conditional compilation 2015-01-02 13:59:30 -06:00
Gregory Nutt
5009feb414 Tiva Ethernet: Add lots of debug output for testing 2015-01-02 13:10:25 -06:00
Gregory Nutt
213eb321db Tiva: If peripheral ready register not available, then lets say the peripheral is ready 2015-01-02 12:58:20 -06:00
Gregory Nutt
51544be0e2 Tiva: Wait for the console UART to be ready before configuring it 2015-01-02 12:57:41 -06:00
Gregory Nutt
6358e7c23c Tiva Ethernet: Fix compile problem when debug enabled 2015-01-02 12:04:22 -06:00
Gregory Nutt
c6e72df007 Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X 2015-01-02 11:53:02 -06:00
Gregory Nutt
c989f68a6d Tiva Ethernet: MMC interrupts need to be disable initially 2015-01-02 11:40:48 -06:00
Gregory Nutt
9461b88edc Tiva Ethernet: Update DMA BUSMODE settings based on TI example code 2015-01-02 11:10:41 -06:00
Gregory Nutt
339f71a315 Tiva Ethernet: Update PHY initialization 2015-01-02 10:11:57 -06:00
Gregory Nutt
00f414d11b STM32 RTC: Add Kconfig options needed with the preceding commit 2015-01-02 06:45:45 -06:00
Gregory Nutt
5e0571f5a8 stm32-rtc: Add support for the internal low speed clock (LSI) 
Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock.  Turn on by defining CONFIG_RTC_LSICLOCK.

From Kevin Hester <kevinh@geeksville.com> via Lorenz Meier.
 2015-01-02 06:32:40 -06:00
Gregory Nutt
a40c9e1d8f Cosmetic update to some comments 2015-01-02 06:07:56 -06:00
Gregory Nutt
84519f8077 Cosmetic change to file formatting 2015-01-01 15:55:33 -06:00
Gregory Nutt
78d0d911b3 TM4C129X Ethernet: Add logic to get pre-programmed MAC address from user FLASH registers 2015-01-01 12:28:46 -06:00
Gregory Nutt
4d7ed265ce Tiva FLASH: Add FLASH register definitions for the TM4C129 family 2015-01-01 11:44:35 -06:00
Gregory Nutt
f67363e1ff Tiva PHY: Hard code some properties of the internal PHY 2015-01-01 08:11:17 -06:00
Gregory Nutt
aef65efd38 Tiva Ethernet: Update Ethernet intializaiton logic. Still things to be done 2015-01-01 07:55:15 -06:00
Gregory Nutt
9b04fb5318 Tiva: Add peripheral ready header file; fix typos in clock/pwr enable header files 2015-01-01 07:54:31 -06:00
Gregory Nutt
51b220c6d5 Ethernet skeleton: Add some more example logic 2014-12-31 13:45:19 -06:00
Gregory Nutt
4782acb012 Tiva Ethernet: Integrate use of workqueue so the network processing is not done at the interrupt level 2014-12-31 13:03:00 -06:00
Gregory Nutt
f9775de8ca Tiva Ethernet: Add basic clock/power controls for Ethernet and internal PHY 2014-12-31 11:40:01 -06:00
Gregory Nutt
448ab48f8d Tiva Ethernet: First cut at TM4C129X Ethernet driver. Initial commit is basically just the STM32 Ethernet driver with modifications for a clean compilation in the Tiva environment 2014-12-31 11:34:24 -06:00
Gregory Nutt
24ab902dff Tiva Ethernet: Minor naming update for compatibility 2014-12-31 09:39:00 -06:00
Gregory Nutt
84485b2601 Tiva Ethernet: Add DMA descriptor definitions 2014-12-31 07:32:11 -06:00
Gregory Nutt
54142ae9a6 Mostly cosmetic 2014-12-30 17:00:15 -06:00
Gregory Nutt
bec4cc0483 Tiva Ethernet: Completes TM4C129X Ethernet register definition header file 2014-12-30 13:42:19 -06:00
Gregory Nutt
dd31c12ed5 Don't error out if no ethernet definitions available 2014-12-30 13:26:18 -06:00
Gregory Nutt
094eb69ca0 Tiva Ethernet: More progress with register bit definitions 2014-12-30 11:08:18 -06:00
Gregory Nutt
9f0b5fa394 Tiva Ethernet: More progress with register bit definitions 2014-12-30 09:22:24 -06:00
Gregory Nutt
6f113fc8f4 TM4C129G Ethernet: Add Ethernet register addresses. Header files still incomplete 2014-12-30 08:09:09 -06:00
Gregory Nutt
0eaa52df4e Tiva: Add framework to support the uniqueu TM4C Ethernet register definitions 2014-12-30 07:07:16 -06:00
Gregory Nutt
901e717d5e stm32: update description and code documentation. Also fixes a few code formattings. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:59:46 -06:00
Gregory Nutt
3e6307d8ec stm32: fix wait upon vertical blank. This should never have occurred before. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:48:25 -06:00
Gregory Nutt
c149b1625c stm32: fix faulty access to non existing layer. This disables operation that requires double layer support, when configured for single layer only. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-29 09:45:30 -06:00
Gregory Nutt
9d2311e4a2 Tiva SSI: Fix oversight in last commit. Would only fixe the case where the single SSI enabled was SSI0 2014-12-28 16:58:36 -06:00
Gregory Nutt
788541aecf Tiva SSI: Fix some recent breakage to the Tiva SSI driver for the case where only one SSI modules is enabled 2014-12-28 16:55:47 -06:00
Gregory Nutt
089578319a STM32 Serial: PX4 HW workarround for flaky STM32 RTS. From David Sidrane 2014-12-27 18:58:18 -06:00
Gregory Nutt
33f7151cd9 Remove STM32-specific RX flow control logic from the upper level serial driver to the lower level STM32 serial driver 2014-12-27 09:45:45 -06:00
Gregory Nutt
aefde565d3 Serial Upper Half: Add watermarks to RX flow control logic 2014-12-27 07:43:06 -06:00
Gregory Nutt
1c39b67e32 STM32: Fix some incorrectly placed conditional logic 2014-12-26 12:41:35 -06:00
Gregory Nutt
85963aa469 EFM32 Timer/PWM: Add support for timer/PWM EFM32GG. From Pierre-noel Bouteville 2014-12-26 09:55:19 -06:00
Gregory Nutt
fc3765b5ae ARMv7M: More runtine stack checking logic. From David Sidrane 2014-12-26 08:46:25 -06:00
Gregory Nutt
a2f0afd222 STM32 I2C: Add strings to decode trace events. From David Sidrane 2014-12-26 08:35:21 -06:00
Gregory Nutt
8f433bb731 Add support for run time stack checking for the STM32. From David Sidrane 2014-12-26 08:30:42 -06:00
Gregory Nutt
7a3e125461 Tiva: Update UART header file for TM4C129X 2014-12-22 14:11:56 -06:00
Gregory Nutt
e503352bbc Tiva: Upate GPIO header file for TM4C129X 2014-12-22 12:59:13 -06:00
Gregory Nutt
cbeb82cb89 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 12:01:33 -06:00
Gregory Nutt
9fb1cccb37 TM4C129X: Simplify be removing unnecessary temporary variable 2014-12-22 11:53:31 -06:00
Gregory Nutt
1bb168abd6 TM4C129X: First cut at new Tiva clock configuration logic 2014-12-22 11:45:10 -06:00
Gregory Nutt
dd89bd2233 TM4C129X: A small step toward understanding new Tiva clocking 2014-12-22 09:30:41 -06:00
Gregory Nutt
c4d0e0a8dd Tiva: Rename TIVA_CRC_BASE to TIVA_CCM_BASE 2014-12-21 17:44:11 -06:00
Gregory Nutt
197cfbf798 Tiva: Add support for I2C6-9 2014-12-21 17:20:16 -06:00
Gregory Nutt
fe12140f94 Tiva SSI and board configurations: hange negative Tiva logic CONFIG_SSIx_DISABLE to positive logic CONFIG_TIVA_SSIx. Add support for SSI2 and SSI3 2014-12-21 15:23:37 -06:00
Gregory Nutt
467521ba33 Improved comments 2014-12-21 14:09:04 -06:00
Gregory Nutt
240b57428f TM4C129X: Increated power/clocking macros into I2C driver 2014-12-21 13:02:12 -06:00
Gregory Nutt
582966260d TM4C129X: Add macros to enable/disable peripheral power 2014-12-21 11:40:39 -06:00
Gregory Nutt
c24c0021b0 Tiva SSI: Use portable macros to enable peripheral clocking 2014-12-21 11:16:21 -06:00
Gregory Nutt
6c937a3bd3 Tiva: More run mode clock enable macros 2014-12-21 11:02:56 -06:00
Gregory Nutt
1289674a54 TM4C129X: Framework for new Tiva clocking logic (details not yet implemented) 2014-12-21 10:14:40 -06:00
Gregory Nutt
70970d06a1 Tiva: Completes first cut at system control header file 2014-12-20 12:05:22 -06:00
Gregory Nutt
fa358ecdb9 Tiva: More TM4C129 system control register definitions 2014-12-20 11:10:10 -06:00
Gregory Nutt
6e3d693c5c Tiva: More TM4C129 system control register definitions 2014-12-20 09:59:21 -06:00
Gregory Nutt
8aa9f27925 Tiva: Add a configuration setting to better distinguish TM4C123 and 129 families. Reanem tm4c_syscontrol.h to tm4c123_syscontrol.h; rename tm4c129x_syscontrol.h to tm4c129_syscontrol.h 2014-12-20 08:38:11 -06:00
Gregory Nutt
e0678813c1 Tiva: Updates to system control regiser definitions 2014-12-20 08:22:17 -06:00
Gregory Nutt
fa5dffbc18 STM32 LTDC: Move ltdc.h from include/nuttx/video to arch/arm/include/stm32; Trivial updates after general review 2014-12-19 14:52:17 -06:00
Gregory Nutt
4e5c2b7976 stm32: Add configuration option for ltdc 
This adds the following ltdc configuration options:
- dither support
- cmap support, is this the right place for CONFIG_FB_CMAP?
- support for extended ltdc interface

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:58:39 -06:00
Gregory Nutt
4ac49f514d stm32: implements ltdc frambuffer and support for ltdc layer operation 
This implements the framebuffer support for the generic nuttx framebuffer
interface, (see nuttx/video/fb.h)

This also implements the interface to perform hardware accelerated layer
operation by the ltdc controller and dma2d controller later (see
nuttx/video/ltdc.h).

The following methods are supported by the ltdc interface:

- getvideoinfo
  Get video information of the layer

- getplaneinfo
  Get plane information of the layer

- getlid
  Handle specific layer identifier. This allows to detect to current layer
  state (e.g. important for layer flipping)

- setclut
  Set the layer color lookup table. Up to 256 color entries supported.

- getclut
  Get the layer color lookup table

- setcolor
  Set the default layer color. In the context of the ltdc layer this means set
  the default color outside the active area or if the layer is disabled.

- getcolor
  Get the default layer color

- setcolorkey
  Set the layer colorkey (chromakey). Colorkey is enabled by blendmode
  LTDC_BLEND_COLORKEY

- getcolorkey
  Get the layer colorkey

- setalpha
  Set the constant alpha value. If blend mode LTDC_BLEND_SRCPIXELALPHA or
  LTDC_BLEND_DESTPIXELALPHA is defined than the blended color is calculated
  by the formel:
    Cdest = Pixelalpha * Constalpha * Csrc.
  Otherwise:
    Cest = Constalpha * Csrc

- getalpha
  get the alpha value

- setblendmode
  Set the layer blendmode.
  Supported blendmodes:
    non blendmode (do not perform blend operation independent on the layers
                   alpha and colorkey)
    alpha          alpha blending (transparency)
    destpixelalpha use pixel alpha value for the top layer (Layer2)
    srcpixelalpha  use pixel alpha value for the subjacent layer (Layer1)
    colorkey       enable colorkey

- getblendmode
  Get the layer blendmode

- setarea
  Set the active layer area, the visible rectangle inside the whole layer.
  This also allows to change the position of the whole layer which is visible in
  the selected area independent on the area position.

- getarea
  Get the active layer area

- update
  Reload the layer shadow register and make changes visible. Also supports
  layer flipping.

Note! Dithering and background color are static parameter and can only changed
at build time.

Implementation details:

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings are shadowed before they become active (except setclut).
They are still inactive until the layer is updated. This is done by the update
method. Should clut only active after an update or not? Clut is used for drawing
while the other settings usually used for blend or blit operations. So i think
this should be the right way.

The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings shadowed before they become active (except clut).
They are still inactive until the layer is updated. This is done by the update
call. Should clut only activated after an update or not? Clut is used for draw
operation while the other settings usually used for blend or blit operations.
So i think this should be the right way.

Deviations from the ltdc hardware implementation:

- Shadow register update of both layer (Layer1 or Layer2) is independent as long
  LTDC_UPDATE_SIM is not set. This flag allows to update both layer simultaneous.
  Otherwise only the desired layer is updated.

Layer operation:

Keep in mind, both layer are allways active (of course if both enabled by the
configuration). First the Layer 1 is blended with the background color and the
result is blended with the Layer2. To avoid blend effects, set the Layer2 in non
blend mode. This is equal to blend with alpha = 255. Enable blending of Layer2
with the background color by enable blending of Layer1 and disable the opacity
by setting the alpha value to 0.

Layer flip:

A layer flip usual mean swapping two framebuffer. So the current inactive buffer
can refreshed with data while the active framebuffer is visible. A flip
operation changes the inactive layer to the active one and vice versa.

The ltdc implementation supports layer flip. This can be done by the update call
and the flag LTDC_UPDATE_FLIP. In this case ltdc makes the inactive layer
invisible. In detail, the inactive layer is disabled and the blendmode reset.
Detection of the current layer state (e.g. active or inactive) is supported
by the getlid method combined with one of the LTDC_LAYER_* flags.
Maybe an additional method "flip" for flip operation should be added to the ltdc
interface? But this make no sence from my view if the layer is a non LTDC layer,
e.g. playing with dma2d only.

Supported and tested nuttx pixel formats:

Single Layer without LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Single Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Dual Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24

Why is FB_FMT_ARGB8888 missing?

Changes:
- Remove unused register debug method.

Todo:
- Add support for backlight, currently not neccessary

Did i forgot something? Take a look in the ltdc example or the interface
description (see nuttx/include/video/ltdc.h).

Thanks to Ken for the base layout. ;)

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:48:53 -06:00
Gregory Nutt
10934fb6a2 stm32: Add infrastructure for dma2d support 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:41:08 -06:00
Gregory Nutt
7edfddfc96 stm32: Add common stm32 layer description. This defines a common layer description for the ltdc and dma2d controller. 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:37:08 -06:00
Gregory Nutt
24a2f8a0a4 stm32: configure PLLSAI clock to enable ltdc register access 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:30:58 -06:00
Gregory Nutt
7999e7519c stm32: Add missing clut register definition 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:28:42 -06:00
Gregory Nutt
3e640a37d2 stm32: rename CFBLR register name to the name used in the reference manual 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:26:04 -06:00
Gregory Nutt
a34208d698 stm32: rename PLLSAI register name to this one in the reference manual 
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
 2014-12-19 13:21:39 -06:00
Gregory Nutt
93bcd3e03e TM4C129X: Add custom system control header file (incomplete) 2014-12-19 12:12:52 -06:00
Gregory Nutt
6cc9716d55 Tiva: Fix configuration logic for IRQ interrupts. The various parts support varying numbers of GPIO blocks and with varying capabilities to support interrupts on the pins of different GPIO blocks 2014-12-18 15:33:52 -06:00
Gregory Nutt
a5fcd71af0 Tiva: Change negative logic CONFIG_TIVA_DISABLE_GPIOx_IRQS to positive logic CONFIG_TIVA_GPIOx_IRQS 2014-12-18 15:19:16 -06:00
Gregory Nutt
ddad16a7b7 Tiva: Add GPIO interrupt support for the TMS4C129X 2014-12-18 11:52:06 -06:00
Gregory Nutt
55a3c57399 DK-TM4C129X: Fixes to get clean build. Logic is still not complete, however 2014-12-18 08:24:24 -06:00
Gregory Nutt
d27fb63862 TM4C129X: Add pin multiplexing 2014-12-17 11:55:45 -06:00
Gregory Nutt
c1851296b2 Tiva TM4C129X: Fix some errors in memory map 2014-12-17 09:42:37 -06:00
Gregory Nutt
2990c913b4 Add memory map for the TM4C129X 2014-12-17 09:40:56 -06:00
Gregory Nutt
3c6616f86a Add interrupt definitions for the TM4C129X 2014-12-17 08:19:23 -06:00
Gregory Nutt
dfed763f4e Tiva: Better distinguish features of the TM4C1294xx and the TM4C129Xxx 2014-12-16 18:02:59 -06:00
Gregory Nutt
09b16e3819 Remove packaging indications for TM4C129 configuration variables 2014-12-16 16:22:52 -06:00
Gregory Nutt
18c61b6e64 Add TM4C129XNCZAD and TM4C1294NCPDT to the Tiva configuration system 2014-12-16 16:02:21 -06:00
Gregory Nutt
ae18f9dacd Unify sensor debug. ADX driver was using input debug; LM75 and QENCODE that their own custom debug. Now all use CONFIG_DEBUG_SENSOR, sndbg() 2014-12-16 09:54:32 -06:00
Gregory Nutt
ae29667564 More changes associated with GPIO interrupt for the KL architecture from Alan Carvalho de Assis 2014-12-13 17:30:25 -06:00
Gregory Nutt
47919eb274 Add GPIO interrupt capability for the KL architecture. The patch is almost the same as kinetis_pinirq.c, just minor modifications and rename kl_pinirq to kl_gpioirq to make it more generic to developers. From Alan Carvalho de Assis 2014-12-13 17:27:06 -06:00
Gregory Nutt
626fa0719a STM32 LTDC: Fix a typo in conditional compilation 2014-12-13 07:45:42 -06:00
Gregory Nutt
002d4c40a4 STM32 OTG HS DEV (in FS mode): Disable ULPI clock enable in RCC AHB1 Register. If Both ULPI and the FS clock enable bits are set in FS mode, then the ARM never awakens froom WFI due to a chip issue. From Ken Pettit 2014-12-13 07:44:13 -06:00
Gregory Nutt
a1e05721d8 Tiva I2C: Don't try to ACK and STOP on the same byte. Improve logic that suppresses STOP on a repeated start 2014-12-12 12:13:31 -06:00
Gregory Nutt
3ac6379bbe Tiva I2C: Legacy mode reset logic ommitted in last commit 2014-12-12 09:31:17 -06:00
Gregory Nutt
c8d1f87571 Tiva I2C: Add logic to reset I2C when busy hangs with busy 2014-12-12 09:26:10 -06:00
Gregory Nutt
fb6661aaa4 STM32 OTGHS Device: Fix for OTGHS core working in FS mode. From Ken Pettit 2014-12-12 07:43:32 -06:00
Gregory Nutt
1c569b85f8 Cosmetic change to force compliance with coding standard 2014-12-12 07:14:16 -06:00
Gregory Nutt
b818691a3a Tiva I2C: Fix how I2C transactions are started and some I2C error reporting 2014-12-11 12:31:42 -06:00
Gregory Nutt
a190aeeeba Tiva I2C: All SDA pins should be open drain, but all SCL pins should be digital output 2014-12-11 12:30:48 -06:00
Gregory Nutt
c7adcf5af2 Tiva I2C: Add register-level debug capability 2014-12-11 09:34:03 -06:00
Gregory Nutt
3958661ae5 Tiva I2C: Minor clean-up to I2C tracing 2014-12-11 08:11:32 -06:00
Gregory Nutt
475d2c3137 Tiva I2C: Fix error in assertion logic 2014-12-11 07:02:14 -06:00
Gregory Nutt
98d9ceb582 Tiva I2C: Add I2C options to Kconfig 2014-12-10 13:56:00 -06:00
Gregory Nutt
bf5179d0ac Tiva I2C: Add workaround for errata; clean up some error handling 2014-12-10 13:01:47 -06:00
Gregory Nutt
58d0e169c7 Tiva I2C: Driver is code complete but untested 2014-12-10 12:43:46 -06:00
Gregory Nutt
03e1ecd6aa Tiva i2C: Lots of compilation fixes 2014-12-10 08:47:34 -06:00
Gregory Nutt
86577c2282 Simplify I2C master/slave addresing to simplify driver development 2014-12-10 08:47:07 -06:00
Gregory Nutt
0daa071f2a Tiva I2C: Finishes initialization logic 2014-12-10 07:31:44 -06:00
Gregory Nutt
c16ab05135 Tiva: Do I2C clock initialization without using legacy registers. Necessary for I2C3-5 2014-12-09 15:28:10 -06:00
Gregory Nutt
20b4417e48 Add a little bit more Tiva I2C initialization logic 2014-12-09 14:48:24 -06:00
Gregory Nutt
b05fefc15a Fix typo in Tiva UART regiser address definition. SourceForge Ticket #37 2014-12-09 12:18:41 -06:00
Gregory Nutt
f5c124e081 Tiva: Add build framework and skeleton files for Tiva I2C driver. Initial commit is just the STM32 I2C driver with name changes and STM32-specific logic removed 2014-12-09 12:18:40 -06:00
Gregory Nutt
928bc5ca84 Update the Tiva I2C register definitions for the TM4C123 and TM4C129 2014-12-09 08:42:12 -06:00
Gregory Nutt
63ba9bdf17 Set the GPIO_SPEED_50MHz on all F2 and F4 SPI pin configurations. This is based on an F411 SPI1 errata but the fixed is generalized to all SPI and all F2 and F4 (let me know if this introduces any other issues). Discovered and fixed by Sebastien Lorquet after much consternation. 2014-12-08 09:51:52 -06:00
Gregory Nutt
1f2447502f SAMA5D3 Xplained: Add support for the Itead Joystick shield 2014-12-03 12:24:23 -06:00