This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower priority than the new boosted priority can pre-empt execution. Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted priority. This effect is only limited to the next instruction. Subsequent instructions are guaranteed to see the new boosted priority.
This was raised in Bitbucket issue 113 from Vadzim Dambrouski.
Squashed commit of the following:
arch/arm/src/samd5e5/sam_usb.c: USB driver now compiles with some issues.
arch/arm/src/samd5e5/chip/sam_fuses.h: Add fuse definition header file.
arch/arm/src/samd5e5: Bring USB driver in from SAMD2L2.
arch/arm/src/samd5e5/sam_clockconfig.c: Implement DFLL support. This completes coding the the re-architected clock configuration logic.
arch/arm/src/samd5e5/sam_clockconfig.c: Add data structures and definitions to support the FDLL and the DFPLL0/1.
arch/arm/src/samd5e5: Completes GCLK configuration logic. Still FDPLL and FDLL support.
arch/arm/src/samd5e5: A little more GCLK configuratino logic. Still incomplete.
arch/arm/src/smad5e5: Beginning of GCLK configuration logic.
arch/arm/src/samd5e5: Add MCLK configuration logic.
arch/arm/src/samd5e5: Add XOSC0/1 configuration logic.
arch/arm/src/samd5e5: Add XOSC32 configuration logic.
arch/arm/src/samd5e5: Rip out all of the leveraged clock configuration logic and start from scratch.
Squashed commit of the following:
arch/arm/src/samd5e5: Clean-up EIC logic.
arch/arm/src/samd5e5: Fix some compilation issues; Still issues with the EIC logic from samd2x.
arch/arm/src/samd5e5: Fix some compilation issues; bring in some EIC logic from samd2x.
arch/arm/src/samd5e5: Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
configs/metro-m4: Add LED support.
arch/arm/src/samd5e5: Bring in SAML21 clock configuration. This is a WIP; it cannot possible even compile yet.
arch/arm/src/samd5e5: Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
arch/arm/src/samd5e5: Add SERCOM utility function.
arch/arm/src/samd5e5: Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5. This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
arch/arm/src/samd5e5: Add sam_config.h header file
arch/arm/src/samd5e5/: Add Generic Clock (GCLK) utility functions.
arch/arm/src/samd5e5: Add EVSYS register definition file
arch/arm/src/samd5e5 and configs/metro-m4: Use SERCOM3 for the Arduino serial shield as console.
arch/arm/src/samd5e5/chip: Add SERCOM USART, SPI, I2C master, and slave register defintions header files
arch/arm/src/samd5e5/chip: Add AES, PM, TRNG, and WDT header files.
arch/arm/src/samd5e5/chip: Add pin multiplexing header files.
Various fixes to configuration system; fix metro-m4/nsh defconfig file.
configs/metro-m4: Add initial support for the Adafruit Metro M4 board.
arch/arm/src/samd5e5: Add peripheral clock helpers.
arch/arm/src/samd5e5/chip: Add PAC register definition header file. Fix some errors in the memory map header file.
arch/arm/src/samd5e5: Add chip.h headerf file.
arch/arm/src/samd5e5: Add PORT register definitions and support from SAML21.
arch/arm/include/samd5e5: Add interrupt vector definitions.
arch/arm/src/samd5e5: Add some boilerplate files. Correct some typos.
arch/arm/src/samd5e5/chip/sam_eic.h: Add EIC register definitions.
arch/arm/src/samd5e5/chip: Add OSC32KCTRL and OSCCTRL register definitions.
arch/arm/src/samd5e5/chip: Add GCLK, MCLK, and RSTC header files.
arch/arm/src/samd5e5/chip/sam_cmcc.h: Add CMCC register definitions
arch/arm/src/samd5e5/chip/sam_supc.h: Add SUPC header file.
arch/arm/src/samd5e5: Add start-up logic.
arch/arm/src/samd5e5: Add Make.defs file
arch/arm/src/samd5e5/chip: Add memory map header file.
arch/arm/include/samd5e5: Add chip.h header file.
arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig: Add configuration logic for the SAMD5x/Ex family.
- Added CRC32 functions for multicast address filtering.
- Do not reset PHY settings when doing an ifup
- Use chip's unique id as the device MAC
- Enable discard enet frames with errors at PHY layer
kinetis:sdhc fix SDIO driver so that DMA works
There were 2 problems. The first was that the interrupt did
test DINT and raise a completion events. But since DINT is
just an indication of DMA completion, TC is a valid way to
determine that the transfer is complete.
The second problem is that Software Reset For DAT Line
SDHC_SYSCTL[RSTD] clears the bits 24-0 in SDHC_PROTO
this looses the wide bus setting DTW
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
Change all remaining occurrences of SAMDL to SAMD2L2.
configs/: Change all remaining occurrences of SAMDL to SAMD2L2
configs/: Change all occurrences of CONFIG_SAMDL_* to CONFIG_SAMD2L2_*
arch/arm/src and include: Rename all directories from samdl to samd2l2. Change all configuration variable names and other usage from SAMDL to SAMD2L2.
kinetis:USB0 fix interrupt storm on error
The ERROR bit of USBx_ISTAT needed to be cleared once an
error occured.
Approved-by: GregoryN <gnutt@nuttx.org>
