Commit Graph

46489 Commits

Author SHA1 Message Date
Fotis Panagiotopoulos
bbf3f2866d Fixed non-UTF8 characters. 2022-09-28 09:38:55 +08:00
ligd
078a0486f5 armv7-a: SMP hande all cores start at same time
In SMP mode, if all cores start at same time, all from __start(),
then only primary need do initialize, so others core should wait
primary, use 'sev' let the non-primary continue to __cpuN_start().

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-28 10:33:13 +09:00
wangbowen6
589647308c arm/tlsr82: move peripherals pin config to board.h
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-28 09:30:06 +08:00
Xiang Xiao
764540267e sched/clock: Rename g_system_timer to g_system_ticks
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-27 17:45:44 -03:00
Jukka Laitinen
24ea8ee3e9 arch/risc-v/src/mpfs/mpfs_ddr.c: Use DDR type selection macros to flag out code
The DDR type can be determined at compile time, remove code which is not used

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-09-28 02:09:02 +08:00
Jukka Laitinen
0ba3bc66be arch/risc-v/src/mpfs/Kconfig: Add configuration flags for DDR type selection
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-09-28 02:09:02 +08:00
Masayuki Ishikawa
00ce58963f boards: icicle: Fix license information to use the OpenSBI
Summary:
- I noticed that the OpenSBI library depends on the BSD license
- This commit fixes this issue

Impact:
- None

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-09-27 18:29:09 +02:00
Masayuki Ishikawa
0cd896b1d5 arch: risc-v: Fix license information to use the OpenSBI
Summary:
- I noticed that the OpenSBI library depends on the BSD license
- This commit fixes this issue

Impact:
- CONFIG_OPENSBI=y only

Testing:
- Build with icicle:opensbi (will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-09-27 18:29:09 +02:00
yinshengkai
ae38e3eb10 sched: Optimize sched_note_begin/end
Optimize sched_note_begin/end, replace note_printf with note_string
sched_note_begin/end optimized from 50us to 1us per consumption

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-09-27 21:32:35 +08:00
chao an
aa42f29465 net/local: remove dead code
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-27 21:31:48 +08:00
ligd
059497d1d1 armv7-a/r: NON-primary core should invalidate dacache level1
NON-primary cpu will invalidate cpu0's cache L2, that will caused cpu0's data mismatch, and then system crash

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-27 14:41:39 +08:00
David Sidrane
a1ebd499ea stm32h7:SDMMC fix unaligned access for buffers not on 32 bit boundaries
The IDMA needs to have 32 bit word alignment, in fact it will
   AND off the lower 2 bits of the value stored in IDMABASE0R.
   This bug was masked by CONFIG_ARMV7M_DCACHE causing proper word alignment
   and also FAT_DMAMEMORY being aligned.

   This commit extends the unaligned logic (used for dcache) to take into account
   the need for a buffer copy when the buffer is ot 32 bit word.

    It leverages the fact that when CONFIG_ARMV7M_DCACHE is not defined the up_xxxxx_dcache are nops.
2022-09-27 09:43:29 +08:00
Jukka Laitinen
dd2ffbc768 Fixes for GPT partition parsing
1. Don't handle invalid or empty pte entries

num_partition_entries field in GPT typically means number of maximum entries
and not the number of used entries. Empty entries are indentified with
"0" partition type guid. Loop through all the entries

2. Fix the GPT partition size calculation

"ending_lba" is included in the partition, it is not the start of the next one.
Thus the correct size of the partition is end-start+1

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-09-27 09:42:39 +08:00
chao an
98724477e7 net/procfs: fix runtime error AddressSanitizer(global-buffer-overflow)
NuttShell (NSH) NuttX-10.3.0
ap> ifconfig
=================================================================
Program received signal SIGSEGV, Segmentation fault.
==3920365==ERROR: AddressSanitizer: global-buffer-overflow on address 0x57fb4f2a at pc 0x57177067 bp 0xf1ffebb8 sp 0xf1ffeba8
READ of size 1 at 0x57fb4f2a thread T0

...................
| #10 0xf7ac4339 in __asan::__asan_report_load1 (addr=1476087594) at ../../../../../src/libsanitizer/asan/asan_rtl.cpp:117
| #11 0x57177067 in strncmp (cs=0x57fb4f2a "", ct=0x582d36e0 "stat", nb=4) at string/lib_strncmp.c:40
| #12 0x57f3b467 in netprocfs_opendir (relpath=0x57fb4f26 "net", dir=0xf1ffed80) at procfs/net_procfs.c:398
| #13 0x572b3ae1 in procfs_opendir (mountpt=0xf4602c20, relpath=0x57fb4f26 "net", dir=0xf1ffed80) at procfs/fs_procfs.c:625
| #14 0x572879ff in open_mountpoint (inode=0xf4602c20, relpath=0x57fb4f26 "net", dir=0xf1ffed80) at vfs/fs_dir.c:127
...................

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-27 09:41:55 +08:00
wangbowen6
5e46a9908a vfs/fs_poll: not clear POLLIN event if POLLHUP or POLLERR set
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-27 08:24:33 +09:00
Rajvinder Kaur
2e1c522a79 stm32h7\stm32_fdcan_sock: reserve space for timeval struct in the intermediate storage of tx and rx CAN frames when timestamp is enabled 2022-09-26 20:05:44 -03:00
chao an
aa51629bd2 arm/armv7-r: redefine the linker symbols as armlink style
Fix build break:

Error: L6218E: Undefined symbol _sbss (referred from arm_head.o).
Error: L6218E: Undefined symbol _ebss (referred from arm_head.o).
Error: L6218E: Undefined symbol _eronly (referred from arm_head.o).
Error: L6218E: Undefined symbol _sdata (referred from arm_head.o).
Error: L6218E: Undefined symbol _edata (referred from arm_head.o).

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 19:04:25 +02:00
chao an
a2cd1b0db3 arm/armlink: add support of link time optimization(lto)
Optimization goal(Code size)

Smaller                           GCC(-Os) GCC(-flto -Os) CLANG(-flto -Oz) ARMCLANG(-flto -Oz/-Omin)
lm3s6965-ek/qemu-flat(Cortex-M3)   208662      193893           199525             195464
                                               -7.07%           -4.37%             -6.32%
sabre-6quad/smp(Cortex-A9)         131360      122500            N/A               123988
                                               -6.74%            N/A               -5.61%

Faster performance                GCC(-O3) GCC(-flto -O3) CLANG(-flto -Ofast) ARMCLANG(-flto -Ofast) ARMCLANG(-flto -Omax)
lm3s6965-ek/qemu-flat(Cortex-M3)   257502      296364           369465             346696                  384204
                                              +15.00%          +43.40%            +34.60%                 +49.20%
sabre-6quad/smp(Cortex-A9)         166520      196004             N/A              207908                  224140
                                              +17.70%             N/A             +24.85%                 +34.60%

Reference:
https://developer.arm.com/documentation/101754/0618/armclang-Reference/armclang-Command-line-Options/-O--armclang-

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 18:23:27 +08:00
Xiang Xiao
40ef5bc6db libc: Move queue.h from include to include/nuttx
to avoid the conflict with libuv's queue.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-26 08:04:58 +02:00
nietingting
8b3a936588 ci: enable pytest on docker file
Signed-off-by: nietingting <nietingting@xiaomi.com>
2022-09-26 13:47:23 +08:00
wangbowen6
344c8be049 poll: add poll_notify() api and call it in all drivers
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-26 12:06:32 +08:00
chao an
74842880f9 compiler.h: add MSVC(Microsoft Visual C++)-specific definitions
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 04:40:34 +08:00
chao an
09c006b9c8 libs: fix visual studio Compiler Error C2124
D:\code\incubator-nuttx\libs\libc\stdlib\lib_strtod.c: error C2124: divide or mod by zero

Windows MSVC restrictions, MSVC doesn't allow division through a
zero literal, but allows it through non-const variable set to zero

Reference:
https://docs.microsoft.com/en-us/cpp/error-messages/compiler-errors-1/compiler-error-c2124?view=msvc-170

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 04:40:09 +08:00
Nathan Hartman
34192c07de boards/tm4c129e-launchpad: Expand README.txt
* boards/arm/tiva/tm4c129e-launchpad/README.txt:
  Expand this documentation with information about: toolchains,
  debugging (including the elusive openocd incantation to flash program
  the board), MCU clocking, more details about the Virtual COM port
  exposed via ICDI, and a description of the recently added ostest
  configuration.
2022-09-26 04:36:56 +08:00
chao an
f43be61f69 net/tcp: remove the redundant ifdef CONFIG_NET_TCP
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 00:14:49 +09:00
chao an
d71e8dacd4 sim/windows: add more net configs
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-26 00:14:49 +09:00
Nathan Hartman
d129c95fd2 boards/b-g474e-dpow1: Add note about udev/sudo regarding openocd
* boards/arm/stm32/b-g474e-dpow1/README.txt:
  (Debugging): OpenOCD requires permissions for certain operations. The
   preferred thing to do is to properly configure udev rules. The
   expedient thing to do is to run it as root with 'sudo', but we do not
   want to encourage that, as discussed earlier on this PR [1]. This
   revised text offers a compromise where we mention both options, but
   we talk about udev rules first and explicitly say that using 'sudo'
   is not encouraged. We leave it up to developers to decide what is
   best in their particular situation.

References:
[1] https://github.com/apache/incubator-nuttx/pull/7177
2022-09-25 08:13:01 -07:00
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t *
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-24 21:26:56 +02:00
Masayuki Ishikawa
95fe8426ed arch: lc823450: Fix to boot
Summary:
- I noticed that lc823450-xgevk does not boot due to the recent
  changes on g_current_regs
- This PR fixes this issue

Impact:
- None

Testing:
- Tested with lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-09-24 21:59:32 +08:00
Philippe Coval
fe8277f82a AUTHORS: Add myself to file as suggested at event
Hi, I might have forgot to touch this file
while I committed previously.

IIRC I already signed Apache paperworks too.

Relate-to: https://rzr.github.io/rzr-presentations/docs/nuttx
Relate-to: https://github.com/apache/incubator-nuttx/pulls?q=author%3Arzr
Signed-off-by: Philippe Coval <rzr@users.sf.net>
2022-09-24 22:47:19 +09:00
Nathan Hartman
a1bc1e89b0 boards/arm/stm32: Add b-g474e-dpow1:ostest configuration.
* boards/arm/stm32/b-g474e-dpow1/configs/ostest/defconfig:

  New file. Compared to b-g474e-dpow1:nsh, it adds the following
  configs:

  +CONFIG_BUILTIN=y
  +CONFIG_NSH_BUILTIN_APPS=y
  +CONFIG_TESTING_OSTEST=y

  and, because ostest currently fails when priority inheritance is
  enabled, it removes the following configs:

  -CONFIG_PRIORITY_INHERITANCE=y
  -CONFIG_PTHREAD_MUTEX_DEFAULT_PRIO_INHERIT=y
2022-09-24 00:44:27 +08:00
chao an
a3a4e89efc libs/libc/arm: use builtin routines instead of aliases of __aeabi_mem*
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-24 00:10:36 +08:00
chao an
b134995d92 arm/tlsr82: replace incompatible instruction sets to internal implement
1. some arm instructions are not compatible with arch tlsr:

{standard input}: Assembler messages:
{standard input}:53: Error: bad instruction `svc #0'

2. remove unsupport compile option

cc1: error: unrecognized command line option "-mlittle-endian"
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 23:54:25 +08:00
Lucas Saavedra Vaz
0c33a93dde boards/esp32-lyrat: Changed board_memorymap.h according to #7160 2022-09-23 23:38:26 +08:00
Lucas Saavedra Vaz
4ee22e8739 boards: initial support for the ESP32-LyraT
boards/esp32-lyrat: Fix board name in comment

boards/esp32-lyrat: Fix coding style

boards/esp32-lyrat: Removed BOOT_BUTTON support

boards/esp32-lyrat: Improved code maintainability and fixed styling

boards/esp32-lyrat: Specified board version in configuration files

boards/esp32-lyrat: Added wapi config

boards/esp32-lyrat: Added documentation

boards/esp32-lyrat: Fix typo in documentation

boards/esp32-lyrat: Added comment on BUTTON_BOOT
2022-09-23 23:38:26 +08:00
chao an
47b350a4c3 arch/arm: declare vector array default type to read-only
Reference:
https://developer.arm.com/documentation/dui0474/m/image-structure-and-generation/section-placement-with-the-linker/section-placement-with-the-first-and-last-attributes

CAUTION:
FIRST and LAST must not violate the basic attribute sorting order. For example, FIRST RW is placed after any read-only code or read-only data.

arm-none-eabi-readelf -aS arm_vectors.o
1. Without const:
  Section Headers:
  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
  [ 3] .vectors          PROGBITS        00000000 000034 00011c 00  WA  0   0  4

2. const symbol:
  [ 3] .vectors          PROGBITS        00000000 000034 00011c 00   A  0   0  4

Regression by:

| commit 229b57d6cb
|
|     arch/armv[6|7|8]-m: Move _vectors to arm_internal.h to avoid the duplication
|
|     and change the type of _vectors from uint32_t to const void *
|
|     Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 22:28:51 +08:00
chao an
c07d076bf5 arch/arm: redefine the linker symbols as armlink style
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 22:28:07 +08:00
chao an
bb63e1b23d arm/cortex-r: correct include path of chip.h
In file included from ./armv7-r/arm_l2cc_pl310.c:41:
./armv7-r/l2cc_pl310.h:38:10: fatal error: chip/chip.h: No such file or directory
   38 | #include "chip/chip.h"
      |          ^~~~~~~~~~~~~

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 13:54:03 +08:00
gaojiawei
571151aeb3 arch/sim: remove stderr in the function renaming list
stderr is a file stream pointer not a function name. Having
it in the renaming list may introduce linking error.

Signed-off-by: gaojiawei <gaojiawei@xiaomi.com>
2022-09-23 13:53:56 +08:00
Nathan Hartman
f608b37e3c tools/configure.sh: Update USAGE for custom out-of-tree boards
* tools/configure.sh:
  (USAGE): Explain both styles of usage:
   - <board-name>:<config-name> for in-tree boards
   - path to custom out-of-tree boards (relative to TOPDIR
     or absolute)

Suggested by TimH in mailing list discussion "build board from custom
directory" started 15 Sept 2022, archived:
https://lists.apache.org/thread/7t8k79mm4kxy9cbo7vmybd36nzh94qtd
2022-09-23 02:33:15 +08:00
chao an
7d2a8c9c8b ci/testcase: add launchxl-tms57004/nsh(Cortex-R4) into build list
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-23 02:32:21 +08:00
simbit18
4d7c15af5c arch/arm: fix conditional compilation term (#else)
Code fixing for the conditional compilation term (#else)
2022-09-23 01:36:08 +08:00
Xiang Xiao
8565882bb5 libc/stdio: Let STDIO_DISABLE_BUFFERING depends on FILE_STREAM
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-22 17:41:05 +02:00
Xiang Xiao
bdcd232c98 libc/netdb: Let LIBC_GAISTRERROR/NETDB_BUFSIZE/NETDB_MAX_IPADDR depends on LIBC_NETDB
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-22 17:41:05 +02:00
chao an
e46688c1ee net/tcp: use independent work to free the conn instance
I noticed that the conn instance will leak during stress test,
The close work queued from tcp_close_eventhandler() will be canceled
by tcp_timer() immediately:

Breakpoint 1, tcp_close_eventhandler (dev=0x565cd338 <up_irq_restore+108>, pvpriv=0x5655e6ff <getpid+12>, flags=0) at tcp/tcp_close.c:71
(gdb) bt
| #0  tcp_close_eventhandler (dev=0x565cd338 <up_irq_restore+108>, pvpriv=0x5655e6ff <getpid+12>, flags=0) at tcp/tcp_close.c:71
| #1  0x5658bf1e in devif_conn_event (dev=0x5660bd80 <g_sim_dev>, flags=512, list=0x5660d558 <g_cbprealloc+312>) at devif/devif_callback.c:508
| #2  0x5658a219 in tcp_callback (dev=0x5660bd80 <g_sim_dev>, conn=0x5660c4a0 <g_tcp_connections>, flags=512) at tcp/tcp_callback.c:167
| #3  0x56589253 in tcp_timer (dev=0x5660bd80 <g_sim_dev>, conn=0x5660c4a0 <g_tcp_connections>) at tcp/tcp_timer.c:378
| #4  0x5658dd47 in tcp_poll (dev=0x5660bd80 <g_sim_dev>, conn=0x5660c4a0 <g_tcp_connections>) at tcp/tcp_devpoll.c:95
| #5  0x5658b95f in devif_poll_tcp_connections (dev=0x5660bd80 <g_sim_dev>, callback=0x565770f2 <netdriver_txpoll>) at devif/devif_poll.c:601
| #6  0x5658b9ea in devif_poll (dev=0x5660bd80 <g_sim_dev>, callback=0x565770f2 <netdriver_txpoll>) at devif/devif_poll.c:722
| #7  0x56577230 in netdriver_txavail_work (arg=0x5660bd80 <g_sim_dev>) at sim/up_netdriver.c:308
| #8  0x5655999e in work_thread (argc=2, argv=0xf3db5dd0) at wqueue/kwork_thread.c:178
| #9  0x5655983f in nxtask_start () at task/task_start.c:129

(gdb) c
Continuing.
Breakpoint 2, tcp_update_timer (conn=0x5660c4a0 <g_tcp_connections>) at tcp/tcp_timer.c:178
(gdb) bt
| #0  tcp_update_timer (conn=0x5660c4a0 <g_tcp_connections>) at tcp/tcp_timer.c:178
| #1  0x5658952a in tcp_timer (dev=0x5660bd80 <g_sim_dev>, conn=0x5660c4a0 <g_tcp_connections>) at tcp/tcp_timer.c:708
| #2  0x5658dd47 in tcp_poll (dev=0x5660bd80 <g_sim_dev>, conn=0x5660c4a0 <g_tcp_connections>) at tcp/tcp_devpoll.c:95
| #3  0x5658b95f in devif_poll_tcp_connections (dev=0x5660bd80 <g_sim_dev>, callback=0x565770f2 <netdriver_txpoll>) at devif/devif_poll.c:601
| #4  0x5658b9ea in devif_poll (dev=0x5660bd80 <g_sim_dev>, callback=0x565770f2 <netdriver_txpoll>) at devif/devif_poll.c:722
| #5  0x56577230 in netdriver_txavail_work (arg=0x5660bd80 <g_sim_dev>) at sim/up_netdriver.c:308
| #6  0x5655999e in work_thread (argc=2, argv=0xf3db5dd0) at wqueue/kwork_thread.c:178
| #7  0x5655983f in nxtask_start () at task/task_start.c:129

Since a separate work will add 24 bytes to each conn instance,
but in order to support the feature of asynchronous close(),
I can not find a better way than adding a separate work,
for resource constraints, I recommend the developers to enable
CONFIG_NET_ALLOC_CONNS, which will reduce the ram usage.

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-22 23:33:00 +08:00
simbit18
d35307dacd stm32wl5/stm32wl5_rcc.h
fix conditional compilation term (#else)
2022-09-22 17:17:18 +02:00
chao an
59499c0bb2 arch/arm: fallback to common toolchain if armeb(endian big) is unavailable
Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-22 22:19:05 +08:00
Michal Lenc
9ebd7e525c imxrt: add support for ADC triggering by an external signal
Config option IMXRT_ADCx_ETC can now be used to select an external HW
trigger to be used instead of continous trigger. Continous trigger is
used if IMXRT_ADCx_ETC = -1 (default option). Otherwise the source signal
is routed through XBAR and used as a trigger.

Hardware triggering is currently limited to maximum of 8 channels.
HW trigger is automatically disabled if there are more than 8 channels.

The external triggering was tested with PWM signal as a source.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-09-22 22:13:56 +08:00
simbit18
5a085176fe stm32u5/stm32_rcc.h
fix conditional compilation term (#else)
2022-09-22 21:27:09 +08:00
zhangyuan21
40366f4153 sched: clear waitsem and msgwaitq after remove blocked 2022-09-22 16:32:44 +08:00