raiden00pl
bc178344a9
net/can: add an option to control CAN EXTID support
2022-02-06 17:09:11 +08:00
raiden00pl
341bbe38d5
arch/stm32: add FDCAN SocketCAN support
2022-02-06 17:09:11 +08:00
Petro Karashchenko
e545c440f4
arch/arm/samv7/sam_progmem: insert DMB instruction into data write loop
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This change fix the regression that was introduced with
https://github.com/apache/incubator-nuttx/pull/4904
In case if D-Cache in configured in Write-Through mode there is
Cortex-M7 erata 1313001 that describes a situation when linefill
buffer or cache contains stale data. Even if progmem write loop
does not fully matches the description there is a possibility
to program stale data if there is no DMB instruction after each
write operation to progmem latch buffer.
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-05 03:14:07 +08:00
Petro Karashchenko
47a09ed255
arch/arm/samv7: add arm_systemreset.c to CMN_CSRCS
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-04 16:40:50 +08:00
chao.an
ed4f852073
arch/arm: correct the sched_lock/spin_lock handling
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-03 11:09:18 -03:00
chao.an
d59931159a
arch/arm: fix leaving from critical section
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-02 21:45:13 +08:00
Xiang Xiao
4c167b0729
Correct the code alignment
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-01 21:22:21 -03:00
Petro Karashchenko
601a0e8a32
arch/arm/samv7: fix leaving from critical section in HSMCI callback
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-31 16:56:52 -03:00
Xiang Xiao
2c3020ddaf
arch/Toolchain.defs: Replace --print-file-name=libgcc.a with --print-libgcc-file-name
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to more compatable with clang: https://reviews.llvm.org/D25338
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-31 09:46:04 +01:00
Xiang Xiao
e0b62bf677
arch/Toolchain.defs: Don't expand EXTRA_LIBS immediately
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since board's Make.defs may overwrite ARCHCPUFLAGS
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-30 11:04:35 +09:00
David Sidrane
0f1342f36b
stm32:Add OTG ID GPIO disable
2022-01-30 01:50:37 +08:00
David Sidrane
99083b8dd1
stm32{f|h}7:Fixed typo in Kconfig help
2022-01-30 01:49:57 +08:00
chao.an
7d8c2c1ad6
cortex-m/doirq: do not update the CURRENT_REGS on nested interrupt handling
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current implementation incorrectly update CURRENT_REGS to interrupt context if
trigger nested interrupt, (e.g, hard fault occurs during interrupt handling)
this would ambiguous for programs using CURRENT_REGS, this patch will prohibit
the update of CURRENT_REGS on nested interrupt handling
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-01-29 01:04:00 +08:00
Xiang Xiao
1c2c0e4707
arch/Toolchain.defs: Simplify the builtin library addition for EXTRA_LIBS
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-28 12:02:38 +01:00
Petro Karashchenko
0ffffe19b1
typo: change evernt to event in comments
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-27 09:57:31 -03:00
Xiang Xiao
f903a55102
sched/tcbinfo: Fix the compile warning
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Update tcbinfo struct
armv8-m/arm_tcbinfo.c:109:3: warning: excess elements in struct initializer
109 | TCB_REG_OFF(REG_S31),
| ^~~~~~~~~~~
armv8-m/arm_tcbinfo.c:109:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:110:3: warning: excess elements in struct initializer
110 | 0,
| ^
armv8-m/arm_tcbinfo.c:110:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:111:3: warning: excess elements in struct initializer
111 | TCB_REG_OFF(REG_FPSCR),
| ^~~~~~~~~~~
armv8-m/arm_tcbinfo.c:111:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:112:3: warning: excess elements in struct initializer
112 | 0,
| ^
armv8-m/arm_tcbinfo.c:112:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:37:1: warning: missing braces around initializer [-Wmissing-braces]
37 | {
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-27 17:36:27 +08:00
zhuyanlin
644c2be3aa
armv7-a/r:cache: implemention clean&flush_dcache_all
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For armv7-a/r cache:
And clean_dcache_all, flush_dcache_all
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-27 15:15:28 +08:00
zhuyanlin
1b08f607be
arm/xtensa:cache: flush/clean dcache all if size large than cache size
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For performance, if size large than cache size, use xxx_all instead
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-01-27 15:15:28 +08:00
zhuyanlin
4d5c2586a9
armv7-a/r:cp15_invalidate_dcache_all: fix Sets mask error.
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As NumSets field is bits 13-27, use 0x7fff instead.
And add way to get from CCSIDR.
2022-01-27 15:13:08 +08:00
Petro Karashchenko
48211f90d3
ci: select ARMV7A_TOOLCHAIN_GNU_EABIL for ARMv7-A based builds
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-25 20:24:28 +08:00
Masayuki Ishikawa
7b1cf2dfac
arch: arm: Fix make export for armv7-a SoCs
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Summary:
- I noticed that make export does not work with swama5d4-ek:knsh
- This commit fixes this issue.
- NOTE: apps/Makefile also needs to be updated.
Impact:
- CONFIG_BUILD_KERNEL=y only
Testing:
- Build (make and make export) with sama5d4-ek:knsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-01-25 11:05:22 +08:00
Norman Rasmussen
da5659138b
Fix regression where used code was marked as unused
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Commit 5d1a444812
replaced __attribute__
((unused)) with unused_code but two instances of __attribute__ ((used))
were also incorrectly replaced. Add used_code/used_data and used them
instead.
2022-01-23 14:57:19 +08:00
raiden00pl
4c2dd3924a
include/nuttx/can.h: rename CAN_ERR_CTRL to CAN_ERR_CRTL for compatibility with libcanutils
2022-01-23 01:34:34 +08:00
Petro Karashchenko
6c27f3c19d
toolchain: add libm to EXTRA_LIBS only if it is provided by the compiler
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Some toolchains may be built without libm support, but using
such toochain should not generate any errors in case if math
functions are not used in the program
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-22 15:36:29 +08:00
Xu Xingliang
021363f1db
driver/mmcsd: add option to limit block count in multiple-block transfer mode.
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Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2022-01-22 14:59:26 +08:00
zouboan
0342272e5a
up_progmem_erasesize for stm32f20xxf40xx_flash.c
2022-01-21 14:57:32 +08:00
Xiang Xiao
2935751bfd
Fix error: implicit declaration of function 'up_cpu_index'
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 23:21:21 +08:00
Xiang Xiao
77792a1598
sched: Define CONFIG_SMP_NCPUS to 1 in no SMP case
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to simplify the SMP related code logic
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-20 23:21:21 +08:00
Petro Karashchenko
08043fb5bc
net: unify FAR keyword usage for all net buffer memory mapped buffers
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-20 01:42:56 +08:00
Petro Karashchenko
767cf282c7
boards/arm/samv7: move HSMCI interface to common
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-20 01:24:14 +08:00
Daniel Agar
12c8a9626c
stm32f7 serial fix PM_CONFIG build
2022-01-20 01:08:06 +08:00
Petro Karashchenko
a6147109b1
arch/arm/src/armv6-m: fix typo
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-19 15:32:58 +01:00
Xiang Xiao
8bcdefafc9
board: Remove -fno-strength-reduce
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-19 00:14:03 +01:00
Petro Karashchenko
9551de7115
net: use HTONS, NTOHS, HTONL, NTOHL macro in kernel code
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-18 10:59:47 +01:00
raiden00pl
e140ba1a21
arch/stm32: fdcan cosmetics
2022-01-17 09:36:00 -03:00
raiden00pl
c450dea6e5
stm32: add FDCAN support
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based on PR #2987
2022-01-17 09:36:00 -03:00
Petro Karashchenko
4f98ac4879
arch/arm/samv7: implement quadrature encoder driver
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-17 09:35:12 -03:00
Petro Karashchenko
8d3bf05fd2
include: fix double include pre-processor guards
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
chao.an
c27839f98e
arm/xtensa: save the running registers to xcp context
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-01-15 02:20:01 +08:00
Jari van Ewijk
3aed0aa641
S32K1XX: implement uniqueid
2022-01-13 15:34:47 -08:00
Jari van Ewijk
0fc613f0b3
S32K1XX Reset Cause PROCFS: Add Kconfig option and cleanup
2022-01-13 01:29:42 +08:00
Xiang Xiao
1b77ae88ef
fs/procfs: Remove the unnecessary strcmp
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since the procfs already make the same check for us
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-01-12 07:19:40 +01:00
Petro Karashchenko
a743fed63d
file_operations: get back C89 compatible initializer
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-11 02:14:00 +08:00
Petro Karashchenko
1fd51ccbe2
arch/arm/samv7: rework SAMv7 timer counter implementation
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There are two issues that are addressed with this change:
- According to SAM E70/S70/V70/V71 Family datasheet the
timer counter channels are 16-bit so timer counter
value should be changed from uint32_t to uint16_t
- The interrupt handling for timer counter channels can
be simplified
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-09 17:43:31 +08:00
Petro Karashchenko
e7f9c7af21
typos: fix typos in Kconfig files
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-08 06:46:26 -03:00
chao.an
8c35d31808
Kconfig: Remove CONFIG_ prefix from config definition
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Signed-off-by: chao.an <anchao@xiaomi.com>
2022-01-07 13:16:18 +08:00
raiden00pl
6fe95d8314
stm32: add SocketCAN support, based on stm32_can.c
2022-01-05 06:16:41 -08:00
Zeng Zhaoxiu
fb43fd73ed
signal: signal handler may cause task's state error
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For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.
Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
2022-01-05 21:36:44 +09:00
raiden00pl
5b9b3814f8
stm32: add CAN error support
2022-01-05 18:33:06 +08:00
Petro Karashchenko
4b190fbce1
arch/arm/samv7: correct number on interrupts
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 22:10:22 +08:00