Commit Graph

76 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
7fe096c65e risc-v: Fix typos reported by codespell 2021-02-25 16:25:47 +00:00
hotislandn
30cb7d3983 arch:rv32:up_sigdeliver missing fpu contexts.
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-02-24 23:42:18 -08:00
Dong Heng
b11a5ca8b2 risc-v/esp32c3: Add ESP32-C3 basic support
Co-authored-by: Dong Heng <dongheng@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-18 01:21:53 -08:00
hotislandn
84daebf2cc arch:risc-v:bl602: enable FPU for this target. 2021-02-08 00:29:34 -08:00
Abdelatif Guettouche
6547c3df55 arch/riscv: Fix file names in headers that were still using the old 'up_' prefix.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-05 21:19:20 -03:00
Abdelatif Guettouche
52b4c73a61 arch/riscv: Remove references to MIPS.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-30 15:46:38 -08:00
Xiang Xiao
94da3e4c3a arch: Remove critical section inside up_schedule_sigaction
since nxsig_tcbdispatch already hold it for us

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2fe6ad840bdca3ec0eaa76a9af3b6929c7d5a721
2021-01-22 08:34:07 +01:00
Xiang Xiao
41d576f62b arch/riscv: Reuse the common up_schedule_sigaction implementation
to avoid the code duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-20 20:26:27 -08:00
Xiang Xiao
efee1c6ded arch: Initialize the idle thread stack info directly
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-16 09:54:29 +09:00
YAMAMOTO Takashi
c934214bb3 arch/risc-v/src/rv32im/riscv_sigdeliver.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
YAMAMOTO Takashi
263e4b991f arch/risc-v/src/rv32im/riscv_swint.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
zhongan
a396b191d4 rv32im: set compressed instruction enabled as default.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-11-17 18:53:10 -08:00
zhongan
9eae6edfde rv32im: fix typo.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-11-17 18:53:10 -08:00
Yoshinori Sugino
3de85be15a arch/risc-v/src: Branch to up_sigdeliver() with interrupts disabled
When executing an MRET instruction, MIE is set to MPIE.
In order to branch to up_sigdeliver() with interrupts disabled,
we need to change MPIE, not MIE.
2020-09-28 22:41:46 -07:00
Yoshinori Sugino
698008d1e5 Fix typos 2020-09-28 13:54:43 +08:00
zhongan
6240977341 rv32im: add missing call of 'up_savefpu'.
Change-Id: Iaf2e212a4fdea2f5f04a178d24755e0e37a30ef6
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-23 10:22:45 +01:00
Xiang Xiao
bf7399a982 arch: Initialize idle thread stack information
and remove the special handling in the stack dump

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
2020-09-16 06:57:29 -07:00
Gregory Nutt
55a9172bc2 Fix Cygwin build with Windows native toolchain
PR #1450 broke the Cygwin build.  Refer to Issue #1672.

The use of of logic like:

    EXTRA_LIBPATHS += -L "${dir ${shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcc.a}}"

fails when the Toolchain $(CC) is a native Windows toolchain.  That is because the returned path is a Windows-style patch which cannot be handled by the make 'dir' command.  Commit 4910d43ab0 reorganized a lot of definitions and replaced the correct code with the use of the limit make 'dir' command.  The original code used the Bash dirname command which does not suffer from this limitation; it can handle both POSIX and Windows paths.

This was verified using the stm32f4discover:nsh toolchain with the Windows native ARM Embedded toolchain.  That toolchain returns:

    arm-none-eabi-gcc --print-file-name=libgcc.a
    c:/program files (x86)/gnu tools arm embedded/9 2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/libgcc.a
2020-09-01 10:20:28 +08:00
Yoshinori Sugino
728d5efed6 arch/risc-v/src: Cosmetic change
Replace spaces with a tab
2020-08-14 10:27:23 +01:00
Xiang Xiao
5efa93ec26 arch/Toolchain.defs: Change all ARCROSSDEV to CROSSDEV
ARCROSSDEV always equals to CROSSDEV, so it is no reason to keep ARCROSSDEV.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-20 23:50:59 -07:00
Xiang Xiao
b329e2377d boards: Move toolchain related variables to Toolchain.defs
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
2020-07-20 17:10:37 +01:00
Xiang Xiao
47f2090410 arch: Change --print-file-name=libgcc.a to --print-libgcc-file-name
Since the new option is more compatible with clang

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-19 18:26:31 -07:00
Xiang Xiao
d6827cab60 arch: up_assert shouldn't call exit directly
since exit will be only callable from userspace and change
the 1st argument from "const uint8_t *" to "const char *"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I86487d57210ab63109148232da71dbc4d60a563b
2020-07-19 01:21:36 +01:00
Xiang Xiao
4910d43ab0 build: Move the toolchain library setting to the common place
so all boards support C++ automatically
2020-07-16 15:38:08 -03:00
ligd
36a0978952 arch/risc-v/src/rv32im: update & complete risc-v rv32im arch
1. add schedulesigaction.c
2. add SYS_save_context handling
3. Skip ECALL instruction when up_swint()

Change-Id: Id52c6dd9ee1052441957b73463c00d3fd26555c5
Signed-off-by: ligd <liguiding@fishsemi.com>
2020-06-30 09:31:21 -03:00
Xiang Xiao
bd656888f2 build: Replace WINTOOL with CYGWIN_WINTOOL Kconfig
so the correct value can be determinated by Kconfig system automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-18 15:02:55 -06:00
Gregory Nutt
d823a3ab3e sched/: Make more naming consistent
Rename various functions per the quidelines of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-16 13:39:03 -03:00
Gregory Nutt
f92dba212d sched/sched/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 16:58:42 -03:00
Gregory Nutt
a4218e2144 include/nuttx/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 14:19:08 -03:00
Gregory Nutt
3dca5eba15 Completes the Implementation of the TLS-based errno
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions.  The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno.  Replace old TCB access to the errno with TLS access to the errno.
2020-05-07 23:11:34 +01:00
Ouss4
d56c613b7d arch/avr,renesas,risc-v: The *_getsp function was moved to a header
file, remove it from the different source files that used to implement
it to avoid redefinitions.
2020-05-06 21:56:40 -06:00
Xiang Xiao
94bb2e05bb syslog: Code outside libc shouldn't call nx_vsyslog directly
since nx_vsyslog is the implementation detail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Ouss4
21302fcdae arch/risc-v/src: Rename files starting by up_ to risc_ to conform to the
naming standard.
2020-04-30 20:48:32 -06:00
Nathan Hartman
d6f7821b15 Docs and comments: Change OSX -> macOS
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
2020-04-26 07:48:33 -06:00
zhongan
0d3691a460 Add fpu support. 2020-04-14 13:01:47 -06:00
zhongan
7262af219f rv32im/Toolchain.defs: when 'CONFIG_ARCH_FPU' enabled, add 'f' to match and mabi. 2020-04-14 13:01:08 -06:00
zhongan
bf21c1b947 Risc-v: Fix the not supported options in the latest 'RISCV_TOOLCHAIN' in rv32im's Toolchain.defs. 2020-04-14 13:00:53 -06:00
Nathan Hartman
a5e643b0cd Fix typos in comments and documentation. 2020-03-16 20:01:11 -06:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-02-23 22:27:46 +01:00
Juha Niskanen
15b78abccf Fix typos in comments 2020-02-14 08:50:45 -06:00
Xiang Xiao
80277d1630
Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189)
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
2020-01-31 09:24:49 -06:00
Xiang Xiao
6a3c2aded6 Fix wait loop and void cast (#24)
* Simplify EINTR/ECANCEL error handling

1. Add semaphore uninterruptible wait function
2 .Replace semaphore wait loop with a single uninterruptible wait
3. Replace all sem_xxx to nxsem_xxx

* Unify the void cast usage

1. Remove void cast for function because many place ignore the returned value witout cast
2. Replace void cast for variable with UNUSED macro
2020-01-02 10:54:43 -06:00
Masayuki Ishikawa
a5501cf853 Merged in masayuki2009/nuttx.nuttx/riscv-updates (pull request #1080)
riscv updates

* arch: risc-v: Remove up_dumpstate.c because the file had been merged into up_assert.c

* boards: gapuino: Modify Makefile which conforms to NuttX standards

* boards: nr5m100-nexys4: Modify Makefile which conforms to NuttX standards

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-12-01 13:01:04 +00:00
Masayuki Ishikawa
7a8e9581ca Merged in masayuki2009/nuttx.nuttx/hifive1-qemu (pull request #1078)
HiFive1 with qemu

* arch: risc-v: Add include/.gitignore

* arch: risc-v: Add src/.gitignore

* arch: risc-v: Remove uncommon function prototypes in include/irq.h

* arch: risc-v: Add missing symbols and function prototypes in src/common/up_internal.h

* arch: risc-v: Add src/common/up_modifyreg32.c

* arch: risc-v: Enable include Make.dep in src/Makefile

* arch: risc-v: Fix stack coloration in common/up_createstack.c

* arch: risc-v: Add common/up_puts.c

* arch: risc-v: Add common/up_checkstack.c

* arch: rv32im: Move all logics from up_dumpstate.c to up_assert.c

    This change is same as other architectures like arm/src/armv7-m

* arch: Select ARCH_HAVE_STACKCHECK for RISC-V in Kconfig

* arch: risc-v: Add SiFive fe310 processor

    NOTE: Currently only tested with qemu

* boards: hifive1-revb: Add SiFive hifive1-revb board

    NOTE: Currently only tested with qemu

* tools: Add fe310 processor to configure.sh

Approved-by: Alan Carvalho de Assis <acassis@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-11-28 20:37:24 +00:00
Gregory Nutt
69318b1024 Re-implements reverted commit 344f7bc9f6 in a way that should not have the undesired side-effect. include/nuttx/sched.h: Add a bit to the TCB flags to indicat the thread is a user thread in a syscall. sched/nuttx/nxsig_dispatch.c: Delay dispatching to signal handlers if within a system call. In all syscall implementations: Process delayed signal handling when exiting system call. 2019-11-28 12:47:36 -06:00
Gregory Nutt
cbdd590c82 Revert "include/nuttx/sched.h: Add storage for a previous signal mask. arch/: In all syscall implementations, block all signals before dispatching a system call; resotre signal mask when the system call returns."
Using the sigprocmask() for this purpose has too many side-effects.

This reverts commit 344f7bc9f6.
2019-11-28 11:57:54 -06:00
Gregory Nutt
344f7bc9f6 include/nuttx/sched.h: Add storage for a previous signal mask. arch/: In all syscall implemenations, block all signals before dispatching a system call; resotre signal mask when the system call returnes. 2019-11-28 10:51:29 -06:00
Nathan Hartman
46aaec7ba0 Fix minor typos in docs and comments. 2019-09-29 12:52:20 -06:00
Nathan Hartman
68d43d3679 Fix typos. 2019-08-04 14:50:28 -06:00