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1177 Commits

Author SHA1 Message Date
Xiang Xiao
bc3e6c84e1 arch: Rename up_[early]serialinit to [arm64|riscv|x86_64][early]serialinit 
The naming standard at:
https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+Architecture%2C+MCU%2C+and+Board+Interfaces
requires that all MCU-private function begin with the name of the architecture, not up_.

follow the change from: https://github.com/apache/nuttx/pull/930

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-03-27 12:35:04 +03:00
chao an
0eae218b49 arm/chip/sdio/muxbus: comment all undefined symbols 
comment all undefined symbols to avoid build break if CONFIG_SDIO_MUXBUS enabled

Signed-off-by: chao an <anchao@xiaomi.com>
 2023-03-26 13:04:48 -03:00
Xiang Xiao
901cd599b1 arch: Remove MIN macro definition 
use the definition from sys/param.h instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-03-22 17:26:37 -03:00
Gustavo Henrique Nihei
e205d790ee risc-v/espressif: Fix inconsistencies in IRQ interface documentation 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-17 16:51:52 -03:00
Tiago Medicci Serrano
7b807a8540 esp32-esp32c3/wifi: remove naming inconsistencies 
* Remove the 'COEXISTENCE' suffix from Wi-Fi's STA + SoftAP mode.
Coexistence usually refers to Wi-Fi + BLE, instead of Wi-Fi's
operation mode;
* Remove commented debug code;
* Remove outdate function descriptions;
 2023-03-16 19:07:25 +01:00
Gustavo Henrique Nihei
b864f37613 risc-v/espressif: Add Watchdog support on top of MWDT0 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-14 23:55:35 +01:00
Gustavo Henrique Nihei
81499fcdf2 risc-v/espressif: Add support for ESP32-H2 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-14 23:55:35 +01:00
Gustavo Henrique Nihei
c149e52791 risc-v/espressif: Add support for ESP32-C6 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-14 23:55:35 +01:00
Gustavo Henrique Nihei
17f7f6e86d risc-v: Add Espressif chip family support on top of esp-hal-3rdparty 
Initially supporting ESP32-C3 chip, to be followed by other RISC-V-based
chips from Espressif.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-14 23:55:35 +01:00
zhangyuan21
12bb4f04f1 arch: fixed error in the calculation of nwords caused an out of bounds 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2023-03-13 16:12:11 +09:00
Zhihong Chen
8f74ce8ac4 boards:riscv:hpm6750evk2: revised README.txt to config toolchain 
- use hpmicro GNU riscv32 toolchain

Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
 2023-03-09 07:56:00 +02:00
Zhihong Chen
698f5f3e80 arch/riscv/Toolchain: add riscv32-unknown-elf selection 
- user can use menuconfig to select riscv64-unknown-elf or riscv32-unknown-elf

Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
 2023-03-09 07:56:00 +02:00
Gustavo Henrique Nihei
1f54c024da espressif: Fix download of IDFboot binaries 
It was broken after #8759, which erroneously substituted with MCUboot

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-03-08 15:55:35 -03:00
Karel Kočí
62661600b2 treewide: add DOWNLOAD variable as unification of curl call 
This is a followup to the commit
03b164f59c.
 2023-03-08 17:05:05 +08:00
Jari Nippula
aeddec2ec5 clear i2c ints before the transfer starts 
If transfer is restarted in irq handler the interrupts shall be
cleared before the start bit is set in control register. This is
to avoid ints being accidentally cleared before they are handled leading
to timeout error.
 2023-03-02 22:25:56 +08:00
Jari Nippula
6ba906691a clear spi int before the transfer starts 
In spi_irq handler the data is written into txfifo and transfer
is started before the TXDONE interrupt is cleared. If the bus/memory
access is in some cases delayed, the spi transfer may have been
finished already before the interrupt register is cleaned for the
transfer. This leads the early arrived interrupt to be just removed
and never handled, which would cause a timeout error.
This patch moves the clearing of the interrupt to the place before
the tx is started, so the interrupt is not missed in above cases.
 2023-03-02 22:05:25 +08:00
Gustavo Henrique Nihei
e4d219ca06 risc-v/esp32c3: Remove erroneous interrupt disable 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-02-28 22:14:54 +02:00
Alan Carvalho de Assis
49a5f02fb1 esp32c3: Fix missing irq timer 2023-03-01 01:22:24 +08:00
Huang Qi
8a389a06e1 Don't download tarball if a local git repo found 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2023-02-27 23:55:23 +08:00
Xiang Xiao
2c5f653bfd Remove the tail spaces from all files except Documentation 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-02-26 13:24:24 -08:00
lilei19
38f64f559d change strcpy to strlcpy 
Signed-off-by: lilei19 <lilei19@xiaomi.com>
 2023-02-24 12:15:40 +08:00
Alan Carvalho de Assis
119dabaf73 esp32c3: Fix WDT incorrect interrupt enable/disable 2023-02-23 21:57:15 +02:00
Xiang Xiao
8b4ecac6c2 libc: Move math library from libs/libc/math to libs/libm/libm 
to prepare the support of other implementation e.g.:
https://github.com/JuliaMath/openlibm
https://gitlab.com/gtd-gmbh/libmcs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-02-23 10:40:07 +02:00
Fotis Panagiotopoulos
85ceb7920e Typo fixes. 2023-02-17 11:17:11 -03:00
Eero Nurkkala
b9ba262fb7 risc-v/mpfs: add athena irq defines 
Add the Athena cryptographic microprocessor irq defines.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2023-02-15 00:21:03 +08:00
chenwen@espressif.com
cfc9029c5d risc-v/esp32c6: Add ESP32-C6 basic support 
1. Bring up OS kernel.
  2. Add interrupt support.
  3. Add system timer support.
  4. Add the ESP32-C6 devkit board.
  5. Add basic UART support for console.
  6. Add clock configuration.
  7. Add board reset support.
 2023-02-10 17:38:41 -03:00
Zhihong Chen
d082af34f7 add hpmicro chip: hpm6750 
Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
 2023-02-09 14:17:49 +08:00
Lucas Saavedra Vaz
14d95eb131 arch/risc-v/esp32c3: Add RTC interrupt support 2023-02-08 10:42:19 +08:00
Ville Juven
f4b82b6405 sched/addrenv: Remove up_addrenv_restore 
The function is not relevant any longer, remove it. Also remove
save_addrenv_t, the parameter taken by up_addrenv_restore.

Implement addrenv_select() / addrenv_restore() to handle the temporary
instantiation of address environments, e.g. when a process is being
created.
 2023-02-08 02:51:23 +08:00
Ville Juven
5713d85df0 group/group_addrenv: Move address environment from group -> tcb 
Detach the address environment handling from the group structure to the
tcb. This is preparation to fix rare cases where the system (MMU) is left
without a valid page directory, e.g. when a process exits.
 2023-02-08 02:51:23 +08:00
Nathan Hartman
5f9cb6faf4 drivers/serial: Fix docstrings on UART interrupt handlers 2023-02-07 04:41:36 +08:00
chao an
7625126c91 Remove the remain MIN/MAX like macro 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-02-03 23:22:41 +08:00
Alan Carvalho de Assis
e710ae5daf esp32c3: reserve CPUINTs 5 and 8 for BLE 2023-02-03 12:24:11 +08:00
Alan Carvalho de Assis
c12a60cb5a esp32c3: Fix WiFi adapter to use WMAC instead of MAC_NMI 2023-02-03 12:24:11 +08:00
Alan Carvalho de Assis
e950e53df2 esp32c3: Always reserve CPU INT 0 and fix cpu init order 
Co-author: Tiago Medicci <tiago.medicci@espressif.com>
Co-author: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-02-03 12:24:11 +08:00
Xiang Xiao
df102d1f06 Remove OK macro from the code base 
let's use OK from sys/types.h instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-02-02 13:58:16 +01:00
chao an
4c8d244fae sched/getpid: replace syscall getpid/tid/ppid() to kernel version 
NuttX kernel should not use the syscall functions, especially after
enabling CONFIG_SCHED_INSTRUMENTATION_SYSCALL, all system functions
will be traced to backend, which will impact system performance.

Signed-off-by: chao an <anchao@xiaomi.com>
 2023-02-02 10:33:01 +08:00
Gustavo Henrique Nihei
e6b204f438 nuttx: Use MIN/MAX definitions from "sys/param.h" 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2023-02-01 23:47:44 +08:00
Stuart Ianna
05c6d7c7b9 litex: Add PWM driver. 
PWM driver for multiple peripherals supplied in gateware.

Only single channel frequency and duty cycle control is implemented. Pulse counting and multichannel features are not currently feasible.

Additions also include a new board configuration for arty-a7 which enables the PWM driver and example application.
 2023-02-01 09:34:57 -03:00
Huang Qi
8b27d60bcd tools: Make zig available for arm/riscv/sim 
Add essential compile flags to make zig available out of box.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2023-02-01 11:12:44 +08:00
Stuart Ianna
26ac5335e5 litex: Add GPIO driver. 
GPIO driver with optional ISR support. Allows for multiple GPIO peripherals to be specified at an arbitrary addresses.
 2023-02-01 11:02:03 +08:00
Xiang Xiao
9f027208d4 fs: Add model field to geometry and mtd_geometry_s 
the model is very useful to track the device info

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-01-31 11:50:28 -03:00
yinshengkai
3f97a87162 tools: add separate flags parameter for COMPILE/COMPILEXX 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2023-01-31 13:42:33 +08:00
Huang Qi
570c7587c7 risc-v/Toolchain.defs: Correct indent 2023-01-31 11:19:47 +08:00
lilei19
1d8af7e105 add holder for mutex 
Signed-off-by: lilei19 <lilei19@xiaomi.com>
 2023-01-31 12:08:05 +09:00
Nathan Hartman
6b89b6f945 Remove executable permissions from source files 
* arch/arm/src/sama5/sam_flexcom_spi.h,
  arch/risc-v/src/mpfs/mpfs_ihc_sbi.c,
  drivers/usbdev/adb.c,
  libs/libc/math/lib_scalbn.c,
  libs/libc/math/lib_scalbnf.c,
  net/ipfrag/Make.defs,
  net/ipfrag/ipfrag.c,
  net/ipfrag/ipfrag.h,
  net/ipfrag/ipv4_frag.c,
  net/ipfrag/ipv6_frag.c: Remove executable permission.
 2023-01-30 20:34:51 -03:00
zhangyuan21
e6d2f0623a backtrace: use CURRENT_REGS when in interrupt context 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2023-01-29 02:48:00 -08:00
Ville Juven
42d0e356c2 arch/addrenv: Change group_addrenv_t to arch_addrenv_t 
This is preparation for moving address environments out of the group
structure into the tcb.

Why move ? Because the group is destroyed very early in the exit phase,
but the MMU mappings are needed until the context switch to the next
process is complete. Otherwise the MMU will lose its mappings and the
system will crash.
 2023-01-27 23:17:01 +08:00
Gustavo Henrique Nihei
80bbb0f24c esp32c3: Fix IRQ initialization, it was crashing on DEBUG_ASSERTIONS 
Co-author: Alan C. Assis <alan.carvalho@espressif.com>
 2023-01-27 13:15:39 +08:00
chao an
931a4f6969 arch/EXTRA_LIBS: link all staging library 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-01-27 01:08:26 +02:00