Nimish Telang
4afd25b567
this flag is meaningless for the linker
2022-06-27 20:03:03 -03:00
Alan Carvalho de Assis
4eddde90b0
esp32s3: Add support to USBSERIAL to use as console
2022-06-16 17:20:32 +03:00
Abdelatif Guettouche
996995245d
xtensa: Remove old references to co-processors.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 22:06:08 +03:00
Abdelatif Guettouche
9bac291236
arch/xtensa/*.S: Remove some old comments and fix others.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
fe8fa4ff75
arch/xtensa: Move the new saving area directly to A2.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
5ab888692e
arch/xtensa/xtensa_context: Place the functions in EXCEPTION_HANDLER
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section (IRAM for ESP32xx chips).
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
73a1e0fc58
arch/xtensa: Refactor exceptions' entry and exit.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
1c94cb5324
arch/xtensa: Refactor the differences in ABI calls.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
48f20af8bc
arch/xtensa/xtensa_int_handlers.S: Remove unused macro.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
fc22eddc38
arch/xtensa: Refactor the code that's used to get the pre-exception
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backtrace.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
05d412f6b5
arch/xtensa/xtensa_user_handler.S: Use the ps_setup macro when possible.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 18:07:51 +03:00
Abdelatif Guettouche
0aa14f91da
arch/xtensa/esp32_rtc_lowerhalf.c: nitialize ret variable to avoid
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warnings.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-15 21:29:55 +08:00
Abdelatif Guettouche
1f90e5a5b0
arch/xtensa: Don't build xtensa_coproc.S, it has only macros and is
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included when needed.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-13 21:32:23 +03:00
Norman Rasmussen
e6376c72d7
Fix CONFIG_ALLSYMS
for arm, risc-v and xtensa after #5496
2022-06-13 11:39:06 +08:00
Xiang Xiao
28b25e0391
arch: dump "<noname>" as the task name if CONFIG_TASK_NAME_SIZE equals 0
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
Xiang Xiao
2b2830c252
arch/assert: Replace twice strlcpy with single snprintf
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
Xiang Xiao
b02db04e00
arch/assert: Keep the thread dump column order same as ps
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
Xiang Xiao
c52a19c8dc
arch: Include nuttx/tls.h in *_assert.c
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to avoid error: "invalid use of undefined type 'struct task_info_s'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-07 20:17:23 +03:00
ligd
118fd3902c
dump_task: also dump thread param when dump thread name
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Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-06-07 20:17:23 +03:00
Abdelatif Guettouche
8217c646a7
arch/xtensa/xtensa_coproc.S: Fix the condition to save the coprocessors
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state.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-07 19:50:50 +08:00
Abdelatif Guettouche
060df22968
arch/xtensa: Initialize the internal heap early.
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We might have a situation where an allocation will be requested before
the call to `up_initialize` is performed. For the current code, this
situation is the stack for the CPUs in SMP mode.
Beside this issue, it's natural to have the internal heap initialized
with the other heaps.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-07 02:32:30 +08:00
Xiang Xiao
11e1a8b28b
arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h
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follow up the below change:
commit 6357523892
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Mon Nov 1 12:40:51 2021 +0800
arch: Add _wchar_t typedef like other basic types
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 22:25:49 +03:00
zhanghongyu
035d925864
devif: remove all devif_timer
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Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2022-06-02 20:11:50 -03:00
Abdelatif Guettouche
c7823f7914
arch/xtensa/xtensa_sigdeliver.c: Remove old code that was preventing
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jumping back to the assembly signal trampoline and getting into its
infinite loop.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-05-31 17:40:54 +08:00
Abdelatif Guettouche
c99776659f
xtensa: Delete the assembly signal trampoline.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-05-31 17:40:54 +08:00
chao.an
3f65b562bb
arch: inline up_interrupt_context()
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inline the up_interrupt_context() to avoid unnecessary stack pushes
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-26 04:36:07 +08:00
Alan Carvalho de Assis
d4b0fc9eb4
xtensa/esp32s3: Add basic support to SPI
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Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-25 16:10:29 -03:00
Gustavo Henrique Nihei
b4392f7323
xtensa/esp32: Fix leak of semaphores created by Wi-Fi kernel thread
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-25 09:46:30 +09:00
zhuyanlin
0e478e559f
xtensa: coproc: modify coproc_save/restore to macro
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As coproc_save/restore only used in context_restore/save.
Use macro instead of function.
Some register use optimize.
Unify with arm/riscv.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-24 14:11:58 +09:00
Abdelatif Guettouche
2a8b2cad17
esp32_cpuidlestack.c: Remove unnecessary code.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-05-24 08:59:10 +09:00
zhuyanlin
23d35336ad
xtensa:esp32: enable cp processor of app core
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Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-23 22:02:24 +02:00
YAMAMOTO Takashi
0b547e2384
esp32: Implement up_textheap_heapmember
2022-05-20 21:16:42 +08:00
zhuyanlin
b71a1f77c3
xtensa: add perf counter
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Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-18 19:11:32 +03:00
Gustavo Henrique Nihei
aefe78a884
xtensa: Add missing input operand on sys_call6 inline ASM
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-18 15:46:57 +02:00
Xiang Xiao
b30e0a26ef
Move "-nostartfiles -nodefaultlibs" from Make.defs to Toolchian.defs
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and replace "-nostartfiles -nodefaultlibs" with "-nostdlib"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-18 08:26:02 -04:00
Abdelatif Guettouche
06f2c67fc2
xtensa.h: Remove old prototype.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-05-16 23:38:09 +08:00
zhuyanlin
883337c3a0
xtensa:fpu: add up_fpucmp and enable CONFIG_ARCH_FPU macro
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For arch with CP_NUM > 0, enable ARCH_FPU
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-16 12:30:39 +03:00
Xiang Xiao
1f920e55d3
Move warning option from Make.defs to Toolchain.defs
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 15:40:35 +03:00
Xiang Xiao
8b7c5b039d
arch: Move -fsanitize=kernel-address to ARCHOPTIMIZATION
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 15:40:35 +03:00
Xiang Xiao
2976accd9f
arch: Remove the extra space before the function prototype
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 13:55:58 +03:00
Xiang Xiao
1fb8c13e5e
Replace nxsem_timedwait_uninterruptible with nxsem_tickwait_uninterruptible
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 13:55:58 +03:00
Xiang Xiao
816ce73ab4
Replace nxsem_timedwait with nxsem_tickwait
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 13:55:58 +03:00
Gustavo Henrique Nihei
be9fc59b07
xtensa: Implement syscalls required for Protected Mode
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-14 21:38:12 +08:00
zhuyanlin
ad57791fe0
arch:xtensa: remove struct xtensa_cpstate_s as no need used
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Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-13 15:28:45 +02:00
zhuyanlin
f423f94d08
arch:xtensa: modify xtensa_context_save/restore function
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with FPU registers in xcp context, use pointer instead of double
pointer
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-13 15:28:45 +02:00
zhuyanlin
1dc39689ff
xtensa: move fpu register to XCPTCONTEXT_REGS
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1 move fpu register to XCP_REGS
2 move save & restore fpu register to context_save/restore
Consistency with other archs.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-13 15:28:45 +02:00
Gustavo Henrique Nihei
ba2829adb2
xtensa: Fix argument passing for sys_call5 and sys_call6 functions
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-05-13 10:43:00 +09:00
Xiang Xiao
1ba316b5c7
arch: Remove board/libboard$(LIBEXT) from the rerequest of export_startup
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-12 23:34:31 +03:00
wangbowen6
bc61e71b94
crypto: change type uint32_t to size_t in aes_cypher() arguments.
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Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-12 22:28:54 +08:00
zhuyanlin
b99ba04a8c
arch:xtensa: Add SYS_flush_context syscall
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This syscall do nothing as flush context was done in interrupt handler.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-05-11 10:48:53 +02:00