sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
49,992 Commits 1 Branch 0 Tags 291 MiB
bcaa52e0f1
Commit Graph

20889 Commits

Author SHA1 Message Date
chao an
f10b54a081 cmake: fix CMake build break 
Signed-off-by: chao an <anchao@xiaomi.com>
 2023-07-15 23:32:36 +08:00
chenrun1
cafbbb1ded armv7amr/v8m:Modify hardcodes to macro definitions and update commit. 
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-15 15:11:07 +08:00
chenrun1
9c2bc0edbe armv7m/v8m:Restore the CSSELR state before setting. 
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-15 15:11:07 +08:00
chenrun1
823c3b32e7 armv8m:fix warning up_get_cache_size defined but not used. 
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-15 15:11:07 +08:00
chenrun1
665a140b21 armv7/v8:Fix configuration csselr default configuration error. 
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-15 15:11:07 +08:00
chenrun1
22d1059c97 armv7/8 cache: add up_get_xcache_size() support 
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-15 15:11:07 +08:00
chenrun1
09da8fb651 armv7/8 cache:CSSELR should be set before getting cache info 
According to the ARMv7a/r/m and ARMv8m architecture manuals
The allowed values are
0 Data or unified cache.
1 Instruction cache.

"One CCSIDR is implemented for each cache that can be accessed by the processor. CSSELR selects which Cache Size ID Register is accessible, see c0, Cache Size Selection Register (CSSELR)."

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-15 15:11:07 +08:00
raiden00pl
97309dd22d cmake: fix nrf91 modem static library build 2023-07-15 00:56:33 +08:00
liaoao
8706d68318 assert: check intstack_sp when print last stack in irq context 
Signed-off-by: liaoao <liaoao@xiaomi.com>
 2023-07-14 21:36:11 +08:00
liaoao
1ed09f804e vfork: modify struct vfork_s 
fp is just an alias of r11, it  not really used for
framepointer in t32 mode.

Signed-off-by: liaoao <liaoao@xiaomi.com>
 2023-07-14 20:48:51 +08:00
simbit18
d991ef77e8 Fix nuttx coding style 
Remove TABs
Fix indentation
 2023-07-14 20:48:24 +08:00
simbit18
a8939f6d4b arch/sparc/src/bm3823/bm3823.h: Fix the name of the constant BM3823_Is_interrupt_pending 
Remove TABs and spaces from the name of the constant BM3823_Is_interrupt_pending
 2023-07-14 20:48:09 +08:00
raiden00pl
019b7a39d4 cmake: cmse support for armv8-m 2023-07-13 23:49:02 +03:00
zhangyuan21
b7216d54ff arm64: Use the correct cpu id for fpu idle task init 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2023-07-14 01:17:02 +08:00
simbit18
b0965ab963 Fix nuttx coding style 
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.
 2023-07-14 01:16:06 +08:00
zhangyuan21
d8797bde4e arm_gicv2: accesses the non-secure copy in non-secure state 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2023-07-14 01:15:13 +08:00
zhangyuan21
601202ee4a arm64: Use the correct aff in up_affinity_irq function 
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
 2023-07-14 01:13:01 +08:00
simbit18
1b1ac6f3b7 Fix nuttx coding style 
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.

Fix nuttx coding style

Fix Comments to the Right of Statements.
 2023-07-13 19:30:56 +08:00
chenrun1
4d285cb14d xtensa_saveusercontext:Leave the context information empty 
In the current implementation of other architectures, it is not really implemented to preserve the context, so it is emulated from other architectures to clear the context.
If this behavior is not implemented, it will cause the xtensa architecture processor to loop assert in the active assert case

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-13 09:48:46 +08:00
raiden00pl
a59f82b8d2 cmake: support pre-processor for linker script 2023-07-13 03:05:39 +08:00
chenrun1
3bdba79851 armv8m/arm_hardfault.c:fix code style. 
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-13 03:05:28 +08:00
chenrun1
842adf888f armv8m/arm_hardfault:add arm_gen_nonsecurefault information 
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
 2023-07-13 03:05:28 +08:00
raiden00pl
f7905512be stm32h7: add LTDC support 2023-07-12 11:30:57 -03:00
raiden00pl
8ceff0dc5a arm/stm32h7: Add STM32H745 family 2023-07-12 11:30:57 -03:00
raiden00pl
ad6361f0cc cmake: fix build after c33d1c9c97 (vfork -> fork) 2023-07-12 09:47:54 -03:00
raiden00pl
6dcfe61b0e cmake: add support for stm32h7 2023-07-11 15:52:56 -03:00
raiden00pl
ab6fd2e6c8 cmake: add support for stm32f7 2023-07-11 15:52:56 -03:00
raiden00pl
ca3d213402 cmake: sync arch/stm32/CMakeLists.txt with Make.defs 2023-07-11 15:52:56 -03:00
guoshichao
c33d1c9c97 sched/task/fork: add fork implementation 
1. as we can use fork to implement vfork, so we rename the vfork to
fork, and use the fork method as the base to implement vfork method
2. create the vfork function as a libc function based on fork
function

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
 2023-07-12 02:27:37 +08:00
rongyichang
5d7864fbcb drivers/spi: add support for qspi hwfeatures 
add QSPI_BITORDER and QSPI_WORD_REVERSE hwfeatures

Signed-off-by: rongyichang <rongyichang@xiaomi.com>
 2023-07-12 01:42:25 +08:00
liuzhao
899471c6bd add support for YT8512 phy 2023-07-11 03:40:53 +08:00
simbit18
af247276d5 Fix nuttx coding style 
Remove TABs
Fix indentation
 2023-07-11 02:33:45 +08:00
yanghuatao
4d9f67940c nuttx/toolchain: Add macro _LDBL_EQ_DBL to nuttx/arch/arm64/src/Toolchain.defs 
Fix goldfish build toolchain math library error:
/mnt/yang/vela_Goldfish/nuttx/include/libcxx/cmath:454:9: error: 'nexttowardf' has not been declared in '::'
  454 | using ::nexttowardf;
      |         ^~~~~~~~~~~
/mnt/yang/vela_Goldfish/nuttx/include/libcxx/cmath:472:9: error: 'acosl' has not been declared in '::'
  472 | using ::acosl;
      |         ^~~~~
/mnt/yang/vela_Goldfish/nuttx/include/libcxx/cmath:473:9: error: 'asinl' has not been declared in '::'
  473 | using ::asinl;
      |         ^~~~~

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
 2023-07-11 00:44:45 +08:00
Xiang Xiao
813b652ba5 elf: Move 32/64bit generic mapping from risc-v/arch_elf.c to elfxx.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-07-10 13:09:47 -03:00
simbit18
3ef9f4a0b7 arch/arm/src/lpc2378/lpc23xx_uart.h: Fix nuttx coding style 
Remove TABs
 2023-07-10 22:24:59 +08:00
simbit18
14b4d3b8ea arch/arm/src/lpc2378/lpc23xx_pinsel.h: Fix nuttx coding style 
Remove TABs
 2023-07-10 22:24:59 +08:00
simbit18
13924bb901 arch/arm/src/lc823450/lc823450_spifi2.h: Fix nuttx coding style 
Remove TABs
 2023-07-10 22:24:59 +08:00
simbit18
d6182ee36e arch/arm/src/armv8-r/arm_arch_timer.h: Fix nuttx coding style 
Remove TABs
 2023-07-10 22:24:59 +08:00
simbit18
6dc930b82b arch/arm/src/armv7-r/gic.h: Fix nuttx coding style 
Remove TABs
Fix indentation
 2023-07-10 22:24:59 +08:00
simbit18
7d69f8cbcd arch/arm/src/armv7-r/arm_timer.c: Fix nuttx coding style 
Remove TABs
 2023-07-10 22:24:59 +08:00
simbit18
05578896e2 arch/arm/src/armv7-a/arm_timer.c: Fix nxstyle errors 
Remove TABs
 2023-07-10 22:24:59 +08:00
raiden00pl
389df1ec1f cmake: add intial support for nrf91 2023-07-10 22:24:44 +08:00
raiden00pl
f1bb29820e cmake: add intial support for nrf53 2023-07-10 22:24:44 +08:00
raiden00pl
59e261e92f cmake: add initial support for nrf52 2023-07-10 22:24:44 +08:00
raiden00pl
409cb61d49 arch/nrfxx: unify Make.defs 2023-07-10 22:24:44 +08:00
Alan Carvalho de Assis
1d88d5a370 ESP32S2: Add support to SPI Flash 2023-07-10 17:56:46 +08:00
raiden00pl
a94532419f armv8-m/arm_securefault.c: fix warning 
armv8-m/arm_securefault.c:69:3: warning: implicit declaration of function 'syslog_flush'; did you mean 'syslog_like'? [-Wimplicit-function-declaration]
 2023-07-09 10:41:13 -03:00
raiden00pl
848f5cef21 arch/nrf91: add POWER definitions 2023-07-09 10:41:13 -03:00
raiden00pl
0267bfe093 arch/nrf91/clock: various fixes for LFCLK 2023-07-09 10:41:13 -03:00
raiden00pl
6b481e55c9 arch/nrf91/nrf91_modem_os.c: use vsyslog instead of syslog 2023-07-09 10:41:13 -03:00