Commit Graph

299 Commits

Author SHA1 Message Date
Xiang Xiao
bd30d1a4d5 arch: Move trustzone related setting to common place
to share the security setting between arm32 and arm64

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-13 08:43:01 +02:00
Xiang Xiao
b183114d43 arch/arm: Change the default value to ARCH_TRUSTZONE_NONSECURE
since nuttx normally run inside the non secure execution environment

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-13 08:43:01 +02:00
kcheshmedzhiev
ea87d008a0 Initial support for NUCLEO-U5A5ZJ-Q board
Fix for ci error

Typo changes

Fixed typo in boards/arm/stm32u5/nucleo-u5a5zj-q/src/stm32_bringup.c

Typo changes

Typo fixes

Typo fixes

Typo changes

Typo changes

Typo changes
2023-07-23 18:42:05 -07:00
chao an
ee6e2ce149 arch/perf: add ARCH_HAVE_PERF_EVENTS to support hardware perf events
The implementation of up_perf_*() is in a different static library in nuttx:

Hardware: libarch.a
Software: libdrivers.a (weak function)

Since functions with weak attributes cannot be correctly replaced in multiple static libraries,
this PR will use macros to replace whether the arch supports hardware perf events

Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-21 20:43:30 +08:00
raiden00pl
1a6d507422 arch/{nrf52|nrf53|nrf91}: rename NRFxx to nRFxx to be compatible with the manufacturer's nomenclature 2023-07-03 00:52:01 +08:00
raiden00pl
56961d9f34 arch/arm: initial support for NRF91
Port based on arch/arm/nrf53.

Modem not fully supported yet. At the moment, initialization and AT interface work.
Sockets and GNSS interface will be added later.
2023-07-02 10:10:35 -03:00
simbit18
f930b4f6f5 Fix Kconfig style
Remove TABs from Kconfig files
Replace help => ---help---
Add comments
2023-06-20 12:54:50 -03:00
Alexander Merkle
961a68b4cf arch/arm: initial FPU support for armv8r aarch32
CortexR52 can have a optional FPU.
- VFPv3 with FP16
- Option 1: 16 x double-prevision registers - -mfpu=vfpv3-d16-fp16
- Option 1: 32 x double-prevision registers - -mfpu=vfpv3-fp16
2023-06-04 16:49:34 -03:00
Alexander Merkle
c661e26e86 board: add CortexR52 FVP AEMv8R platform
see board/arm/fvp-v8r-aarch32/fvp-armv8r-aarch32/scripts/readme.txt

Port is highly based on fvp-v8r AARCH32 port.
2023-06-01 09:51:03 -03:00
Alexander Merkle
f6695738e1 arch/arm: add ARMv8-r(Cortex-R52) support
Basic work required for uniprocessor CortexR52 (ARMv8R AARCH32) using
GICv3 and CP15 mapped arch timer.

Tested on ARM FVP 11.20.

Port is based on ARMv8R AARCH64 and ARMv7R code. Excuse possible copy-paste leftovers.
2023-06-01 09:51:03 -03:00
liaoao
db53c7abcf procfs:add armv8-m cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
1abe90c7cd procfs:add armv7-r cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
5c5d9420af procfs:add armv7-a cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
108c47c07b procfs:add armv7-m cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
Michael Jung
efa2a95163 Update stm32l562e-dk:nsh
- Update TrustedFirmare-M instructions to latest version of STM32CubeL5
- Increase idle thread stack size to not overflow during system init
- Select ARCH_HAVE_TRUSTZONE for STM32L5
- Set CONFIG_ARCH_TRUSTZONE_NONSECURE for stm32l562e-dk:nsh, since NuttX
  is running in the Non-secure world.

See https://github.com/apache/nuttx/issues/9316

Signed-off-by: Michael Jung <michael.jung@secore.ly>
2023-05-25 16:04:30 +08:00
chao an
60d188353c arm/unwind: EABI unwind needs frame pointer support
Signed-off-by: chao an <anchao@xiaomi.com>
2023-04-27 16:38:40 +08:00
Michal Lenc
40d07760f6 samv7: add support for adjtime() interface
This commit adds deifiniton of get_timer_period() and adj_timer_period()
functions used by adjtime() interface.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-04-25 14:37:50 -03:00
raiden00pl
93ac27ff63 arch/nrf53: add PWM support 2023-03-15 22:08:27 +01:00
chao an
815f40c8f1 armv8-m/cortex-m85: add support of PACBTI(Authentication and Branch Target Identification Extension)
Reference:
https://developer.arm.com/documentation/100748/0617/Security-features-supported-in-Arm-Compiler-for-Embedded/PACBTI-M-extension-mitigations-against-ROP-and-JOP-style-attacks
https://developer.arm.com/documentation/101754/0619/armclang-Reference/armclang-Command-line-Options/-mbranch-protection

Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-07 07:34:05 +02:00
chao an
b48f9d9b96 arch/arm: correct ARCH_HAVE_DSP to ARM_HAVE_DSP
Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-07 01:27:28 +08:00
raiden00pl
99b0bad94e arch/armv8-m: DSP extension is optional 2023-03-05 09:43:52 +08:00
chao an
e942a7c55e build/Kconfig: fix warnings detected by kconfiglib
Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-09 20:07:46 +08:00
chao an
0f35ad29a8 arm/unwinder: set default unwinder type to arm exidx/extab
Signed-off-by: chao an <anchao@xiaomi.com>
2023-01-31 00:38:42 +08:00
chao an
d031989e0e arch/arm: make DSP arch extension configurable
Signed-off-by: chao an <anchao@xiaomi.com>
2023-01-26 22:39:30 +02:00
wangbowen6
27ea9f7625 arm/Kconfig: add cortex-m85 config
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-12-09 01:53:10 +08:00
David Sidrane
da7fe760e8 s32k1xx:LPI2C Add DMA support
s32k3xx:LPI2C fix RESET so it compiles
2022-12-03 13:54:34 +08:00
chao an
86e3bd9d75 arm/toolchain: update toolchain comment to avoid confusion
1. add 'ARM' prefix to choice menu
2. rename 'Generic Clang toolchain' to 'LLVM Clang toolchain'
   to avoid confuse with CONFIG_ARM_TOOLCHAIN_ARMCLANG

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-25 12:33:46 +08:00
Xiang Xiao
1cd9fa25cd arm/tlsr82xx: Don't select ARCH_HAVE_BACKTRACE
since it's already selected by ARCH_ARM

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-11 00:01:35 +02:00
chao an
24129e4ba7 arm/backtrace: add support for EHABI(Exception Handling ABI) stack unwinder
Reference:
https://github.com/ARM-software/abi-aa/blob/main/ehabi32/ehabi32.rst
https://github.com/ARM-software/abi-aa/releases/download/2022Q1/ehabi32.pdf

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-11 03:11:37 +08:00
raiden00pl
69ecafd352 arch/arm: initial support for NRF5340 2022-09-18 21:49:32 +08:00
chao an
7dbaa4f4c4 arch/arm: add support for armclang compiler(AC6)
Reference:
https://developer.arm.com/Tools%20and%20Software/Arm%20Compiler%20for%20Embedded

Signed-off-by: chao an <anchao@xiaomi.com>
Signed-off-by: sheyunhu <sheyunhu@xiaomi.com>
2022-09-16 14:47:27 +08:00
chao an
0f0a94186f arch/arm/toolchain: migrate the toolchain define to arch/arm/Kconfig
migrate the toolchain define to arch/arm/Kconfig to simplify new toolchain registration

Signed-off-by: chao an <anchao@xiaomi.com>
2022-09-16 14:47:27 +08:00
GD32-MCU
85c8144afa add chip GD32F450 of GD32MCU
Modify the file according to the checks

update the board config files, and modify the gd32f4xx_progmem.c

Add chip GD32F450 of GD32MCU

delete the micro FAR, modify code style

Add chip GD32F450 of GD32MCU
2022-09-09 15:29:35 +08:00
Jari van Ewijk
a554b9ce89 NXP S32K1XX: fix LPI2C reset 2022-08-01 07:34:03 -04:00
Jari van Ewijk
dd1096695d Add initial support for NXP S32K3 MCU family
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
2022-07-25 23:47:05 +08:00
curuvar
c21c7ac8dc Added Adafruit QT Py RP2040 board.
Added ability to configure indivdual UART, SPI and I2C pin location.
2022-07-23 18:25:38 +08:00
Huang Qi
a4e867b8d4 arch/arm/Kconfig: Add description for ARM_THUMB to make it configurable
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-07-05 19:34:18 +08:00
Sergey Nikitenko
4285274c31 New stm32wb chip family 2022-07-01 12:13:58 +08:00
curuvar
75facdee72 Added PWM support for rp2040 2022-06-23 10:17:40 -03:00
Michał Łyszczek
e54fe68bbf stm32wl5: add new chip family
This patch adds new chip family, stm32wl5x. This is bare minimum
implementation of said chip. I've tested this by running nsh.
There are only two chips in this family, stm32wl55 and stm32wl54.
The only difference between them is that stm32wl55 has LORA.

stm32wl5 is dual CPU (not core!). Right now only CPU1 is implemented.
CPU0 has access to radio hardware (while CPU1 does not). Chip is
designed so that CPU0 handles radio traffic while CPU1 does the
heavy lifting with data - there is communication pipe between two
CPUs.

I plan to use nuttx on CPU1 and LORA from stm32cube on CPU0 so I
don't have implementing CPU0 right now - once we have working LORA
in nuttx this may change.

Peripherals (except for radio) are shared so it's best to focus on
CPU1 to initialize all peripherals so that CPU0 can only use them
later. There is no real benefit to implement CPU0 if we don't have
working LORA/radio support in nuttx.

In time I will be implementing more and more things from this chip.
Right now I would like this minimal implementation to be merged in
case someone wants to work on this chip as well.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>

---
patch v1->v2
  - fixed formatting (suggested by Alan Carvalho de Assis)
  - rebased patch to master (previous patch was based on nuttx-10.2
    and did not compile on master)
2022-06-07 22:28:32 +08:00
wangbowen6
73f7cc5855 tlsr82: first commit of telink tlsr82xx chip port.
tlsr82: first commit of telink tlsr82xx chip port.

 - tc32 archtecture context switch;
 - tc32 backtrace;
 - timer, uart, pwm, gpio, adc driver;
 - flash, watchdog driver;
 - uart txdma/rxdma;
 - spi console driver;
 - add board bringup and reset;

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-05-09 12:33:39 +08:00
Oki Minabe
4fa21c4719 armv7-a: Inner Shareable TLB maintenance operations
Summary:
- Use Inner Shareable for TLB maintenance operations
- Add config option as CONFIG_ARM_HAVE_MPCORE
- This PR is in preparation for smp with kernel build

Impact:
- armv7-a

Testing:
- sabre-6quad:smp w/ qemu
- sabre-6quad:knsh_smp w/ qemu (WIP)

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
2022-05-06 15:26:59 +09:00
Xiang Xiao
d80c2d7419 arch/arm: Remove all lazy fpu related code
since it is broken and inefficient, and then removed by:
commit dc961baaea
Author: chao.an <anchao@xiaomi.com>
Date:   Thu Apr 14 18:07:14 2022 +0800

    arm/armv7-[a|r]: move fpu save/restore to assembly handler

    Save/Restore FPU registers in C environment is dangerous practive,
    which cannot guarantee the compiler won't generate the assembly code
    with float point registers, especially in interrupt handling

    Signed-off-by: chao.an <anchao@xiaomi.com>

commit 8d66dbc068
Author: chao.an <anchao@xiaomi.com>
Date:   Thu Apr 7 13:48:04 2022 +0800

    arm/armv[7|8]-m: skip the fpu save/restore if stack frame is integer-only

    Signed-off-by: chao.an <anchao@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-19 11:09:36 +03:00
lishaoen
aa0c9fd788 nuttx: Add new config ARM_HAVE_MVE for MVE instruction
Signed-off-by: lishaoen <lishaoen@xiaomi.com>
2022-03-28 08:51:24 +03:00
Anthony Merlino
2fad06008a stm32h7: Adds tickless support. 2022-03-28 00:33:26 +08:00
Huang Qi
edef327655 arch/arm: Move ARCHCPUFLAGS to Toolchain.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-19 02:24:00 +08:00
Huang Qi
69cfe8d626 arch/arm: Support setjmp/longjmp for all socs
After check the official specification of ARM ISA
and Thumb ISA, the arch_setjmp_thumb.S are written
by arm unified assembly language,
so it easy to make it works for ARM and thumb ISA.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-09 17:13:21 +02:00
Huang Qi
bfedbf1c05 arm/imx6: Enable setjmp test in ostest
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-08 21:00:29 +08:00
Masayuki Ishikawa
de95a8550f arch, board: Add thumb support to i.MX6
Summary:
- This commit adds thumb support to i.MX6
- Also, applies the same coding style to arch_elf.c

Impact:
- i.MX6 only

Testing:
- Tested with sabre-6quad:smp (QEMU, Dev board)
- Tested with sabre-6quad:netnsh (QEMU)
- Tested with sabre-6quad:netknsh (QEMU, not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-25 10:51:12 +08:00
fenghang
555d25633a add phyplus_rel_1.4
update source for phyplus driver rel_1.4

update source  for phyplus driver rel 1.4

update source for phyplus driver 1.4

update phy6222 config files
2022-02-15 10:21:10 +08:00