Gregory Nutt
c172d7cf63
EFM32, STM32, and STM32 F7 I2C: Update to use the standard parameter passing to interrupt handlers.
2017-04-30 11:56:06 -06:00
Gregory Nutt
f175af3cd3
More missed enum spi_dev_e forward references.
2017-04-29 08:29:01 -06:00
Sebastien Lorquet
c56c6f7ccc
ARM arch changes
2017-04-28 18:23:29 +02:00
Juha Niskanen
707d1e67fc
STM32, STM32F7, STM32L4: Remove incorrect comment about STM32L1 LSE/RTC/LCD
2017-04-27 07:18:36 -06:00
Gregory Nutt
79256573e1
net: network drver now retains Ethernet MAC address in a union so that other link layer addresses may be used in a MULTILINK environment.
2017-04-22 11:10:30 -06:00
Jussi Kivilinna
325ba1a803
clock: add clock_resynchronize and use subseconds RTC
...
Add clock_resynchronize for better synchronization of CLOCK_REALTIME and CLOCK_MONOTONIC to match RTC after resume from low-power state.
Add up_rtc_getdatetime_with_subseconds under CONFIG_ARCH_HAVE_RTC_SUBSECONDS to allow initializing (and resynchronizing) system clock with subseconds accuracy RTC.
2017-04-21 08:45:57 -06:00
Juha Niskanen
9d0ecedf7d
Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h
2017-04-20 06:30:26 -06:00
Juha Niskanen
e631ee4582
STM32 L1: stm32l15xx_rcc: Allow board to configure HSE clock in bypass-mode. Allows using MCO output from ST-link chip (on Nucleo and Discovery boards) as HSE input.
2017-04-20 06:28:01 -06:00
David Sidrane
4844011b9c
stm32:stm32_serial fixed warning
2017-04-18 11:51:56 -10:00
Gregory Nutt
04ebdbb336
Move: CONFIG_ADC_NO_START_CONV from drivers/adc/Kconfig to arch/arm/src/stm32[f7]/Kconfig as STM32[F7]_ADC_NO_START_CONV. Refresh all configurations with any reference to CONFIG_ADC_NO_START_CONV.
2017-04-18 07:16:35 -06:00
phreakuencies
eac049222c
STM32: Provide TIM5 definition for STM32F429
2017-04-15 12:10:42 -06:00
Gregory Nutt
78bc1aa6bc
Argument of network device IOCTL should be unsigned long, just as will all other IOCTL methods.
2017-04-15 09:33:27 -06:00
Alan Carvalho de Assis
a58823c449
STM32XX: Fix Pending Register definition
2017-04-11 06:45:45 -06:00
Gregory Nutt
ebd2416f9d
stm32 COMP: Logic in stm32_comp.h must be configured on CONFIG_STM32_COMP or otherwise it causes an error via #error on every platform without COMP support.
2017-04-09 11:47:57 -06:00
Jussi Kivilinna
e3b3e57e56
RTC: add interface for check if RTC time has been set
...
New interface allows checking if RTC time has been set. This allows to application to detect if RTC has valid time (after
reset) or should application attempt to get real time by other means (for example, by launching ntpclient or GPS).
2017-04-06 09:53:11 -06:00
Alan Carvalho de Assis
95941b4908
STM32: Fix SYSCFG_CFGR1_I2C_PBXFMP_SHIFT value
2017-04-06 08:35:33 -06:00
Juha Niskanen
3e6b92d5fa
tm32: stm32l15xxx_rcc: configure medium performance voltage range and zero wait-state when allowed by SYSCLK setting
...
Zero wait-state for flash can be configured when:
Range 1 and SYSCLK <= 16 Mhz
Range 2 and SYSCLK <= 8 Mhz
Range 3 and SYSCLK <= 4.2 Mhz
Medium performance voltage range (1.5V) can be configured when SYSCLK is up to 16 Mhz and PLLVCO up to 48 Mhz.
2017-04-05 07:41:25 -06:00
Juha Niskanen
bff341fdfc
stm32: stm32l15xx_rcc: add support for using MSI as system clock
2017-04-05 07:41:24 -06:00
Juha Niskanen
9a29b9a327
stm32: stm32_flash: add EEPROM writing for STM32L15XX
2017-04-04 07:38:49 -06:00
no1wudi
8fbd8b9e6f
STM32:add I2C3 SDA pin mapping for STM32F411
2017-04-04 11:57:45 +08:00
no1wudi
730b674b01
STM32:add I2C3 SDA pin mapping for STM32F411
2017-04-04 11:50:58 +08:00
Juha Niskanen
3a6bd901e4
stm32: fix IWDG and WWDG debug mode stop for STM32L15XX
2017-04-03 07:45:09 -06:00
Gregory Nutt
fb42844788
STM32: Fix a comment
2017-04-02 12:32:20 -06:00
Gregory Nutt
7b789f57ac
Review of previous commit
2017-03-30 12:28:40 -06:00
Konstantin Berezenko
95cbbf552b
Change STM32 tickless to use only one timer
2017-03-30 10:40:05 -07:00
Juha Niskanen
5577f58458
STM32 RNG: Fix semaphore initial value and disable priority inheritance
2017-03-29 07:12:19 -06:00
Gregory Nutt
92da8068ed
Merge branch 'master' of bitbucket.org:nuttx/nuttx
2017-03-26 06:57:35 -06:00
raiden00pl
f3367233b6
stm32_comp.c: typo
2017-03-26 09:36:53 +02:00
raiden00pl
c1090164f5
stm32/Kconfig: update COMP and OPAMP definitions
2017-03-26 09:34:17 +02:00
raiden00pl
6594c65a77
stm32_comp.c: cosmetic
2017-03-26 09:30:23 +02:00
Gregory Nutt
7d57a2b2bd
Trivial changes from review of last PR.
2017-03-25 10:38:41 -06:00
raiden00pl
a806aedb13
STM32F33: Support for COMP character driver
2017-03-25 16:57:43 +01:00
Alexander Oryshchenko
61ff3c6b84
I needed to use DS3231, I remember that in past it worked ok, but now for stm32f4xx is used another driver (chip specific, stm32f40xxx_i2c.c) and DS3231 driver doesn't work. After investigating a problem I found that I2C driver (isr routine) has a few places there it sends stop bit even if not all messages are managed. So, e.g., removing stm32_i2c_sendstop ( #1744 ) and adding stm32_i2c_sendstart after data reading helps to make DS3231 working. Verified by David Sidrane.
2017-03-24 06:44:33 -06:00
Aleksandr Vyhovanec
82a84a8d98
Merged nuttx/nuttx into master
2017-03-24 11:40:09 +03:00
no1wudi
4c6680df99
Merged in no1wudi/nuttx (pull request #291 )
...
fix compile error when disabled the flash data cache corruption for stm32 f1xx
Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-03-24 00:58:26 +00:00
no1wudi
fd76a3db05
fix spacing
2017-03-24 08:52:46 +08:00
no1wudi
5797e84893
Merged nuttx/nuttx into master
2017-03-24 08:40:40 +08:00
David Sidrane
66910577be
stm322_flash:missing unlock on F1 HSI off path
2017-03-23 14:22:45 -10:00
David Sidrane
7e3bec635b
stm32_i2c_alt:Move def of regval to top func def per CS
2017-03-23 11:50:37 -10:00
David Sidrane
d25f8710d2
stm32f40xxx_i2c:Duplicate non CS dev of regval
2017-03-23 11:37:12 -10:00
David Sidrane
f5cf22d871
stm32_i2c_alt:Duplicate non CS dev of regval
2017-03-23 11:36:44 -10:00
David Sidrane
c2a1b719be
stm32_flash:Need conditinal on non F4 targets
2017-03-23 11:33:32 -10:00
rg
9353ca6039
STM32 I2C: Do not allow CONFIG_I2C_POLLED and CONFIG_I2C_DMA
2017-03-23 11:24:18 -06:00
Aleksandr Vyhovanec
06af125e45
The interrupt occurs over the counter overflow
2017-03-23 17:34:45 +03:00
no1wudi
45f5d30e2e
fix compile error when disabled the flash data cache corruption for stm32 f1xx
2017-03-23 13:38:26 +08:00
Gregory Nutt
3fb0a00c35
Small changes from review of last PR. Plus spacing and typo fix.
2017-03-22 17:32:52 -06:00
Gregory Nutt
947acd6c1a
Small changes from review of last PR
2017-03-22 15:53:12 -06:00
José Roberto de Souza
b9b4f184a7
stm32: Add workaround for flash data cache corruption on read-while-write
...
This is a know hardware issue on some STM32 see the errata of your model
and if you make use of both memory banks you should enable it.
2017-03-22 13:14:19 -07:00
José Roberto de Souza
09f70c462d
stm32: Make up_progmem thread safe
...
Writing to a flash sector while starting the erase of other sector
have a undefined behavior so lets add a semaphore and syncronize
access to Flash registers.
But for the semaphore to work it needs to be initialized so each
board needs call stm32_flash_initialize() on initialization, so
to avoid runtime problems it is only using semaphore and making
it thread safe if initialized, after all boards starts to call
stm32_flash_initialize() we can remove the boolean and the check.
2017-03-22 13:14:15 -07:00
José Roberto de Souza
80f56e75f9
stm32: Fix erase sector number for microcontrolers with more than 11 sectors
...
Erase a sector from the second bank cause the bit 4 of SNB being set
but never unsed, so trying to erase a sector from the first bank
was acually eraseing a sector from the second bank.
2017-03-22 12:42:20 -07:00
