Commit Graph

44882 Commits

Author SHA1 Message Date
Huang Qi
4ebc581c73 esp32c3: Simplify irq dispatch logic
ESP32C3 use customized irq encoding so it's hard to share further code
with other risc-v based chips, in this patch, we keep the exception
number definition with risc-v spec.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-04-07 18:16:35 +02:00
Ville Juven
d38b4965f8 MPFS: Prepare support for S-mode
- Access to PLIC via S-mode registers
- Access to IRQs via S-mode registers / definitions
- Initialize S-mode registers upon boot
- Initialize per CPU area before nx_start

NOTE: S-mode requires a companion SW (SBI) which is not yet implemented,
thus S-mode is not usable as is, yet.
2022-04-07 21:55:36 +08:00
Xiang Xiao
3a26cf6a02 arch/risc-v: Remove the unnecessary inclusion of board header files
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-07 11:25:12 +03:00
chao.an
ba5320c36f fs/poll: change format for type pollevent_t
complete the following commits:

commit d87cf8d4ca
Author: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
Date:   Fri Apr 1 20:59:55 2022 +0800

    fs/poll: change format for type pollevent_t

    Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>

commit d535943a69
Author: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
Date:   Fri Apr 1 17:49:10 2022 +0800

    fs/epoll: change type of eventset from uint8_t to uint32_t

    to support EPOLLONESHOT and so on.

    Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-07 16:23:32 +08:00
Jiuzhu Dong
e93100cb4d lib_lib_vsprintf/backtrace: fix the type issue
using 't': For integer types, causes printf to expect
a ptrdiff_t-sized integer argument.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-04-07 12:14:27 +08:00
Jiuzhu Dong
d87cf8d4ca fs/poll: change format for type pollevent_t
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-04-07 12:14:06 +08:00
Jiuzhu Dong
d535943a69 fs/epoll: change type of eventset from uint8_t to uint32_t
to support EPOLLONESHOT and so on.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-04-07 12:14:06 +08:00
Huang Qi
53fef8d9c4 arch/risc-v: Replace riscv_fault with riscv_exception
Remove riscv_fault since its code is duplicated with riscv_exception,
and there are textual excpetion reason in riscv_exception.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-04-06 22:48:46 +08:00
yinshengkai
db012687f9 arch/sim: support simulator keyboard devices 2022-04-06 15:26:57 +03:00
Alan C. Assis
b8a9d7da19 esp32: Add board support to TWAI/CANBus 2022-04-06 15:09:46 +03:00
Alan C. Assis
1090e1a8ea xtensa/esp32: Add support to TWAI/CANBus controller 2022-04-06 15:09:46 +03:00
yinshengkai
dfbf06e250 fix uinput rpmsg logic error 2022-04-06 14:36:11 +03:00
Petro Karashchenko
ff0470d28a include/nuttx: remove double definitions of UNUSED macro
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-04-05 22:57:50 +08:00
zhuyanlin
df6985e2bf jlink-nuttx: update regs as nuttx regs save path change
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-04-05 13:33:00 +02:00
zhuyanlin
6a761ff087 arch:tcbinfo: update tcbinfo as xcpcontext update
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-04-05 13:33:00 +02:00
Xiang Xiao
ae6bfdc9b9 libc: Avoid the compiler generate code call self(memcpy/memmove/memset/memcmp) recursively
please reference the similar change done by other libc implementation:
https://reviews.llvm.org/D68028?id=224286
85c2e6110c
4a1f55e92f
82dfae9ab0

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-05 13:25:53 +03:00
Xiang Xiao
34e17ba0ce libc/string: Fix the minor style issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-05 13:25:53 +03:00
Xiang Xiao
9785d6606c openamp: Change the dependence from OPENAMP to RPTUN
since all rpmsg driver need the extension api exposed by rptun driver

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-05 10:05:41 +03:00
Long Dao
8bf0750090 Update cpp_cmake.rst 2022-04-05 02:04:05 +08:00
Long Dao
e25df6706d Update cpp_cmake.rst
update CMAKE_C_FLAGS when compile C file
2022-04-05 02:04:05 +08:00
Ville Juven
6c22e2894c RISC-V: Fix usage of static_assert in riscv_percpu.c
There is no alias for struct riscv_percu_s
2022-04-04 22:44:25 +08:00
Ville Juven
7db356e720 RISC-V: Fix file name of riscv_dispatch_syscall 2022-04-04 22:44:18 +08:00
Petro Karashchenko
d08fbca679 nuttx: unify FAR attribute usage across the code
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-04-04 21:32:58 +08:00
Abdelatif Guettouche
f527abc324 arch/xtensa: Build the xtensa_tcbinfo.c file for S2 and S3.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-04-04 21:25:47 +08:00
Xiang Xiao
499c450d36 libc/netdb: Hold dns lock when operating with resolv.conf
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-04 19:48:36 +09:00
Xiang Xiao
cd695cd0d9 libc/netdb: Remove the temporary unlock in dns_foreach_nameserver
since netdb support the recursive lock

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-04 19:48:36 +09:00
Xiang Xiao
a8cac59864 libc/netdb: Support the recursive lock
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-04 19:48:36 +09:00
Xiang Xiao
9f7ecbd5b7 syscall: Fix Makefile:69: target 'syscall_names.o' given more than once in the same rule
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-04 08:44:50 +02:00
YAMAMOTO Takashi
75b1358d8e modlib_bind.c: Restore "Relocation address out of range" checks
Restore the checks which got completely broken by the following change.
```
commit 15142a8b10
Author: anjiahao <anjiahao@xiaomi.com>
Date:   Fri Apr 1 16:20:03 2022 +0800

    modlib/modlib_bind:fix unsigned_compare with zero

    Signed-off-by: anjiahao <anjiahao@xiaomi.com>
```
2022-04-04 09:12:37 +03:00
Xiang Xiao
bf48c6d4a8 arch/riscv: Rename SCRATCH_HARTID_OFFSET to RISCV_PERCPU_HARTID_OFFSET
and fix the typo error

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-04 08:22:08 +03:00
Petro Karashchenko
9b7f9867aa arch/risc-v: use STACK_FRAME_SIZE for in S-mode syscall asm
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-04-04 12:05:53 +08:00
Petro Karashchenko
e88a357fa7 net/utils: fix IPv4 checksum calculation
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-04-04 07:40:28 +09:00
Michael Jung
747da36eae b-u585i-iot02a:nsh: Drop TrustedFirmware-M dependency
Make the nsh defconfig for the b-u585i-iot02a run stand-alone (i.e. not
as a companion that relies on TF-M doing low-level board
initialization).
2022-04-03 23:20:03 +03:00
Michael Jung
9d07559906 b-u585i-iot02a: Fix stdclock initialization
Correct the respective defines to initialize the B-U585I-IOT02A clock
tree correctly by means of stm32_stdclockconfig().
2022-04-03 23:20:03 +03:00
Michael Jung
e3926ecb16 stm32u5: stm32_stdclockconfig fixes
Fix stm32_stdclockconfig for stm32u585xx to the extend that the
B-U585I-IOT02A board's clock tree can be configured.  This board uses
the MSIS as PLL1's input clock and the LSE to autotrim the MSIS.
2022-04-03 23:20:03 +03:00
hejianliang3
e9648d8a73 net:fix coverity warning
Signed-off-by: hejianliang3 <hejianliang3@xiaomi.com>
2022-04-03 14:37:53 +03:00
zhanghongyu
451c53daa4 usrsock: Move event field to usrsock_message_common_s
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2022-04-03 11:38:50 +09:00
wangbowen6
bcb2530b18 arm/chip: add backtrace support for all chips that support thumb instruction set.
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-04-03 00:22:57 +08:00
raiden00pl
c4c2c46ebf note_sysview.c: fix compilation if CONFIG_SCHED_INSTRUMENTATION_FILTER not defined 2022-04-02 22:24:43 +08:00
raiden00pl
a984de6098 note_sysview.c: fix compilation for CONFIG_TASK_NAME_SIZE == 0 2022-04-02 22:24:43 +08:00
raiden00pl
7403678db7 boards/nucleo-f446re: initialize up_perf 2022-04-02 10:34:35 -03:00
raiden00pl
b487101b87 stm32: add support for up_perf 2022-04-02 10:34:35 -03:00
zhuyanlin
26ab4e9200 mod_insmod: fix coverity warning
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-04-02 20:09:42 +08:00
zhuyanlin
c46a926e2b sched_note: fix buffer size warning in coverity
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-04-02 20:09:42 +08:00
Xiang Xiao
27c80f2586 arch/riscv: Rename g_scratch to g_percpu
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-02 14:08:37 +03:00
Xiang Xiao
e959775397 arch/riscv: Access [m|s]scratch through CSR_SCRATCH macro
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-02 14:08:37 +03:00
Xiang Xiao
be2fee7d6e arch/riscv: Rename riscv_exception_macros.S to riscv_macros.S
since macro defined in this file is also used in the normal context

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-02 14:08:37 +03:00
Xiang Xiao
79aca28bd7 arch/riscv: Remove riscv_sbi.c since it doesn't exist
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-02 14:08:37 +03:00
Xiang Xiao
629d9969dd arch/riscv: Rename riscv_syscall_dispatch to riscv_dispatch_syscall
follow other function naming(e.g. riscv_dispatch_irq)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-02 14:08:37 +03:00
Xiang Xiao
7a209e6ee8 arch/riscv: Align the macro definition in csr.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-02 14:08:37 +03:00