Commit Graph

7262 Commits

Author SHA1 Message Date
hujun5
c35e25b7e5 arch: rename xxxx_pause.c to xxxx_smpcall.c
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
d54bc8a9f8 arch: remove up_cpu_pause up_cpu_resume up_cpu_paused up_cpu_pausereq
reason:
  To remove the "sync pause" and decouple the critical section from the dependency on enabling interrupts,
  after that we need to further implement "schedlock + spinlock".
changelist
  1 Modify the implementation of critical sections to no longer involve enabling interrupts or handling synchronous pause events.
  2 GIC_SMP_CPUCALL attach to pause handler to remove arch interface up_cpu_paused_restore up_cpu_paused_save
  3 Completely remove up_cpu_pause, up_cpu_resume, up_cpu_paused, and up_cpu_pausereq
  4 change up_cpu_pause_async to up_send_cpu_sgi

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
487fcb3bce signal: adjust the signal processing logic to remove the judgment
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
8275a846b1 arch: move sigdeliver to common code
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
guoshichao
bb8eb9398d armv7-m/irq: fix the greenhills compiler compile error
CXX:  libcxxmini/libxx_new.cxx "/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

make[1]: *** [Makefile:69: libxx_delete_sized.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make[1]: *** [Makefile:69: libxx_deletea_sized.o] Error 1
make[1]: *** [Makefile:69: libxx_new.o] Error 1
"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-10-10 15:31:50 +02:00
Bowen Wang
3b1870028c include/pci.h: sync the subvendor/subdevice type in id table and pci_device_s
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
yanghuatao
52473d7fa2 toolchain/ghs: Fix ?? "trigraphs not allowed" warnings
"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 263: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SEL_MASK        0x1e00  /* Data select (??) */
                                                                    ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 264: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SCALE_MASK      0x6000  /* Data scale (??) */
                                                                   ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 266: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_PPB_EXTENSIONS             6       /* PPB support extensions (??) */
                                                                               ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 267: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_PPB_B2_B3                 0x40    /* Stop clock when in D3hot (??) */
                                                                                 ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 268: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_BPCC_ENABLE               0x80    /* Bus power/clock control enable (??) */
                                                                                       ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 269: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_DATA_REGISTER              7       /* (??) */

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
e33bdd9e38 include/pci_regs: add PCI_STD_NUM_BARS macro
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
lipengfei28
519c5c86aa add pci irq interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-10 15:31:08 +02:00
wangyongrong
1e091fb2e0 pci.c: add pci_read/write_io_qword support
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
zhaohaiyang1
45bb7a9c1c char driver CAN: add tx_confirm function in upperCAN driver.
add tx_confirm function in upperCAN driver1

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-10 17:58:36 +08:00
zhaohaiyang1
63515d584b chardriver upperCAN: support to independent set TX/RX FIFO size.
support to independent set TX/RX FIFO size.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-10 17:58:36 +08:00
zhaohaiyang1
9b698b2304 add the ability that control CAN transceiver state.
add the ability that control CAN transceiver state in nuttx.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-10 17:58:36 +08:00
zhaohaiyang1
2bb4ec0fd2 nuttx/can: add can controller state setting and getting in uppercan.
add can controller state setting and getting in uppercan.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-10 17:58:36 +08:00
Xiang Xiao
4324970980 can: Merge cd_error and rx_overflow into rx_error so the error could dispath to each client without interference
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-10-10 17:58:36 +08:00
hujun5
508c5889d7 sched: change nxsched_islocked_global to nxsched_islocked_tcb
reason:
1 To improve efficiency, we mimic Linux's behavior where preemption disabling is only applicable to the current CPU and does not affect other CPUs.
2 In the future, we will implement "spinlock+sched_lock", and use it extensively. Under such circumstances, if preemption is still globally disabled, it will seriously impact the scheduling efficiency.
3 We have removed g_cpu_lockset and used irqcount in order to eliminate the dependency of schedlock on critical sections in the future, simplify the logic, and further enhance the performance of sched_lock.
4 We set lockcount to 1 in order to lock scheduling on all CPUs during startup, without the need to provide additional functions to disable scheduling on other CPUs.
5 Cpu1~n must wait for cpu0 to enter the idle state before enabling scheduling because it prevents CPUs1~n from competing with cpu0 for the memory manager mutex, which could cause the cpu0 idle task to enter a wait state and trigger an assert.

size nuttx
before:
   text    data     bss     dec     hex filename
 265396   51057   63646  380099   5ccc3 nuttx
after:
   text    data     bss     dec     hex filename
 265184   51057   63642  379883   5cbeb nuttx

size -216

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
   -machine virt,virtualization=on,gic-version=3 \
   -net none -chardev stdio,id=con,mux=on -serial chardev:con \
   -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-10 17:57:30 +08:00
hujun5
ed998c08c4 sched: change the SMP scheduling policy from synchronous to asynchronous
reason:
Currently, if we need to schedule a task to another CPU, we have to completely halt the other CPU,
manipulate the scheduling linked list, and then resume the operation of that CPU. This process is both time-consuming and unnecessary.

During this process, both the current CPU and the target CPU are inevitably subjected to busyloop.

The improved strategy is to simply send a cross-core interrupt to the target CPU.
The current CPU continues to run while the target CPU responds to the interrupt, eliminating the certainty of a busyloop occurring.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-09 23:32:31 +08:00
fangzhenwei
cc9d42804b local_sock: fix accept use-after-free
we should get next waiter before acceptor released

Signed-off-by: fangzhenwei <fangzhenwei@xiaomi.com>
2024-10-09 23:00:32 +08:00
chao an
9dbde04327 Revert "toolchain/ghs: Fix CONFIG_SCHED_CRITMONITOR_MAXTIME_XXX "zero used for undefined preprocessing identifier" warnings"
move private define to public

This reverts commit 236678d730.

Signed-off-by: chao an <anchao@lixiang.com>
2024-10-09 18:16:56 +08:00
yinshengkai
593768e11e sim/gcov: Fix conflicts between fprofile-orderate and __asan_default_options
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-10-09 18:16:28 +08:00
anjiahao
9403bc126b modlib/dlfcn:unify same code
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-10-08 23:51:33 +08:00
dongjiuzhu1
79b4b39994 libc/modlib: free memory resource when rmmod elf
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-10-08 23:51:33 +08:00
dongjiuzhu1
3b0e2be058 binfmt/modlib: support loading each sections to different memory for Relocate object
The feature depends on ARCH_USE_SEPARATED_SECTION
the different memory area has different access speed and cache
capability, so the arch can custom allocate them based on
section names to achieve performance optimization

test:
sim:elf
sim:sotest

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-10-08 23:51:33 +08:00
ligd
a965e3c3f9 math: remove is_power_of_2() keep IS_POWER_OF_2()
Caused it may conflict with other platfrom

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-08 23:50:47 +08:00
likun17
57f84aaca8 sensor: Added 6dof motion and gesture related types. For details, see: https://developer.android.com/reference/android/hardware/SensorEvent#values
Signed-off-by: likun17 <likun17@xiaomi.com>
2024-10-03 09:06:59 +08:00
likun17
a4e90b7268 inlclude/uorb.h:Update data types to be sorted by macro definition.
Signed-off-by: likun17 <likun17@xiaomi.com>
2024-10-03 09:06:59 +08:00
likun17
6a4196c572 sensor:sensor info power max_range and resolution are unified with Android type. 0e67aa0cae:include_all/hardware/sensors.h
Nuttx    <-------------------------------> Android
int32_t  <-- version                   --> int
float    <-- power                     --> float
float    <-- max_range                 --> float
float    <-- resolution                --> float
int32_t  <-- min_delay                 --> int32_t
int32_t  <-- max_delay                 --> int32/64_t
uint32_t <-- fifo_reserved_event_count --> uint32_t
uint32_t <-- fifo_max_event_count      --> uint32_t
char[]   <-- name                      --> char*
char[]   <-- vendor                    --> char*

Signed-off-by: likun17 <likun17@xiaomi.com>
2024-10-03 09:06:59 +08:00
dongjiuzhu1
eb0732a183 nuttx/uorb.h: align sensor_type value with aosp refs:0e67aa0cae:include_all/hardware/sensors-base.h
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-10-03 09:06:59 +08:00
dulibo1
1179802cfe gpio:add feature for gpio wakeup
1.add pin type to cfg gpio as wake up source
2.add IOEXPANDER_OPTION_WAKEUPCFG for set wake up option

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-10-03 09:06:04 +08:00
yangshuyong
a537ecdd0f Support nuttx pci endpoint driver framework
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
lipengfei28
56308bf202 bitmap: add bitmap_find_free_region
The pci ep framewoek use bitmap manage the pci outbond memory

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
lipengfei28
ca39dc2e74 math: Optimize the implementation of log2ceil and log2floor
and move common math funtions to math32.h:
div_round_up
div_round_closest
is_power_of_2
roundup_pow_of_two
rounddown_pow_of_two

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
lipengfei28
4fd78583f7 libc: add find_next_zero_bit
The pci ep framework use bitmap manage free bar

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
lipengfei28
b18262d78f bits:rename __set_bit to set_bit __clear_bit to clear_bit
This used for add pci ep drver framework

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
chenrun1
4cec713dbf fs_inode:Change the type of i_crefs to atomic_int
Summary:
  1.Modified the i_crefs from int16_t to atomic_int
  2.Modified the i_crefs add, delete, read, and initialize interfaces to atomic operations
The purpose of this change is to avoid deadlock in cross-core scenarios, where A Core blocks B Core’s request for a write operation to A Core when A Core requests a read operation to B Core.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-09-23 14:07:03 +08:00
ouyangxiangzhen
56bcc3bb12 sched/signal: Add ifdef macro to reduce the bss size.
This commit added ifdef macro to sigwork_s. When CONFIG_SIG_EVTHREAD is
not defined, the struct sigwork_s will be empty struct, which is helpful
to reduce bss size.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-09-23 12:29:36 +08:00
wangjianyu3
515c3978dd Thermal: Check trip type in thermal_zone_device_register().
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-23 08:57:29 +08:00
wangjianyu3
d1b87bd021 Add thermal framework
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-23 08:57:29 +08:00
wangjianyu3
b78c9a7067 boardctl.h: Add BOARDIOC_SOFTRESETCAUSE_THERMAL reset cause
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-23 08:57:29 +08:00
likun17
2b59a0a19b lzf: Add macro judgment to header file reference.
Signed-off-by: likun17 <likun17@xiaomi.com>
2024-09-21 03:00:13 +08:00
guoshichao
d26357d3e6 nuttx/math: fix greenhills build warning on using sizeof with operand
the detailed warning info are:
CC:  syslog/vsyslog.c "pthread/pthread_create.c", line 443: warning #1931-D: operand of sizeof is
          not a type, variable, or dereferenced pointer expression
          ptcb->cmn.timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
                                ^

CC:  dirent/lib_closedir.c "sched/sched_profil.c", line 81: warning #1931-D: operand of sizeof is not a
          type, variable, or dereferenced pointer expression
    wd_start(&prof->timer, PROFTICK, profil_timer_handler, arg);
                           ^

"sched/sched_profil.c", line 142: warning #1931-D: operand of sizeof is not a
          type, variable, or dereferenced pointer expression
    wd_start(&prof->timer, PROFTICK, profil_timer_handler, (wdparm_t)prof);
                           ^

CC:  common/arm_modifyreg8.c "sched/sched_setscheduler.c", line 165: warning #1931-D: operand of sizeof is
          not a type, variable, or dereferenced pointer expression
            tcb->timeslice  = MSEC2TICK(CONFIG_RR_INTERVAL);
                              ^

CC:  misc/lib_utsname.c "sched/sched_unlock.c", line 275: warning #1931-D: operand of sizeof is not a
          type, variable, or dereferenced pointer expression
            rtcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
                              ^

"sched/sched_roundrobin.c", line 119: warning #1931-D: operand of sizeof is
          not a type, variable, or dereferenced pointer expression
            tcb->timeslice = MSEC2TICK(CONFIG_RR_INTERVAL);
                             ^

CC:  armv7-m/arm_fpuconfig.c cxarm: Error: No files.  Try -help.
CC:  misc/lib_crc8ccitt.c cxarm: Error: No files.  Try -help.
cxarm: Error: No files.  Try -help.
CC:  getprime_main.c cxarm: Error: No files.  Try -help.
cxarm: Error: No files.  Try -help.
CC:  misc/lib_log2ceil.c cxarm: Error: No files.  Try -help.
CC:  task/task_start.c "task/task_setup.c", line 423: warning #1931-D: operand of sizeof is not a
          type, variable, or dereferenced pointer expression
        tcb->timeslice      = MSEC2TICK(CONFIG_RR_INTERVAL);
                              ^

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-09-20 22:01:36 +08:00
likun17
71876ae098 lib_libvscanf.c:Add buffer data type conversion interface.
Signed-off-by: likun17 <likun17@xiaomi.com>
2024-09-19 11:44:47 +08:00
likun17
89a3f28a76 lib_libvsprintf.c:Add buffer data type conversion interface.
Signed-off-by: likun17 <likun17@xiaomi.com>
2024-09-19 11:44:47 +08:00
Petro Karashchenko
f0267bc507 arch/arm/samv7: add support of SocketLIN interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-09-19 09:39:54 +08:00
yinshengkai
f326f15b40 sched: move DUMP_ON_EXIT to sched
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-09-19 03:49:12 +08:00
wangjianyu3
ffac2a314b driver/sensors: Support GNSS Geofence
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-19 03:44:49 +08:00
wangjianyu3
bf83b3fafc driver/sensors: Support GNSS Measurement & Clock
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-19 03:44:49 +08:00
wangjianyu3
e830db0316 driver/sensors: Add constellation for GNSS
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-19 03:44:49 +08:00
wangjianyu3
c652f41c87 nuttx/uorb: Rename GPS to GNSS
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-19 03:44:49 +08:00
dongjiuzhu1
b17c074a18 nuttx/uorb: change unsigned long to uint32 to fix size issue
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-19 03:44:49 +08:00