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14249 Commits

Author SHA1 Message Date
Matthew Trescott
8c471db932 Corrections to Tiva KConfig 2022-03-15 11:32:31 -04:00
Matthew Trescott
bc80bbddc7 Add Tiva CAN driver 2022-03-15 11:32:31 -04:00
chao.an
81130bc692 arch/arm: remove unused arm_copyfullstate/arm_copyarmstate 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-15 23:03:51 +09:00
chao.an
7b9978883c arch/arm: optimize context switch speed 
The current context save implementation saves registers of each task
to xcp context, which is unnecessary because most of the arm registers are
already saved in the task stack, this commit replace the xcp context with
stack context to improve context switching performance and reduce the tcb
space occupation of tcb instance.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-15 23:03:51 +09:00
Petro Karashchenko
b04447d066 timer_lowerhalf: minor improvements 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-15 10:30:48 +08:00
Xiang Xiao
b6bc460b2c arch: Make the comment and definition of CONFIG_SYS_RESERVED correctly 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-14 22:51:00 +02:00
chao.an
ea42981cc6 syscall/names: export the syscall name in STUB module 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-14 21:37:53 +02:00
chao.an
d398ffb930 arm/armv7-a/r: unified syscall registers dump 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-14 21:37:53 +02:00
chao.an
7c02432f0e arm/armv7-a/r: set the default CPU mode to System 
In SVC mode, the banked register will be inconsistent with the user mode register:

arch/arm/src/armv7-a/arm_vectors.S

 276   .globl  arm_syscall
 277   .globl  arm_vectorsvc
 278   .type arm_vectorsvc, %function
 279
 280 arm_vectorsvc:
...
 286   sub   sp, sp, #XCPTCONTEXT_SIZE        // < SVC mode SP
...
 308   stmia   r0, {r13, r14}^                // < USR mode SP/LR
...

[    2.200000] [ 4] [ ALERT] SYSCALL Entry: regs: 0x80202708 cmd: 4
[    2.200000] [ 4] [ ALERT]   R0: 00000004 80001229 00000001 80202018 00000000 00000000 00000000 802027d0
[    2.200000] [ 4] [ ALERT]   R8: 00000000 00000000 00000000 00000000 00000000 802027d0 1080f710 1080f710
[    2.200000] [ 4] [ ALERT] CPSR: 00000073
[    2.200000] [ 4] [ ALERT] SYSCALL Exit: regs: 0x80202708
[    2.200000] [ 4] [ ALERT]   R0: 1 80202018 1 80202018 0 0 0 802027d0
[    2.200000] [ 4] [ ALERT]   R8: 0 0 0 0 0 802027d0 1080f710 80001229
[    2.200000] [ 4] [ ALERT] CPSR: 00000070

SVC SP is 0x80202708
USR SP is 0x802027d0
0x802027d0 - 0x80202708 should be XCPTCONTEXT_SIZE

[    2.200000] [ 4] [ ALERT] SYSCALL Entry: regs: 0x80202708 cmd: 51
[    2.200000] [ 4] [ ALERT]   R0: 00000033 00000000 80202780 00000000 00000000 00000000 00000000 80202710
[    2.200000] [ 4] [ ALERT]   R8: 00000000 00000000 00000000 00000000 00000000 80202710 800039d5 800039b2
[    2.200000] [ 4] [ ALERT] CPSR: 00000070
[    2.200000] [ 4] [ ALERT] SYSCALL Exit: regs: 0x80202708
[    2.200000] [ 4] [ ALERT]   R0: 2b 0 80202780 0 0 0 0 80202710
[    2.200000] [ 4] [ ALERT]   R8: 0 0 0 0 0 10843d80 800039d5 10801425
[    2.200000] [ 4] [ ALERT] CPSR: 00000073

SVC SP is 0x80202708
USR SP is 0x80202710
SP overlap in SVC and USR mode

This commit change the default CPU mode to System and ensure the consistency of SP/LR in USR/SYS mode during syscall.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-14 19:54:53 +09:00
Xiang Xiao
54e630e14d arch: Merge up_arch.h into up_internal.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-14 09:32:17 +02:00
Xiang Xiao
c96c96a399 drivers: Merge the common driver initialization into one place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-13 11:24:48 -03:00
Xiang Xiao
39fb09738d arch: Move [arm|xtensa]_intstack_[alloc|top] to common header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-11 23:08:07 +02:00
Xiang Xiao
17d1a48fc9 arch: Remove up_puts prototype from up_inernal.h 
since it's defined in include/nuttx/arch.h now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-11 23:08:07 +02:00
Petro Karashchenko
fc9e2d272e arch/arm/arm[-a|-r]: fix typos in comments 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-11 11:08:01 +08:00
Xiang Xiao
29cb85ba17 arch/stm32: Fix compiler warning 
chip/stm32_i2s.c:1949:12: error: conflicting types for built-in function 'roundf'; expected 'float(float)' [-Werror=builtin-declaration-mismatch]
 1949 | static int roundf(float num)
      |            ^~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-10 19:46:01 +02:00
Xiang Xiao
a07dc2363e c5471/c5471_irq.c: Fix error: '__builtin_memcpy' forming offset [4, 31] is out of the bounds [0, 4] of object '_svectors' with type 'int' 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-10 19:46:01 +02:00
Huang Qi
69cfe8d626 arch/arm: Support setjmp/longjmp for all socs 
After check the official specification of ARM ISA
and Thumb ISA, the arch_setjmp_thumb.S are written
by arm unified assembly language,
so it easy to make it works for ARM and thumb ISA.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-09 17:13:21 +02:00
Richard Tucker
4888be37e3 arch/arm/src/sam34/sam_dmac.c: Fix compilation error 2022-03-09 10:18:32 +08:00
Huang Qi
bfedbf1c05 arm/imx6: Enable setjmp test in ostest 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-08 21:00:29 +08:00
Huang Qi
cfff115f21 arm: Move setjmp to common place 
Since some Cortex A core supports thumb mode also,
thus they can share same implementation.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-08 21:00:29 +08:00
Juha Niskanen
779665c704 arch/arm/src/stm32l4: STM32L4+ might need flash data cache corruption workaround 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2022-03-04 14:00:20 +08:00
Oleg Evseev
625d230d28 arch/arm/src/stm32f7/stm32_can.c: fix CAN3 receiving 
by fixing filter initialization.

STM32F7 CAN3 works in single peripheral configuration and there is only 14 filter banks: 0-13. Previously not available 14 indexed filter (CAN_NFILTERS/2) was wrongly used for for receiving to FIFO. Now zero indexed filter is correctly used instead.
 2022-03-03 14:31:37 -03:00
zhuyanlin
5af1b671b6 armv7-a/armv7-r:cache: modify hardcode in cache set/way operation 
Some chip not use the default cache size & way , read from
CCSIDR instead of hardcode.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-03 14:11:31 +08:00
Masayuki Ishikawa
2a434fe1fa arch: imx6: Add the pgheap for imx6 
Summary:
- This commit adds the pgheap for imx6

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-03-01 12:18:47 +08:00
Xiang Xiao
da954956e7 Simplify DEFAULT_SMALL usage in Kconfig 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-01 03:15:01 +08:00
chao.an
0961f12e28 arm/phy62xx: remove unused private header 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-01 00:33:58 +08:00
Masayuki Ishikawa
56e0e6a5ec arch: imx6: Remove sem_t from imx_serial.c 
Summary:
- I noticed that when exiting getprime, DEBUGASSERT happens in
  nxsem_wait()
- Finally, I found that up_putc() uses nxsem_wait()
- This commit fixes this issue by removing the semaphore.
- Also, up_putc() now calls imx_lowputc()

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-02-28 16:09:01 +08:00
Masayuki Ishikawa
a75d905760 arch: imx6: Refactor imx_lowputc() 
Summary:
- Remove '\n' -> '\r\n' conversion
- Remove waiting for FIFO empty after sending a character
- Remove CONFIG_DEBUG_FEATURES

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-02-28 16:09:01 +08:00
Xiang Xiao
872c570343 arch: Align the implementation of stack related functions 
arm: Avoid call k[u]mm_memalign to save the code size
ceva: Correct stack_base_ptr usage(top of stack v.s. bottom of stack)
mips: Correct the stack alignment in up_use_stack
misoc: Correct the stack alignment in up_use_stack
or1k: Correct the stack alignment in up_use_stack

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-28 15:05:41 +08:00
Xiang Xiao
3bf416e8b8 arch: Move STACK_ALIGNMENT definition to up_internal.h 
to avoid the same macro duplicate to many place

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-28 15:05:41 +08:00
Xiang Xiao
44bd3212d4 arch: Remove SYS_RESERVED from Kconfg 
let's arch define the correct value instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
Xiang Xiao
087b9e5ff3 arch: Move the content from svcall.h to syscall.h 
and remove svcall.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
Xiang Xiao
0c7517e579 arch: Remove the duplicated syscall.h in each arch 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
chao.an
b57e0b6118 arm/armv7-a/r: check ARMV7A_DECODEFIQ on dataabort 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-27 17:25:22 +09:00
chao.an
c369e47107 arm/armv7-a/r: handle swi on interrupt stack 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-27 17:25:22 +09:00
lp.xiao
fac10b6ebd stm32f103re has a dac module.but the pinmap file has no corresponding definition 2022-02-27 14:39:17 +08:00
Xiang Xiao
b95022f8de arm/armv7-a: Remove CONFIG_SMP guard from arm_scu.c 
since ACTLR.SMP need enable to make cache work on Cortex A7:
https://developer.arm.com/documentation/ddi0464/f/CHDBIEIF

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-26 14:15:30 +09:00
Masayuki Ishikawa
de95a8550f arch, board: Add thumb support to i.MX6 
Summary:
- This commit adds thumb support to i.MX6
- Also, applies the same coding style to arch_elf.c

Impact:
- i.MX6 only

Testing:
- Tested with sabre-6quad:smp (QEMU, Dev board)
- Tested with sabre-6quad:netnsh (QEMU)
- Tested with sabre-6quad:netknsh (QEMU, not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-02-25 10:51:12 +08:00
Xiang Xiao
25213c42a5 arch/arm: Remove the empty spinlock.h file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-25 09:18:53 +09:00
Anton Potapov
9603b8f67c Add DAC2 configuration for stm32f405. 2022-02-24 12:09:41 -05:00
Xiang Xiao
d7fe0127b0 Replece clock_gettime(CLOCK_REALTIME) with clock_systime_timespec if suitable 
it's better to call the kernrel api insteaad user space api in kernel

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-24 01:06:36 +08:00
Xiang Xiao
43f57240e0 Replece clock_gettime(CLOCK_MONOTONIC) with clock_systime_timespec 
it's better to call the kernrel api insteaad user space api in kernel

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-24 01:06:36 +08:00
chao.an
13889ba868 arch/arm: unify some duplicate code to common layer 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-23 21:35:55 +08:00
chao.an
6cc0aaf5b9 arch/arm: unify switch context from software interrupt 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-23 15:04:29 +09:00
chao.an
db3a40ac25 arch/armv7-r: unify switch context from software interrupt 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-23 15:04:29 +09:00
chao.an
61cd9dfca1 arch/armv7-a: unify switch context from software interrupt 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-23 15:04:29 +09:00
Gregory Nutt
1ded8bbabb Garbage configuration setting in EFM32 code 
arch/arm/src/efm32/efm32_start.c:

      /* For the case of the separate user-/kernel-space build, perform whatever
       * platform specific initialization of the user memory is required.
      * Normally this just means initializing the user space .data and .bss
       * segments.
       */

    #ifdef CONFIG_NUTTX_KERNEL
      efm32_userspace();
      showprogress('E');
    #endif

But there is no CONFIG_NUTTX_KERNEL configuration setting.  Comparing this to other architectures it is clear this should be

    #ifdef CONFIG_BUILD_PROTECTED
 2022-02-23 03:40:44 +08:00
Xiang Xiao
f1ed349dd9 sched/clock: Remove CLOCK_MONOTONIC option from Kconfig 
here is the reason:
1.clock_systime_timespec(core function) always exist regardless the setting
2.CLOCK_MONOTONIC is a foundamental clock type required by many places

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-23 01:21:26 +08:00
chao.an
0aa0022b12 arch/armv7-a: replace SYS_signal_handler_return hardcode 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-22 17:59:02 +08:00
chao.an
e0fabbfdd6 arch/arm: replace SYS_syscall_return hardcode from syscall 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-22 17:59:02 +08:00