Gregory Nutt
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c5b00ccfc4
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SMP Signals: Fix some SMP signal delivery logic. Was not handling some critical sections correctly and was missing logic to signal tasks running on other CPUs.
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2017-01-14 08:28:37 -06:00 |
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Gregory Nutt
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f77dcdf323
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ARMv7-A SMP: Add a little logic to signal handling.
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2016-11-24 11:45:05 -06:00 |
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Gregory Nutt
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15c260a428
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armv7-a/armv6-m/arm/a1x: Convert *err() to either *info() or add ERROR:, depending on if an error is reported
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2016-06-17 16:44:50 -06:00 |
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Gregory Nutt
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a1469a3e95
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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()
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2016-06-11 15:50:49 -06:00 |
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Gregory Nutt
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07acd5327a
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SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started.
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2016-05-20 12:39:02 -06:00 |
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Gregory Nutt
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4d4f54a789
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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Gregory Nutt
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70e502adb0
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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Gregory Nutt
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ed4e3c0a9e
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ARM: Replace explicit references to g_readytorun with indirect references via the macro this_task()
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2016-02-06 13:41:28 -06:00 |
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Gregory Nutt
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0ca999e119
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Make some spacing comply better with coding standard
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2015-10-06 16:23:32 -06:00 |
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Gregory Nutt
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26347891ac
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Apply same fix for ARMv7-M to other architectures
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2015-09-30 11:21:04 -06:00 |
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Gregory Nutt
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70e5350942
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Mostly cosmetic changes
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2014-09-04 10:28:38 -06:00 |
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Gregory Nutt
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4dc151097e
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Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
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2014-08-08 17:53:55 -06:00 |
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Gregory Nutt
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0a134f0158
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Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling
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2014-06-21 09:55:09 -06:00 |
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Gregory Nutt
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0d9250fae5
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Misc Cortex-A5 changes include new file for cache operations
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2013-07-20 13:06:00 -06:00 |
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Gregory Nutt
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c294e9b374
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More ARMv7-A files that are just copies of the ARMv4/5 files for now
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2013-07-19 11:43:04 -06:00 |
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